#
# Patch managed by http://www.holgerschurig.de/patcher.html
#

--- linux2/arch/arm/boot/compressed/head-xscale.S~corgi_base-r0.patch
+++ linux2/arch/arm/boot/compressed/head-xscale.S
@@ -59,3 +59,13 @@
 #ifdef CONFIG_MACH_POODLE
 		mov	r7, #MACH_TYPE_POODLE
 #endif
+
+#ifdef CONFIG_MACH_CORGI
+		mov	r7, #(MACH_TYPE_CORGI & 0xff)
+		orr	r7, r7, #(MACH_TYPE_CORGI & 0xff00)
+#endif
+
+#ifdef CONFIG_MACH_HUSKY
+		mov	r7, #(MACH_TYPE_HUSKY & 0xff)
+		orr	r7, r7, #(MACH_TYPE_HUSKY & 0xff00)
+#endif
\ No newline at end of file
--- linux2/arch/arm/mach-pxa/Kconfig~corgi_base-r0.patch
+++ linux2/arch/arm/mach-pxa/Kconfig
@@ -22,16 +22,33 @@
 	bool "SHARP Poodle"
 	select PXA25x
 
-config SHARP_LOCOMO
-	bool "SHARP LoCoMo support"
-	default Y
-	depends MACH_POODLE
+config MACH_CORGI
+	bool "SHARP Corgi (SL-C700)"
+	select PXA25x
+	select PXA_SHARPSL
 
-endchoice
+config MACH_SHEPHERD
+	bool "SHARP Shepherd (SL-C750)"
+	select PXA25x
+	select PXA_SHARPSL
 
+config MACH_HUSKY
+	bool "SHARP Husky (SL-C760)"
+	select PXA25x
+	select PXA_SHARPSL
+
+endchoice
 
 endmenu
 
+config PXA_SHARPSL
+	bool "SHARP SL-Cxxx Series"
+
+config SHARP_LOCOMO
+	bool "SHARP LoCoMo support"
+	default Y
+	depends MACH_POODLE || PXA_SHARPSL
+
 config PXA25x
 	bool
 	help
--- linux2/arch/arm/mach-pxa/Makefile~corgi_base-r0.patch
+++ linux2/arch/arm/mach-pxa/Makefile
@@ -12,6 +12,9 @@
 obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
 obj-$(CONFIG_ARCH_PXA_IDP)	+= idp.o
 obj-$(CONFIG_MACH_POODLE)	+= poodle.o
+obj-$(CONFIG_MACH_CORGI)	+= corgi.o
+obj-$(CONFIG_MACH_SHEPHERD)	+= corgi.o
+obj-$(CONFIG_MACH_HUSKY)	+= corgi.o corgi_ssp.o corgi_backlight.o corgi_param.o
 
 # Support for blinky lights
 led-y := leds.o
--- /dev/null
+++ linux2/arch/arm/mach-pxa/corgi.c
@@ -0,0 +1,181 @@
+/*
+ * linux/arch/arm/mach-pxa/corgi.c
+ *
+ *  Support for the SHARP Corgi Board.
+ *  
+ *  Copyright:	Lineo Japan Inc.
+ *
+ * Based on:
+ *  linux/arch/arm/mach-pxa/lubbock.c
+ *
+ *  Support for the Intel DBPXA250 Development Platform.
+ *  
+ *  Author:	Nicolas Pitre
+ *  Created:	Jun 15, 2001
+ *  Copyright:	MontaVista Software Inc.
+ *  
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation.
+ *
+ * Change Log
+ *  12-Dec-2002 Sharp Corporation for Corgi
+ *  01-Apr-2003 Sharp for Shepherd
+ *
+ *  Mar 10, 2004: Lots of changes to port to 2.6 by John Lenz
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/major.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+
+#include <asm/setup.h>
+#include <asm/memory.h>
+#include <asm/mach-types.h>
+#include <asm/hardware.h>
+#include <asm/irq.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/pxa-regs.h>
+#include <asm/arch/irq.h>
+#include <asm/arch/corgi.h>
+
+#include "generic.h"
+
+extern void corgi_ssp_init(void);
+extern void corgi_get_param(void);
+
+#if defined(CONFIG_MACH_SHEPHERD) || defined(CONFIG_MACH_HUSKY)
+#define	MEM_SIZE (64*1024*1024)
+#else
+#define	MEM_SIZE (32*1024*1024)
+#endif
+
+static void __init scoop_init(void)
+{
+	static const unsigned long scp_init[] =
+	{
+		CORGI_SCP_INIT_DATA(CORGI_SCP_MCR,0x0140),  // 00
+		CORGI_SCP_INIT_DATA(CORGI_SCP_MCR,0x0100),
+		CORGI_SCP_INIT_DATA(CORGI_SCP_CDR,0x0000),  // 04
+		CORGI_SCP_INIT_DATA(CORGI_SCP_CPR,0x0000),  // 0C
+		CORGI_SCP_INIT_DATA(CORGI_SCP_CCR,0x0000),  // 10
+		CORGI_SCP_INIT_DATA(CORGI_SCP_IMR,0x0000),  // 18
+		CORGI_SCP_INIT_DATA(CORGI_SCP_IRM,0x00FF),  // 14
+		CORGI_SCP_INIT_DATA(CORGI_SCP_ISR,0x0000),  // 1C
+		CORGI_SCP_INIT_DATA(CORGI_SCP_IRM,0x0000),
+		CORGI_SCP_INIT_DATA(CORGI_SCP_GPCR,CORGI_SCP_IO_DIR),  // 20
+		CORGI_SCP_INIT_DATA(CORGI_SCP_GPWR,CORGI_SCP_IO_OUT),  // 24
+		CORGI_SCP_INIT_DATA_END
+	};
+	int	i;
+	for(i=0; scp_init[i] != CORGI_SCP_INIT_DATA_END; i++)
+	{
+		int	adr = scp_init[i] >> 16;
+		CORGI_SCP_REG(adr) = scp_init[i] & 0xFFFF;
+	}
+}
+
+static spinlock_t scoop_lock = SPIN_LOCK_UNLOCKED;
+
+unsigned short set_scoop_gpio(unsigned short bit)
+{
+	unsigned short gpio_bit;
+	unsigned long flag;
+
+	spin_lock_irqsave(&scoop_lock, flag);
+	gpio_bit = CORGI_SCP_REG_GPWR | bit;
+	CORGI_SCP_REG_GPWR = gpio_bit;
+	spin_unlock_irqrestore(&scoop_lock, flag);
+
+	return gpio_bit;
+}
+
+unsigned short reset_scoop_gpio(unsigned short bit)
+{
+	unsigned short gpio_bit;
+	unsigned long flag;
+
+	spin_lock_irqsave(&scoop_lock, flag);
+	gpio_bit = CORGI_SCP_REG_GPWR & ~bit;
+	CORGI_SCP_REG_GPWR = gpio_bit;
+	spin_unlock_irqrestore(&scoop_lock, flag);
+
+	return gpio_bit;
+}
+
+static void __init corgi_init_irq(void)
+{
+	pxa_init_irq();
+
+	/* setup extra corgi irqs */
+
+	/* i2c initialize */
+	//i2c_init(); RPP Fixme!
+
+	/* scoop initialize */
+	scoop_init();
+
+	/* initialize SSP & CS */
+	corgi_ssp_init();
+}
+
+static void __init corgi_init(void)
+{
+	
+}
+
+
+
+static void __init fixup_corgi(struct machine_desc *desc, 
+		struct tag *tags, char **cmdline, struct meminfo *mi)
+{
+   corgi_get_param();
+}
+
+
+static struct map_desc corgi_io_desc[] __initdata = {
+ /* virtual     physical    length      */
+//  { 0xf1000000, 0x08000000, 0x01000000, MT_DEVICE }, /* LCDC (readable for Qt driver) */
+  { 0xef700000, 0x10800000, 0x00001000, MT_DEVICE }, /* SCOOP */
+  { 0xef800000, 0x00000000, 0x00800000, MT_DEVICE }, /* Boot Flash */
+};
+
+static void __init corgi_map_io(void)
+{
+	pxa_map_io();
+	iotable_init(corgi_io_desc,ARRAY_SIZE(corgi_io_desc));
+
+	/* setup sleep mode values */
+	PWER  = 0x00000002;
+	PFER  = 0x00000000;
+	PRER  = 0x00000002;
+	PGSR0 = 0x0158C000;
+	PGSR1 = 0x00FF0080;
+	PGSR2 = 0x0001C004;
+	PCFR |= PCFR_OPDE;
+}
+
+#if defined(CONFIG_MACH_HUSKY)
+MACHINE_START(HUSKY, "SHARP Husky")
+#elif defined(CONFIG_MACH_SHEPHERD)
+MACHINE_START(SHEPHERD, "SHARP Shepherd")
+#else
+MACHINE_START(CORGI, "SHARP Corgi")
+#endif
+	BOOT_MEM(0xa0000000, 0x40000000, io_p2v(0x40000000))
+	FIXUP(fixup_corgi)
+	MAPIO(corgi_map_io)
+	INITIRQ(corgi_init_irq)
+	INIT_MACHINE(corgi_init)	
+	.timer = &pxa_timer,
+MACHINE_END
+
+EXPORT_SYMBOL(set_scoop_gpio);
+EXPORT_SYMBOL(reset_scoop_gpio);
--- /dev/null
+++ linux2/include/asm-arm/arch-pxa/corgi.h
@@ -0,0 +1,169 @@
+/*
+ * linux/include/asm-arm/arch-pxa/corgi.h
+ * 
+ * (C) Copyright 2001 Lineo Japan, Inc.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * Based on:
+ *
+ * linux/include/asm-arm/arch-sa1100/collie.h
+ * 
+ * This file contains the hardware specific definitions for Corgi
+ *
+ * ChangeLog:
+ *   04-06-2001 Lineo Japan, Inc.
+ *   04-16-2001 SHARP Corporation
+ *
+ *   Mar 10, 2004: Updates to 2.6 by John Lenz
+ */
+#ifndef __ASM_ARCH_CORGI_H
+#define __ASM_ARCH_CORGI_H  1
+
+
+/*
+ * SCOOP internal I/O mappings
+ *
+ * We have the following mapping:
+ *      phys            virt
+ *      10800000        ef700000
+ */
+
+#define CF_BUF_CTRL_BASE 0xef700000
+
+#define	CORGI_SCP_REG(adr) (*(volatile unsigned short*)(CF_BUF_CTRL_BASE+(adr)))
+
+#define	CORGI_SCP_MCR  0x00
+#define	CORGI_SCP_CDR  0x04
+#define	CORGI_SCP_CSR  0x08
+#define	CORGI_SCP_CPR  0x0C
+#define	CORGI_SCP_CCR  0x10
+#define	CORGI_SCP_IRR  0x14
+#define	CORGI_SCP_IRM  0x14
+#define	CORGI_SCP_IMR  0x18
+#define	CORGI_SCP_ISR  0x1C
+#define	CORGI_SCP_GPCR 0x20
+#define	CORGI_SCP_GPWR 0x24
+#define	CORGI_SCP_GPRR 0x28
+#define	CORGI_SCP_REG_MCR	CORGI_SCP_REG(CORGI_SCP_MCR)
+#define	CORGI_SCP_REG_CDR	CORGI_SCP_REG(CORGI_SCP_CDR)
+#define	CORGI_SCP_REG_CSR	CORGI_SCP_REG(CORGI_SCP_CSR)
+#define	CORGI_SCP_REG_CPR	CORGI_SCP_REG(CORGI_SCP_CPR)
+#define	CORGI_SCP_REG_CCR	CORGI_SCP_REG(CORGI_SCP_CCR)
+#define	CORGI_SCP_REG_IRR	CORGI_SCP_REG(CORGI_SCP_IRR)
+#define	CORGI_SCP_REG_IRM	CORGI_SCP_REG(CORGI_SCP_IRM)
+#define	CORGI_SCP_REG_IMR	CORGI_SCP_REG(CORGI_SCP_IMR)
+#define	CORGI_SCP_REG_ISR	CORGI_SCP_REG(CORGI_SCP_ISR)
+#define	CORGI_SCP_REG_GPCR	CORGI_SCP_REG(CORGI_SCP_GPCR)
+#define	CORGI_SCP_REG_GPWR	CORGI_SCP_REG(CORGI_SCP_GPWR)
+#define	CORGI_SCP_REG_GPRR	CORGI_SCP_REG(CORGI_SCP_GPRR)
+
+#define CORGI_SCP_GPCR_PA22	( 1 << 12 )
+#define CORGI_SCP_GPCR_PA21	( 1 << 11 )
+#define CORGI_SCP_GPCR_PA20	( 1 << 10 )
+#define CORGI_SCP_GPCR_PA19	( 1 << 9 )
+#define CORGI_SCP_GPCR_PA18	( 1 << 8 )
+#define CORGI_SCP_GPCR_PA17	( 1 << 7 )
+#define CORGI_SCP_GPCR_PA16	( 1 << 6 )
+#define CORGI_SCP_GPCR_PA15	( 1 << 5 )
+#define CORGI_SCP_GPCR_PA14	( 1 << 4 )
+#define CORGI_SCP_GPCR_PA13	( 1 << 3 )
+#define CORGI_SCP_GPCR_PA12	( 1 << 2 )
+#define CORGI_SCP_GPCR_PA11	( 1 << 1 )
+
+
+/*
+ * GPIOs
+ */
+#define CORGI_SCP_LED_GREEN		CORGI_SCP_GPCR_PA11
+#define CORGI_SCP_SWA			CORGI_SCP_GPCR_PA12
+#define CORGI_SCP_SWB			CORGI_SCP_GPCR_PA13
+#define CORGI_SCP_MUTE_L		CORGI_SCP_GPCR_PA14
+#define CORGI_SCP_MUTE_R		CORGI_SCP_GPCR_PA15
+#define CORGI_SCP_AKIN_PULLUP		CORGI_SCP_GPCR_PA16
+#define CORGI_SCP_APM_ON		CORGI_SCP_GPCR_PA17
+#define CORGI_SCP_BACKLIGHT_CONT	CORGI_SCP_GPCR_PA18
+#define CORGI_SCP_MIC_BIAS		CORGI_SCP_GPCR_PA19
+
+
+#define CORGI_SCP_IO_DIR	( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \
+				  CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \
+				  CORGI_SCP_MIC_BIAS )
+#define CORGI_SCP_IO_OUT	( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
+#define CORGI_GPIO_CO		16
+
+#define	CORGI_SCP_INIT_DATA(adr,dat)	(((adr)<<16)|(dat))
+#define	CORGI_SCP_INIT_DATA_END	((unsigned long)-1)
+
+/*
+CORGI_ * LED
+ */
+#define CORGI_GPIO_LED_ORANGE		(13)
+//#define CORGI_SCP_LED_GREEN		CORGI_SCP_GPCR_PA11
+
+
+/*
+ * GPIOs
+ */
+/* PXA GPIOs */
+#define CORGI_GPIO_KEY_INT		(0)	/* key interrupt */
+#define CORGI_GPIO_AC_IN		(1)
+#define CORGI_GPIO_TP_INT		(5)	/* Touch Panel interrupt */
+#define CORGI_GPIO_WAKEUP		(3)
+#define CORGI_GPIO_IR_ON		(22)
+#define CORGI_GPIO_AK_INT		(4)	// Remote Controller
+#define CORGI_GPIO_HP_IN		GPIO_AK_INT
+#define CORGI_GPIO_CF_IRQ		(17)
+//#define CORGI_GPIO_CF_PRDY		(17)
+#define CORGI_GPIO_LED_ORANGE		(13)
+#define CORGI_GPIO_CF_CD		(14)
+#define CORGI_GPIO_SD_PWR		(33)
+#define CORGI_GPIO_nSD_CLK		(6)
+#define CORGI_GPIO_nSD_WP		(7)
+#define CORGI_GPIO_nSD_INT		(10)
+#define CORGI_GPIO_nSD_DETECT		(9)
+#define CORGI_GPIO_MAIN_BAT_LOW		(11)
+#define CORGI_GPIO_BAT_COVER		(11)
+#define CORGI_GPIO_ADC_TEMP_ON		(21)
+#define CORGI_GPIO_CHRG_ON		(38)
+#define CORGI_GPIO_CHRG_FULL		(16)
+#define CORGI_GPIO_USB_PULLUP		(45)
+#define CORGI_GPIO_HSYNC		(44)
+
+/* KeyBoard */
+#define CORGI_KEY_STROBE_NUM		(12)
+#define CORGI_KEY_SENSE_NUM		(8)
+#define CORGI_GPIO_ALL_STROBE_BIT	(0x00003ffc)
+#define CORGI_GPIO_HIGH_SENSE_BIT	(0xfc000000)
+#define CORGI_GPIO_HIGH_SENSE_RSHIFT	(26)
+#define CORGI_GPIO_LOW_SENSE_BIT	(0x00000003)
+#define CORGI_GPIO_LOW_SENSE_LSHIFT	(6)
+#define CORGI_GPIO_STROBE_BIT(a)	GPIO_bit(66+(a))
+#define CORGI_GPIO_SENSE_BIT(a)		GPIO_bit(58+(a))
+#define CORGI_GAFR_ALL_STROBE_BIT	(0x0ffffff0)
+#define CORGI_GAFR_HIGH_SENSE_BIT	(0xfff00000)
+#define CORGI_GAFR_LOW_SENSE_BIT	(0x0000000f)
+#define CORGI_GPIO_KEY_SENSE(a)		(58+(a))
+
+
+/*
+ * Interrupts
+ */
+/* PXA GPIOs */
+#define CORGI_IRQ_GPIO_KEY_INT		IRQ_GPIO(0)
+#define CORGI_IRQ_GPIO_AC_IN		IRQ_GPIO(1)
+#define CORGI_IRQ_GPIO_AK_INT		IRQ_GPIO(4)
+#define CORGI_IRQ_GPIO_HP_IN		IRQ_GPIO_AK_INT
+#define CORGI_IRQ_GPIO_TP_INT		IRQ_GPIO(5)
+#define CORGI_IRQ_GPIO_WAKEUP		IRQ_GPIO(3)
+#define CORGI_IRQ_GPIO_CO		IRQ_GPIO(16)
+#define CORGI_IRQ_GPIO_CF_IRQ		IRQ_GPIO(17)
+#define CORGI_IRQ_GPIO_CF_CD		IRQ_GPIO(14)
+#define CORGI_IRQ_GPIO_nSD_INT		IRQ_GPIO(10)
+#define CORGI_IRQ_GPIO_nSD_DETECT	IRQ_GPIO(9)
+#define CORGI_IRQ_GPIO_MAIN_BAT_LOW	IRQ_GPIO(11)
+#define CORGI_IRQ_GPIO_KEY_SENSE(a)	IRQ_GPIO(58+(a))
+
+#endif /* __ASM_ARCH_CORGI_H  */
+