diff --git a/sound/Kconfig b/sound/Kconfig index b65ee47..76cfa2f 100644 --- a/sound/Kconfig +++ b/sound/Kconfig @@ -74,6 +74,8 @@ source "sound/sparc/Kconfig" source "sound/parisc/Kconfig" +source "sound/soc/Kconfig" + endmenu menu "Open Sound System" diff --git a/sound/Makefile b/sound/Makefile index f352bb2..213e267 100644 --- a/sound/Makefile +++ b/sound/Makefile @@ -4,7 +4,7 @@ obj-$(CONFIG_SOUND) += soundcore.o obj-$(CONFIG_SOUND_PRIME) += oss/ obj-$(CONFIG_DMASOUND) += oss/ -obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ +obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/ ifeq ($(CONFIG_SND),y) obj-y += last.o diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig new file mode 100644 index 0000000..ff7d725 --- /dev/null +++ b/sound/soc/Kconfig @@ -0,0 +1,30 @@ +# +# SoC audio configuration +# + +menu "SoC audio support" + +config SND_SOC + tristate "SoC audio support" + ---help--- + + If you want SoC support, you should say Y here and also to the + specific driver for your SoC below. You will also need to select the + specific codec(s) attached to the SoC + + This SoC audio support can also be built as a module. If so, the module + will be called snd-soc-core. + +# All the supported Soc's +menu "Soc Platforms" +depends on SND_SOC +source "sound/soc/pxa/Kconfig" +endmenu + +# Supported codecs +menu "Soc Codecs" +depends on SND_SOC +source "sound/soc/codecs/Kconfig" +endmenu + +endmenu diff --git a/sound/soc/Makefile b/sound/soc/Makefile new file mode 100644 index 0000000..11d39f5 --- /dev/null +++ b/sound/soc/Makefile @@ -0,0 +1,5 @@ + +snd-soc-core-objs := soc-core.o soc-dpm.o + +obj-$(CONFIG_SND_SOC) += snd-soc-core.o +obj-$(CONFIG_SND_SOC) += pxa/ codecs/ diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig new file mode 100644 index 0000000..93493a9 --- /dev/null +++ b/sound/soc/codecs/Kconfig @@ -0,0 +1,11 @@ +config SND_SOC_WM8753 + tristate "SoC driver for the WM8753 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8753 codec. + +config SND_SOC_WM9713_VOICE + tristate "SoC driver for the WM9713 Voice codec" + depends SND_SOC + help + Say Y or M if you want to support the WM9713 voice codec. diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile new file mode 100644 index 0000000..4c9814c --- /dev/null +++ b/sound/soc/codecs/Makefile @@ -0,0 +1,5 @@ +snd-wm8753-objs := wm8753.o +snd-wm9713-voice-objs := wm9713-voice.o + +obj-$(CONFIG_SND_SOC_WM8753) += snd-wm8753.o +obj-$(CONFIG_SND_SOC_WM9713_VOICE) += snd-wm9713-voice.o diff --git a/sound/soc/codecs/wm8753.c b/sound/soc/codecs/wm8753.c new file mode 100644 index 0000000..db651c5 --- /dev/null +++ b/sound/soc/codecs/wm8753.c @@ -0,0 +1,1189 @@ +/* + * wm8753.c -- WM8753 Soc Audio driver + * + * Copyright 2003 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Notes: + * The WM8753 is a low power, high quality stereo codec with integrated PCM + * codec designed for portable digital telephony applications. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wm8753.h" + +#define AUDIO_NAME "wm8753" +#define WM8753_VERSION "0.1" + + +/* + * Debug + */ + +#define PFX AUDIO_NAME +#define WM8753_DEBUG 0 + +#ifdef WM8753_DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) + + +static int hifi = 1; +module_param(hifi, int, 0); +MODULE_PARM_DESC(hifi, "enable AUX ADC sysfs entries"); + +static int voice = 1; +module_param(voice, int, 0); +MODULE_PARM_DESC(voice, "enable codec status sysfs entries"); + + +/* + * WM8753 2 wire address is determined by GPIO5 + * state during powerup. + * low = WM8753_2W_ADDR1 + * high = WM8753_2W_ADDR2 + */ +#define WM8753_2W_ADDR1 0x1a +#define WM8753_2W_ADDR2 0x1b +#define I2C_DRIVERID_WM8753 0xfefe + + +static unsigned short normal_i2c[] = { WM8753_2W_ADDR1, WM8753_2W_ADDR2, + I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +struct wm8753_ { + struct i2c_client *i2c; + snd_pcm_t *pcm_voice; + snd_pcm_t *pcm_hifi; +}; +static struct wm8753_ wm8753; + +/* + * wm8753 register cache + * We can't read the WM8753 register space when we + * are using 2 wire for device control, so we cache them instead. + */ +static u16 reg_cache[] = { + 0x0008, 0x0000, 0x000a, 0x000a, + 0x0033, 0x0000, 0x0007, 0x00ff, + 0x00ff, 0x000f, 0x000f, 0x007b, + 0x0000, 0x0032, 0x0000, 0x00c3, + 0x00c3, 0x00c0, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0055, + 0x0005, 0x0050, 0x0055, 0x0050, + 0x0055, 0x0050, 0x0055, 0x0079, + 0x0079, 0x0079, 0x0079, 0x0079, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0097, 0x0097, 0x0000, 0x0004, + 0x0000, 0x0083, 0x0024, 0x01ba, + 0x0000, 0x0083, 0x0024, 0x01ba, + 0x0000, 0x0000 +}; + +/* PLL divisors */ +struct _pll_div { + u32 hz; + u32 n; + u32 k; +}; + +/* + * MCLCK crystal frequency + */ +#define MCLK_13MHZ + +static struct _pll_div pll_div[] = { +#ifdef MCLK_13MHZ + {12288000, 0x7, 0x23F54A}, + {11289600, 0x6, 0x3CA2F5}, +#endif +#ifdef MCLK_12MHZ + {12288000, 0x8, 0x0C49BA}, + {11289600, 0x7, 0x21B08A}, +#endif +#ifdef MCLK_12_288MHZ + {12288000, 0x0, 0x000000}, + {11289600, 0x7, 0x166667}, +#endif + {0, 0, 0} /* must be last */ +}; + +#define WM8753_HIFI_HWFMT \ + (SND_SOC_HWFMT_I2S | SND_SOC_HWFMT_LEFT_J | SND_SOC_HWFMT_RIGHT_J | \ + SND_SOC_HWFMT_CBM_CFM | SND_SOC_HWFMT_CBM_CFS | SND_SOC_HWFMT_CBS_CFS | \ + SND_SOC_HWFMT_NB_NF | SND_SOC_HWFMT_NB_IF | SND_SOC_HWFMT_IB_NF | \ + SND_SOC_HWFMT_IB_IF) + +/* + * priv1 is pll/mclk freq + * priv2 is bits[15..8] = MCLK divisor, bits[7..0] = sr + */ +static snd_soc_hw_mode_t wm8753_hifi[] = { + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 8000, 768, 12288000, 0x020c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 8000, 384, 12288000, 0x040c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 8000, 192, 12288000, 0x080c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 8000, 96, 12288000, 0x100c}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 11025, 512, 11289600, 0x0230}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 11025, 256, 11289600, 0x0430}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 11025, 128, 11289600, 0x0830}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 11025, 64, 11289600, 0x1030}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 12000, 512, 12288000, 0x0210}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 12000, 256, 12288000, 0x0410}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 12000, 128, 12288000, 0x0810}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 12000, 64, 12288000, 0x1010}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 16000, 384, 12288000, 0x0214}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 16000, 192, 12288000, 0x0414}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 16000, 96, 12288000, 0x0814}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 16000, 48, 12288000, 0x1014}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 22050, 512, 11289600, 0x0034}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 22050, 256, 11289600, 0x0234}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 22050, 128, 11289600, 0x0434}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 22050, 64, 11289600, 0x0834}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 22050, 32, 11289600, 0x1034}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 24000, 512, 12288000, 0x0038}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 24000, 256, 12288000, 0x0238}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 24000, 128, 12288000, 0x0438}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 24000, 64, 12288000, 0x0838}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 24000, 32, 12288000, 0x1038}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 32000, 384, 12288000, 0x0018}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 32000, 192, 12288000, 0x0218}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 32000, 96, 12288000, 0x0418}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 32000, 48, 12288000, 0x0818}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 44100, 256, 11289600, 0x0020}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 44100, 128, 11289600, 0x0220}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 44100, 64, 11289600, 0x0420}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 44100, 32, 11289600, 0x0820}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 48000, 256, 12288000, 0x0000}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 48000, 128, 12288000, 0x0200}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 48000, 64, 12288000, 0x0400}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 48000, 32, 12288000, 0x0800}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 88200, 128, 11289600, 0x003c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 88200, 64, 11289600, 0x023c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 88200, 32, 11289600, 0x043c}, + + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 96000, 128, 12288000, 0x001c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 96000, 64, 12288000, 0x021c}, + {WM8753_HIFI_HWFMT, SND_SOC_HWBITS(16), 96000, 32, 12288000, 0x041c}, +}; + +#define WM8753_VOICE_HWFMT \ + (SND_SOC_HWFMT_I2S | SND_SOC_HWFMT_LEFT_J | SND_SOC_HWFMT_RIGHT_J | \ + SND_SOC_HWFMT_DSP_A | SND_SOC_HWFMT_DSP_B | SND_SOC_HWFMT_CBM_CFM | \ + SND_SOC_HWFMT_CBM_CFS | SND_SOC_HWFMT_CBS_CFS | SND_SOC_HWFMT_NB_NF | \ + SND_SOC_HWFMT_NB_IF | SND_SOC_HWFMT_IB_NF | SND_SOC_HWFMT_IB_IF) + +/* + * priv1 is pll/mclk freq + * priv2 is bits[15..8] = PCM divisor, bits[7..0] = psr + */ +static snd_soc_hw_mode_t wm8753_voice[] = { + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 48000, 256, 12288000, 0x0000}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 44100, 256, 11289600, 0x0000}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 32000, 384, 12288000, 0x0001}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 24000, 256, 12288000, 0x0400}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 22050, 256, 11289600, 0x0400}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 16000, 256, 12288000, 0x0200}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 16000, 384, 12288000, 0x0401}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 8000, 256, 12288000, 0x0600}, + {WM8753_VOICE_HWFMT, SND_SOC_HWBITS(16), 8000, 384, 12288000, 0x0501}, +}; + +/* + * read wm8753 register cache + */ +static inline unsigned int wm8753_read_reg_cache(u16 reg) +{ + return reg_cache[reg - 1]; +} + +/* + * write wm8753 register cache + */ +static inline void wm8753_write_reg_cache(u16 reg, unsigned int value) +{ + reg_cache[reg - 1] = value; +} + +static struct i2c_client client_template; +static int wm8753_reset(struct i2c_client *client); + +/* + * Attach WM8753 2 wire client + */ +static int wm8753_i2c_probe(struct i2c_adapter *adap, int addr, int kind) +{ + client_template.adapter = adap; + client_template.addr = addr; + + if ((wm8753.i2c = kmalloc(sizeof(struct i2c_client),GFP_KERNEL)) == NULL) + return -ENOMEM; + + memcpy(wm8753.i2c, &client_template, sizeof(struct i2c_client)); + //wm8753_2w_client->data = (void*)&wm8753; + + if (wm8753_reset(wm8753.i2c) != 0) { + kfree (wm8753.i2c); + err("cannot reset the WM8753"); + return -EIO; + } + + return i2c_attach_client(wm8753.i2c); +} + +static int wm8753_i2c_detach(struct i2c_client *client) +{ + i2c_detach_client(client); + kfree(client); + return 0; +} + +static int wm8753_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, wm8753_i2c_probe); +} + +/* WM8753 2 Wire layer */ +static struct i2c_driver wm8753_i2c_driver = { + name: "i2c wm8753 driver", + id: I2C_DRIVERID_WM8753, + flags: I2C_DF_NOTIFY, + attach_adapter: wm8753_i2c_attach, + detach_client: wm8753_i2c_detach, + command: NULL, +}; + +static struct i2c_client client_template = { + name: "WM8753", + flags: I2C_CLIENT_ALLOW_USE, + driver: &wm8753_i2c_driver, +}; + +/* + * write to the WM8753 register space + */ +static int wm8753_2w_write(struct i2c_client *client, u8 reg, u16 value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8753 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8753_write_reg_cache (reg, value); + if (i2c_master_send(client, data, 2) == 2) + return 0; + else + return -1; +} + +static int wm8753_write (u16 reg, unsigned int value) +{ + return wm8753_2w_write(wm8753.i2c, reg, value); +} + +/* + * reset the WM8753 + */ +static int wm8753_reset(struct i2c_client *client) +{ + return wm8753_2w_write (client, WM8753_RESET, 0); +} + +static const char* wm8753_base[] = {"Linear Control", "Adaptive Boost"}; +static const char* wm8753_base_filter[] = + {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz", + "100Hz @ 8kHz", "200Hz @ 8kHz"}; +static const char* wm8753_treble[] = {"8kHz", "4kHz"}; +static const char* wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"}; +static const char* wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"}; +static const char* wm8753_3d_func[] = {"Capture", "Playback"}; +static const char* wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"}; +static const char* wm8753_3d_lc[] = {"200Hz", "500Hz"}; +static const char* wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"}; +static const char* wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"}; +static const char* wm8753_dac_phase[] = {"Non Inverted", "Inverted"}; +static const char* wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2", + "Line 1", "Line 2"}; +static const char* wm8753_mono_mux[] = {"Line Mix", "Rx Mix"}; +static const char* wm8753_right_mux[] = {"Line 2", "Rx Mix"}; +static const char* wm8753_left_mux[] = {"Line 1", "Rx Mix"}; +static const char* wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"}; +static const char* wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2", "Right PGA"}; +static const char* wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right", "Left + Right"}; +static const char* wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"}; +static const char* wm8753_out4[] = {"VREF", "LOUT2", "Left + Right"}; +static const char* wm8753_radcsel[] = {"PGA", "Line 2 or RXP-RXN", "Left + Right + Mono Mix"}; +static const char* wm8753_ladcsel[] = {"PGA", "Line 1 or RXP-RXN", "Line 1 DC"}; +static const char* wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left", "Analogue Mix Right", + "Digital Mono Mix"}; +static const char* wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k", "82Hz @ 8kHz", "170Hz @ 8kHz"}; +static const char* wm8753_adc_filter[] = {"HiFi", "Voice"}; + +static const struct soc_enum wm8753_enum[] = { +SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base), +SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter), +SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble), +SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func), +SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type), +SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func), +SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc), +SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc), +SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp), +SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix), +SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase), +SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix), +SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux), +SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux), +SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux), +SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel), +SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux), +SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src), +SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3), +SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out4), +SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel), +SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel), +SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc), +SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp), +SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter), +}; + +static const snd_kcontrol_new_t wm8753_snd_controls[] = { +SOC_SINGLE("Left PCM Volume", WM8753_LDAC, 0, 255, 0), +SOC_SINGLE("Right PCM Volume", WM8753_RDAC, 0, 255, 0), + +SOC_SINGLE("Left ADC Volume", WM8753_LADC, 0, 63, 0), +SOC_SINGLE("Left ADC Switch", WM8753_LADC, 7, 1, 0), +SOC_SINGLE("Left ADC ZC Switch", WM8753_LADC, 6, 1, 0), +SOC_SINGLE("Right ADC Volume", WM8753_RADC, 0, 63, 0), +SOC_SINGLE("Right ADC Switch", WM8753_RADC, 7, 1, 0), +SOC_SINGLE("Right ADC ZC Switch", WM8753_RADC, 6, 1, 0), + +SOC_SINGLE("Left Out 1 Volume", WM8753_LOUT1V, 0, 127, 0), +SOC_SINGLE("Left Out 1 ZC Switch", WM8753_LOUT1V, 7, 1, 0), +SOC_SINGLE("Left Out 2 Volume", WM8753_LOUT2V, 0, 127, 0), +SOC_SINGLE("Left Out 2 ZC Switch", WM8753_LOUT2V, 7, 1, 0), + +SOC_SINGLE("Left Mux Left Mixer Volume", WM8753_LOUTM1, 4, 7, 1), + +SOC_SINGLE("Sidetone Left Mixer Volume", WM8753_LOUTM2, 4, 7, 1), +SOC_SINGLE("Voice Left Mixer Volume", WM8753_LOUTM2, 0, 7, 1), + +SOC_SINGLE("Right Out 1 Volume", WM8753_ROUT1V, 0, 127, 0), +SOC_SINGLE("Right Out 1 ZC Switch", WM8753_ROUT1V, 7, 1, 0), +SOC_SINGLE("Right Out 2 Volume", WM8753_ROUT2V, 0, 127, 0), +SOC_SINGLE("Right Out 2 ZC Switch", WM8753_ROUT2V, 7, 1, 0), + +SOC_SINGLE("Right Mux Right Mixer Volume", WM8753_ROUTM1, 4, 7, 1), + +SOC_SINGLE("Sidetone Right Mixer Volume", WM8753_ROUTM2, 4, 7, 1), +SOC_SINGLE("Voice Right Mixer Volume", WM8753_ROUTM2, 0, 7, 1), + +SOC_SINGLE("Mono Mux Mono Mixer Volume", WM8753_MOUTM1, 4, 7, 1), +SOC_SINGLE("Sidetone Mono Mixer Volume", WM8753_MOUTM2, 4, 7, 1), +SOC_SINGLE("Voice Mono Mixer Volume", WM8753_MOUTM2, 4, 7, 1), + +SOC_SINGLE("Mono Volume", WM8753_MOUTV, 0, 127, 0), +SOC_SINGLE("Mono ZC Switch", WM8753_MOUTV, 7, 1, 0), +SOC_ENUM("Mono 2 Out", wm8753_enum[17]), + +SOC_ENUM("Bass Boost", wm8753_enum[0]), +SOC_ENUM("Bass Filter", wm8753_enum[1]), +SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 7, 1), + +SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 7, 0), +SOC_ENUM("Treble Cut-off", wm8753_enum[2]), + +SOC_SINGLE("Capture Right Mix Switch", WM8753_RECMIX1, 7, 1, 0), +SOC_SINGLE("Capture Right Mix Volume", WM8753_RECMIX1, 4, 7, 1), +SOC_SINGLE("Capture Left Mix Switch", WM8753_RECMIX1, 3, 1, 0), +SOC_SINGLE("Capture Left Mix Volume", WM8753_RECMIX1, 0, 7, 1), +SOC_SINGLE("Capture Mono Mix Switch", WM8753_RECMIX2, 3, 1, 0), +SOC_SINGLE("Capture Mono Mix Volume", WM8753_RECMIX2, 0, 7, 1), + +SOC_SINGLE("Capture Left Volume", WM8753_LINVOL, 0, 63, 0), +SOC_SINGLE("Capture Left ZC Switch", WM8753_LINVOL, 6, 1, 0), +SOC_SINGLE("Capture Left Switch", WM8753_LINVOL, 7, 1, 1), +SOC_SINGLE("Capture Right Volume", WM8753_RINVOL, 0, 63, 0), +SOC_SINGLE("Capture Right ZC Switch", WM8753_RINVOL, 6, 1, 0), +SOC_SINGLE("Capture Right Switch", WM8753_RINVOL, 7, 1, 1), + +SOC_ENUM("Capture Mono Mix", wm8753_enum[20]), +SOC_ENUM("Capture Filter Select", wm8753_enum[22]), +SOC_ENUM("Capture Filter Cut-off", wm8753_enum[21]), +SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1), + +SOC_SINGLE("ALC Target Volume", WM8753_ALC1, 0, 7, 0), +SOC_SINGLE("ALC Max Volume", WM8753_ALC1, 4, 7, 0), +SOC_ENUM("ALC Function", wm8753_enum[3]), +SOC_SINGLE("ALC ZC Switch", WM8753_ALC2, 8, 1, 0), +SOC_SINGLE("ALC Hold Time", WM8753_ALC2, 0, 15, 1), +SOC_SINGLE("ALC Decay Time", WM8753_ALC3, 4, 15, 1), +SOC_SINGLE("ALC Attack Time", WM8753_ALC3, 0, 15, 0), +SOC_SINGLE("ALC NG Threshold", WM8753_NGATE, 3, 31, 0), +SOC_ENUM("ALC NG Type", wm8753_enum[4]), +SOC_SINGLE("ALC NG Switch", WM8753_NGATE, 0, 1, 0), + +SOC_ENUM("3D Function", wm8753_enum[5]), +SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]), +SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]), +SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0), +SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0), + +SOC_SINGLE("ADC 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0), +SOC_SINGLE("DAC 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0), + +SOC_ENUM("De-emphasis", wm8753_enum[8]), +SOC_SINGLE("DAC Switch", WM8753_DAC, 3, 1, 1), + +SOC_ENUM("DAC Mono Mix", wm8753_enum[9]), +SOC_ENUM("DAC Phase", wm8753_enum[10]), + +SOC_ENUM("Line Mix Select", wm8753_enum[11]), +SOC_ENUM("Mono Mux Select", wm8753_enum[12]), +SOC_ENUM("Right Mux Select", wm8753_enum[13]), +SOC_ENUM("Left Mux Select", wm8753_enum[14]), + +SOC_ENUM("Differential Mix", wm8753_enum[15]), +SOC_ENUM("Mic Sidetone Mux", wm8753_enum[16]), +SOC_SINGLE("ALC Mix Line Switch", WM8753_INCTL2, 3, 1, 0), +SOC_SINGLE("ALC Mix Mic 2 Switch", WM8753_INCTL2, 2, 1, 0), +SOC_SINGLE("ALC Mix Mic 1 Switch", WM8753_INCTL2, 1, 1, 0), +SOC_SINGLE("ALC Mix Rx Switch", WM8753_INCTL2, 0, 1, 0), + +SOC_ENUM("Out3 Output", wm8753_enum[18]), +SOC_ENUM("Out4 Output", wm8753_enum[19]), + +SOC_SINGLE("Mic 1 Amp Switch", WM8753_PWR2, 8, 1, 0), +SOC_SINGLE("Mic 2 Amp Switch", WM8753_PWR2, 7, 1, 0), +SOC_SINGLE("Mic 2 Volume", WM8753_INCTL1, 7, 3, 0), +SOC_SINGLE("Mic 1 Volume", WM8753_INCTL1, 5, 3, 0), + +}; + +/* add non dpm controls */ +static int wm8753_add_controls(snd_soc_codec_t *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8753_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, snd_soc_cnew(&wm8753_snd_controls[i],codec, NULL))) < 0) + return err; + } +} + +/* Left Mixer */ +static const snd_kcontrol_new_t wm8753_left_mixer_controls[] = { +SOC_DPM_SINGLE("Voice Switch", WM8753_LOUTM2, 8, 1, 0), +SOC_DPM_SINGLE("Sidetone Switch", WM8753_LOUTM2, 7, 1, 0), +SOC_DPM_SINGLE("DAC Switch", WM8753_LOUTM1, 8, 1, 0), +SOC_DPM_SINGLE("Capture Mux Switch", WM8753_LOUTM1, 7, 1, 0), +}; + +static const snd_soc_dpm_widget_t wm8753_left_mixer = +SND_SOC_DPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0, &wm8753_left_mixer_controls[0], + ARRAY_SIZE(wm8753_left_mixer_controls)); + +/* Left out 1 */ +static const snd_soc_dpm_widget_t wm8753_left_out1 = +SND_SOC_DPM_VOLUME("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0); + +/* Left out 2 */ +static const snd_soc_dpm_widget_t wm8753_left_out2 = +SND_SOC_DPM_VOLUME("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0); + +/* Left DAC */ +static const snd_soc_dpm_widget_t wm8753_left_dac = +SND_SOC_DPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0, NULL, 0); + +/* LOUT 1 */ +static const snd_soc_dpm_widget_t wm8753_lout1 = +SND_SOC_DPM_OUTPUT("LOUT1"); + +/* LOUT 2 */ +static const snd_soc_dpm_widget_t wm8753_lout2 = +SND_SOC_DPM_OUTPUT("LOUT2"); + +/* Right mixer */ +static const snd_kcontrol_new_t wm8753_right_mixer_controls[] = { +SOC_DPM_SINGLE("Voice Switch", WM8753_ROUTM2, 8, 1, 0), +SOC_DPM_SINGLE("Sidetone Switch", WM8753_ROUTM2, 7, 1, 0), +SOC_DPM_SINGLE("DAC Switch", WM8753_ROUTM1, 8, 1, 0), +SOC_DPM_SINGLE("Capture Mux Switch", WM8753_ROUTM1, 7, 1, 0), +}; + +static const snd_soc_dpm_widget_t wm8753_right_mixer = +SND_SOC_DPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0, &wm8753_right_mixer_controls[0], + ARRAY_SIZE(wm8753_right_mixer_controls)); + +/* Right out 1 */ +static const snd_soc_dpm_widget_t wm8753_right_out1 = +SND_SOC_DPM_VOLUME("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0); + +/* Right out 2 */ +static const snd_soc_dpm_widget_t wm8753_right_out2 = +SND_SOC_DPM_VOLUME("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0); + +/* Right DAC */ +static const snd_soc_dpm_widget_t wm8753_right_dac = +SND_SOC_DPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0, NULL, 0); + +/* ROUT 1 */ +static const snd_soc_dpm_widget_t wm8753_rout1 = +SND_SOC_DPM_OUTPUT("ROUT1"); + +/* ROUT 2 */ +static const snd_soc_dpm_widget_t wm8753_rout2 = +SND_SOC_DPM_OUTPUT("ROUT2"); + +/* Mono mixer */ +static const snd_kcontrol_new_t wm8753_mono_mixer_controls[] = { +SOC_DPM_SINGLE("Left Switch", WM8753_MOUTM1, 8, 1, 0), +SOC_DPM_SINGLE("Right Switch", WM8753_MOUTM2, 8, 1, 0), +SOC_DPM_SINGLE("DAC Switch", WM8753_MOUTM2, 4, 1, 0), +SOC_DPM_SINGLE("Sidetone Switch", WM8753_MOUTM2, 7, 1, 0), +SOC_DPM_SINGLE("Capture Mux Switch", WM8753_ROUTM1, 7, 1, 0), +}; + +static const snd_soc_dpm_widget_t wm8753_mono_mixer = +SND_SOC_DPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0, &wm8753_mono_mixer_controls[0], + ARRAY_SIZE(wm8753_mono_mixer_controls)); + +/* Mono out 1 */ +static const snd_soc_dpm_widget_t wm8753_mono_out1 = +SND_SOC_DPM_VOLUME("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0); + +/* Mono out 2 */ +static const snd_soc_dpm_widget_t wm8753_mono_out2 = +SND_SOC_DPM_VOLUME("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0); + +/* Voice DAC */ +static const snd_soc_dpm_widget_t wm8753_voice_dac = +SND_SOC_DPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0, NULL, 0); + +/* MONO 1 */ +static const snd_soc_dpm_widget_t wm8753_mono1 = +SND_SOC_DPM_OUTPUT("MONO1"); + +/* MONO 2 */ +static const snd_soc_dpm_widget_t wm8753_mono2 = +SND_SOC_DPM_OUTPUT("MONO2"); + +#if 0 +/* Out 3 Mux */ +static const snd_kcontrol_new_t wm8753_out3_controls[] = { +SOC_DPM_ENUM("Source", wm8753_enum[18]), +}; + +static const snd_soc_dpm_widget_t wm8753_out3_mux[] = { +SND_SOC_DPM_MUX("Out3 Mux", &wm8753_out3_controls[0], + ARRAY_SIZE(wm8753_out3_controls), + SND_SOC_DPM(-1, 0, 0)), +}; +#endif + + +/* + * VERY EXPERIMENTAL - + */ +static int wm8753_add_widgets(snd_soc_codec_t *codec) +{ + /* add dpm widgets - LIAM do in for LOOP */ + snd_soc_dpm_new_control(codec, &wm8753_left_mixer); + snd_soc_dpm_new_control(codec, &wm8753_right_mixer); + snd_soc_dpm_new_control(codec, &wm8753_mono_mixer); + snd_soc_dpm_new_control(codec, &wm8753_left_dac); + snd_soc_dpm_new_control(codec, &wm8753_right_dac); + snd_soc_dpm_new_control(codec, &wm8753_voice_dac); + snd_soc_dpm_new_control(codec, &wm8753_left_out1); + snd_soc_dpm_new_control(codec, &wm8753_right_out1); + snd_soc_dpm_new_control(codec, &wm8753_left_out2); + snd_soc_dpm_new_control(codec, &wm8753_right_out2); + snd_soc_dpm_new_control(codec, &wm8753_mono_out1); + snd_soc_dpm_new_control(codec, &wm8753_mono_out2); + snd_soc_dpm_new_control(codec, &wm8753_lout1); + snd_soc_dpm_new_control(codec, &wm8753_rout1); + snd_soc_dpm_new_control(codec, &wm8753_lout2); + snd_soc_dpm_new_control(codec, &wm8753_rout2); + snd_soc_dpm_new_control(codec, &wm8753_mono1); + snd_soc_dpm_new_control(codec, &wm8753_mono2); + + /* set up audio path interconnects */ + + /* left mixer */ + snd_soc_dpm_connect_input(codec, "Left Mixer", "DAC Switch", "Left DAC"); + snd_soc_dpm_connect_input(codec, "Left Mixer", "Voice Switch", "Voice DAC"); + //snd_soc_dpm_connect_input(codec, "Left Mixer", "Sidetone Switch", wm8753_left_mixer, wm8753_left_dac); + //snd_soc_dpm_connect_input(codec, "Left Mixer", "Voice Switch", wm8753_left_mixer, wm8753_left_dac); + //snd_soc_dpm_connect_input(codec, "Left Mixer", "Capture Mux Switch", wm8753_left_mixer, wm8753_left_dac); + + /* right mixer */ + snd_soc_dpm_connect_input(codec, "Right Mixer", "DAC Switch", "Right DAC"); + snd_soc_dpm_connect_input(codec, "Right Mixer", "Voice Switch", "Voice DAC"); + //soc_connect_widget_input("Sidetone Switch", wm8753_left_mixer, wm8753_left_dac); + //soc_connect_widget_input("Voice Switch", wm8753_left_mixer, wm8753_left_dac); + //soc_connect_widget_input("Capture Mux Switch", wm8753_left_mixer, wm8753_left_dac); + + /* mono mixer */ + snd_soc_dpm_connect_input(codec, "Mono Mixer", "DAC Switch", "Voice DAC"); + snd_soc_dpm_connect_input(codec, "Mono Mixer", "Left Switch", "Left DAC"); + snd_soc_dpm_connect_input(codec, "Mono Mixer", "Right Switch", "Right DAC"); + //soc_connect_widget_input("Sidetone Switch", wm8753_left_mixer, wm8753_left_dac); + //soc_connect_widget_input("Voice Switch", wm8753_left_mixer, wm8753_left_dac); + //soc_connect_widget_input("Capture Mux Switch", wm8753_left_mixer, wm8753_left_dac); + + /* left out */ + snd_soc_dpm_connect_input(codec, "Left Out 1", NULL, "Left Mixer"); + snd_soc_dpm_connect_input(codec, "Left Out 2", NULL, "Left Mixer"); + snd_soc_dpm_connect_input(codec, "LOUT1", NULL, "Left Out 1"); + snd_soc_dpm_connect_input(codec, "LOUT2", NULL, "Left Out 2"); + + /* right out */ + snd_soc_dpm_connect_input(codec, "Right Out 1", NULL, "Right Mixer"); + snd_soc_dpm_connect_input(codec, "Right Out 2", NULL, "Right Mixer"); + snd_soc_dpm_connect_input(codec, "ROUT1", NULL, "Right Out 1"); + snd_soc_dpm_connect_input(codec, "ROUT2", NULL, "Right Out 2"); + + /* mono out */ + snd_soc_dpm_connect_input(codec, "Mono Out 1", NULL, "Mono Mixer"); + //snd_soc_dpm_connect_input(codec, "Right Out 2", NULL, "Right Mixer"); + snd_soc_dpm_connect_input(codec, "MONO1", NULL, "Mono Out 1"); + //snd_soc_dpm_connect_input(codec, "ROUT2", NULL, "Right Out 2"); + + snd_soc_dpm_sync(codec); +} + +/* + * set the PLL2 to generate 12.288MHz and then div by 6 to generate + * DAC/ADC clocks from 12MHz MCLK + */ +static u32 wm8753_config_pll(int pll, u32 speed) +{ + u16 clk; + printk("config pll %d %d\n", pll, speed); + + if (pll == 1) { + clk = wm8753_read_reg_cache(WM8753_CLOCK) & 0x0010; + if (!speed) { + /* disable PLL1 */ + wm8753_2w_write(wm8753.i2c, WM8753_PLL1CTL1, 0x0026); + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, clk); + } else { + u16 value = 0; + int i = 0; + + /* if we cant match, then use good values for N and K */ + for (;i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].hz == speed) + break; + } + + /* do we need to enable the PLL ? */ + if (!pll_div[i].n) { + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, 0x0); + return 0; + } + + /* set up N and K PLL divisor ratios */ + /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ + value = (pll_div[i].n << 5) + ((pll_div[i].k & 0x3c0000) >> 18); + wm8753_2w_write(wm8753.i2c, WM8753_PLL1CTL2, value); + + /* bits 8:0 = PLL_K[17:9] */ + value = (pll_div[i].k & 0x03fe00) >> 9; + wm8753_2w_write(wm8753.i2c, WM8753_PLL1CTL3, value); + + /* bits 8:0 = PLL_K[8:0] */ + value = pll_div[i].k & 0x0001ff; + wm8753_2w_write(wm8753.i2c, WM8753_PLL1CTL4, value); + + /* set PLL1 as input and enable */ + wm8753_2w_write(wm8753.i2c, WM8753_PLL1CTL1, 0x0027); + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, clk | 0x0010); + } + } else { + clk = wm8753_read_reg_cache(WM8753_CLOCK) & 0x0008; + if (!speed) { + /* disable PLL2 */ + wm8753_2w_write(wm8753.i2c, WM8753_PLL2CTL1, 0x0026); + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, clk); + } else { + u16 value = 0; + int i = 0; + + /* if we cant match, then use good values for N and K */ + for (;i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].hz == speed) + break; + } + + /* do we need to enable the PLL ? */ + if (!pll_div[i].n) { + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, 0x0); + return 0; + } + + /* set up N and K PLL divisor ratios */ + /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ + value = (pll_div[i].n << 5) + ((pll_div[i].k & 0x3c0000) >> 18); + wm8753_2w_write(wm8753.i2c, WM8753_PLL2CTL2, value); + + /* bits 8:0 = PLL_K[17:9] */ + value = (pll_div[i].k & 0x03fe00) >> 9; + wm8753_2w_write(wm8753.i2c, WM8753_PLL2CTL3, value); + + /* bits 8:0 = PLL_K[8:0] */ + value = pll_div[i].k & 0x0001ff; + wm8753_2w_write(wm8753.i2c, WM8753_PLL2CTL4, value); + + /* set PLL1 as input and enable */ + wm8753_2w_write(wm8753.i2c, WM8753_PLL2CTL1, 0x0027); + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, clk | 0x0008); + } + } + return speed; +} + + +/* + * Power up the codec -- WE ARE NOW ALMOST DOING THIS IN DPM + */ +static int wm8753_power_up(snd_pcm_substream_t *substream) +{ + u16 pwr = 0xfc; + + /* set Vmid to 5kOhm, enable VREF and VDAC */ + if (wm8753_2w_write(wm8753.i2c, WM8753_PWR1, 0x0100 | pwr) != 0) + return -EIO; + + /* enable MIC1 preamp, ALC mix and left ADC */ + if (wm8753_2w_write(wm8753.i2c, WM8753_PWR2, 0x01ff) != 0) + return -EIO; + + /* enable LOUT 1, ROUT1, MONO1 */ + if (wm8753_2w_write(wm8753.i2c, WM8753_PWR3, 0x01ff) != 0) + return -EIO; + + /* enable left, mono mixer */ + if (wm8753_2w_write(wm8753.i2c, WM8753_PWR4, 0x0000) != 0) + return -EIO; + + /* let WM8753 powerup and then set Vmid to 50kOhm */ + mdelay(1); + if (wm8753_2w_write(wm8753.i2c, WM8753_PWR1, pwr) != 0) + return -EIO; + + return 0; +} + +/* WE CAN USE DPM IN NEAR FUTURE */ +static int wm8753_power_down(snd_pcm_substream_t *substream) +{ + if ((wm8753_2w_write(wm8753.i2c, WM8753_PWR1, 0x0100) != 0) && + (wm8753_2w_write(wm8753.i2c, WM8753_PWR2, 0x0000) != 0) && + (wm8753_2w_write(wm8753.i2c, WM8753_PWR3, 0x0000) != 0) && + (wm8753_2w_write(wm8753.i2c, WM8753_PWR4, 0x0000) != 0)) { + err("could not powerdown WM8753"); + return -EIO; + } + return 0; +} + +static int wm8753_pcm_voice_startup(snd_pcm_substream_t *substream) +{ + //snd_pcm_runtime_t *runtime = substream->runtime; + + return 0; +} + +static void wm8753_pcm_voice_shutdown(snd_pcm_substream_t *substream) +{ + wm8753_power_down(substream); +} + +static int wm8753_pcm_voice_prepare(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + u16 voice = 0, ioctl, clock, srate; + + /* enable PLL */ + wm8753_config_pll(2, pcm_c->hw_runtime.priv1); + + /* set master/slave audio interface */ + ioctl = wm8753_read_reg_cache(WM8753_IOCTL) & 0x01f1; + switch(pcm_c->hw_runtime.hformat & SND_SOC_CLOCK_MASK) { + case SND_SOC_HWFMT_CBM_CFM: + voice |= 0x0040; + ioctl |= 0x0002; + break; + case SND_SOC_HWFMT_CBM_CFS: + voice |= 0x0040; + break; + } + + /* interface format */ + switch(pcm_c->hw_runtime.hformat & SND_SOC_FORMAT_MASK) { + case SND_SOC_HWFMT_I2S: + voice |= 0x0002; + break; + case SND_SOC_HWFMT_RIGHT_J: + break; + case SND_SOC_HWFMT_LEFT_J: + voice |= 0x0001; + break; + case SND_SOC_HWFMT_DSP_A: + voice |= 0x0003; + break; + case SND_SOC_HWFMT_DSP_B: + voice |= 0x0013; + break; + } + + /* bit size */ + switch(pcm_c->hw_runtime.hbits) { + case SND_SOC_HWBITS(16): + break; + case SND_SOC_HWBITS(20): + voice |= 0x0004; + break; + case SND_SOC_HWBITS(24): + voice |= 0x0008; + break; + case SND_SOC_HWBITS(32): + voice |= 0x000c; + break; + } + + /* set rate */ + clock = wm8753_read_reg_cache(WM8753_CLOCK) & 0x003f; + clock |= (pcm_c->hw_runtime.priv2 & 0xff00) >> 2; + wm8753_2w_write(wm8753.i2c, WM8753_CLOCK, clock); + + srate = wm8753_read_reg_cache(WM8753_SRATE1) & 0x017f; + srate |= (pcm_c->hw_runtime. priv2 & 0xff) << 7; + wm8753_2w_write(wm8753.i2c, WM8753_SRATE1, srate); + + /* clock inversion */ + switch(pcm_c->hw_runtime.hformat & SND_SOC_INV_MASK) { + case SND_SOC_HWFMT_IB_IF: + voice |= 0x0090; + break; + case SND_SOC_HWFMT_IB_NF: + voice |= 0x0080; + break; + case SND_SOC_HWFMT_NB_IF: + voice |= 0x0010; + break; + } + wm8753_2w_write(wm8753.i2c, WM8753_IOCTL, ioctl); + wm8753_2w_write(wm8753.i2c, WM8753_PCM, voice); + return 0; +} + +static int wm8753_pcm_hifi_startup(snd_pcm_substream_t *substream) +{ + wm8753_power_up(substream); + return 0; +} + +static void wm8753_pcm_hifi_shutdown(snd_pcm_substream_t *substream) +{ + wm8753_power_down(substream); +} + +static int wm8753_pcm_hifi_prepare(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + u16 hifi = 0, ioctl, srate; + + /* enable PLL */ + wm8753_config_pll(1, pcm_c->hw_runtime.priv1); + + /* set master/slave audio interface */ + ioctl = wm8753_read_reg_cache(WM8753_IOCTL) & 0x00f2; + switch(pcm_c->hw_runtime.hformat & SND_SOC_CLOCK_MASK) { + case SND_SOC_HWFMT_CBM_CFM: + hifi |= 0x0040; + ioctl |= 0x0001; + break; + case SND_SOC_HWFMT_CBM_CFS: + hifi |= 0x0040; + break; + } + + /* interface format */ + switch(pcm_c->hw_runtime.hformat & SND_SOC_FORMAT_MASK) { + case SND_SOC_HWFMT_I2S: + hifi |= 0x0002; + break; + case SND_SOC_HWFMT_RIGHT_J: + break; + case SND_SOC_HWFMT_LEFT_J: + hifi |= 0x0001; + break; + case SND_SOC_HWFMT_DSP_A: + hifi |= 0x0003; + break; + case SND_SOC_HWFMT_DSP_B: + hifi |= 0x0013; + break; + } + + /* bit size */ + switch(pcm_c->hw_runtime.hbits) { + case SND_SOC_HWBITS(16): + break; + case SND_SOC_HWBITS(20): + hifi |= 0x0004; + break; + case SND_SOC_HWBITS(24): + hifi |= 0x0008; + break; + case SND_SOC_HWBITS(32): + hifi |= 0x000c; + break; + } + + /* set rate */ + srate = wm8753_read_reg_cache(WM8753_SRATE2) & 0x01c7; + switch ((pcm_c->hw_runtime.priv2 & 0xff00) >> 8){ + case 1: + break; + case 2: + srate |= (0x1 << 3); + break; + case 4: + srate |= (0x2 << 3); + break; + case 8: + srate |= (0x3 << 3); + break; + case 16: + srate |= (0x4 << 3); + break; + } + wm8753_2w_write(wm8753.i2c, WM8753_SRATE2, srate); + srate = (pcm_c->hw_runtime. priv2 & 0xff) << 1; + wm8753_2w_write(wm8753.i2c, WM8753_SRATE1, srate); + + /* clock inversion */ + switch(pcm_c->hw_runtime.hformat & SND_SOC_INV_MASK) { + case SND_SOC_HWFMT_IB_IF: + hifi |= 0x0090; + break; + case SND_SOC_HWFMT_IB_NF: + hifi |= 0x0080; + break; + case SND_SOC_HWFMT_NB_IF: + hifi |= 0x0010; + break; + } + wm8753_2w_write(wm8753.i2c, WM8753_IOCTL, ioctl | 0x0008); + wm8753_2w_write(wm8753.i2c, WM8753_HIFI, hifi); + return 0; +} + +static void wm8753_device_release(struct device * dev) +{ +} + +static snd_soc_pcm_codec_t wm8753_pcm_voice_client = { + .name = "WM8753 Voice", + .playback = { + .sname = "Voice Playback", + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .sname = "Voice Capture", + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 2,}, + .ops = { + .startup = wm8753_pcm_voice_startup, + .shutdown = wm8753_pcm_voice_shutdown, + .prepare = wm8753_pcm_voice_prepare,}, + .hw = { + .num_hmodes = ARRAY_SIZE(wm8753_voice), + .hmodes = &wm8753_voice[0], + }, +}; + +static snd_soc_pcm_codec_t wm8753_pcm_hifi_client = { + .name = "WM8753 Hifi", + .playback = { + .sname = "HiFi Playback", + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 2,}, + .ops = { + .startup = wm8753_pcm_hifi_startup, + .shutdown = wm8753_pcm_hifi_shutdown, + .prepare = wm8753_pcm_hifi_prepare,}, + .hw = { + .num_hmodes = ARRAY_SIZE(wm8753_hifi), + .hmodes = &wm8753_hifi[0],}, +}; + +static snd_soc_codec_t wm8753_soc_codec; + +/* + * initialise the WM8753 driver + * register the mixer and dsp interfaces with the kernel + */ +static int wm8753_probe(snd_soc_codec_t *codec) +{ + int ret; + int dev_no = 0; + int reg; + + info("WM8753 Audio Codec %s", WM8753_VERSION); + if(!hifi && !voice) { + err("no interfaces selected"); + return -ENODEV; + } + + /* check platform for interfaces */ + if(voice && snd_soc_iface_query(SND_SOC_SSP, 1)) { + err("voice interface not available"); + voice = 0; + } + if(hifi && snd_soc_iface_query(SND_SOC_I2S, 0)) { + err("HiFi interface not available"); + hifi = 0; + } + if(!hifi && !voice) { + err("no interfaces available"); + return -ENODEV; + } + + if (voice) { + if((ret = snd_soc_pcm_new(codec->card, dev_no++, &wm8753_pcm_voice_client, + &wm8753.pcm_voice, 1, 1, SND_SOC_SSP, 1)) < 0) + return ret; + } + + if (hifi) { + if((ret = snd_soc_pcm_new(codec->card, dev_no++, &wm8753_pcm_hifi_client, + &wm8753.pcm_hifi, 1, 0, SND_SOC_I2S, 0)) < 0) + return ret; + } + + if ((ret = i2c_add_driver(&wm8753_i2c_driver)) != 0) { + err("can't add i2c driver"); + return ret; + } + + /* set the update bits */ + reg = wm8753_read_reg_cache(WM8753_LDAC); + wm8753_2w_write(wm8753.i2c, WM8753_LDAC, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_RDAC); + wm8753_2w_write(wm8753.i2c, WM8753_RDAC, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_LOUT1V); + wm8753_2w_write(wm8753.i2c, WM8753_LOUT1V, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_ROUT1V); + wm8753_2w_write(wm8753.i2c, WM8753_ROUT1V, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_LOUT2V); + wm8753_2w_write(wm8753.i2c, WM8753_LOUT2V, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_ROUT2V); + wm8753_2w_write(wm8753.i2c, WM8753_ROUT2V, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_LINVOL); + wm8753_2w_write(wm8753.i2c, WM8753_LINVOL, reg | 0x0100); + reg = wm8753_read_reg_cache(WM8753_RINVOL); + wm8753_2w_write(wm8753.i2c, WM8753_RINVOL, reg | 0x0100); + + wm8753_add_controls(&wm8753_soc_codec); + wm8753_add_widgets(&wm8753_soc_codec); + + return ret; +} + +/* + * unregister interfaces and clean up + */ +static void wm8753_remove(snd_soc_codec_t *codec) +{ + i2c_del_driver(&wm8753_i2c_driver); +} + +static snd_soc_codec_t wm8753_soc_codec = { + .name = "WM8753", + .longname = "wm8753 long name", + .owner = THIS_MODULE, + .pdev = { + .name = "wm8753 pdev", + .id = -1, + .dev = {.release = wm8753_device_release}, + }, + .probe = wm8753_probe, + .remove = wm8753_remove, + .read = wm8753_read_reg_cache, + .write = wm8753_write, +}; + +static int __init wm8753_init(void) +{ + return snd_soc_register_codec(&wm8753_soc_codec); +} + +static void __exit wm8753_exit(void) +{ + snd_soc_unregister_codec(&wm8753_soc_codec); +} + +module_init(wm8753_init); +module_exit(wm8753_exit); + +MODULE_DESCRIPTION("Soc WM8753 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/wm8753.h b/sound/soc/codecs/wm8753.h new file mode 100644 index 0000000..ec7451b --- /dev/null +++ b/sound/soc/codecs/wm8753.h @@ -0,0 +1,104 @@ +/* + * wm8753.h -- audio driver for WM8753 + * + * Copyright 2003 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef _WM8753_H +#define _WM8753_H + +/* WM8753 register space */ + +#define WM8753_DAC 0x01 +#define WM8753_ADC 0x02 +#define WM8753_PCM 0x03 +#define WM8753_HIFI 0x04 +#define WM8753_IOCTL 0x05 +#define WM8753_SRATE1 0x06 +#define WM8753_SRATE2 0x07 +#define WM8753_LDAC 0x08 +#define WM8753_RDAC 0x09 +#define WM8753_BASS 0x0a +#define WM8753_TREBLE 0x0b +#define WM8753_ALC1 0x0c +#define WM8753_ALC2 0x0d +#define WM8753_ALC3 0x0e +#define WM8753_NGATE 0x0f +#define WM8753_LADC 0x10 +#define WM8753_RADC 0x11 +#define WM8753_ADCTL1 0x12 +#define WM8753_3D 0x13 +#define WM8753_PWR1 0x14 +#define WM8753_PWR2 0x15 +#define WM8753_PWR3 0x16 +#define WM8753_PWR4 0x17 +#define WM8753_ID 0x18 +#define WM8753_INTPOL 0x19 +#define WM8753_INTEN 0x1a +#define WM8753_GPIO1 0x1b +#define WM8753_GPIO2 0x1c +#define WM8753_RESET 0x1f +#define WM8753_RECMIX1 0x20 +#define WM8753_RECMIX2 0x21 +#define WM8753_LOUTM1 0x22 +#define WM8753_LOUTM2 0x23 +#define WM8753_ROUTM1 0x24 +#define WM8753_ROUTM2 0x25 +#define WM8753_MOUTM1 0x26 +#define WM8753_MOUTM2 0x27 +#define WM8753_LOUT1V 0x28 +#define WM8753_ROUT1V 0x29 +#define WM8753_LOUT2V 0x2a +#define WM8753_ROUT2V 0x2b +#define WM8753_MOUTV 0x2c +#define WM8753_OUTCTL 0x2d +#define WM8753_ADCIN 0x2e +#define WM8753_INCTL1 0x2f +#define WM8753_INCTL2 0x30 +#define WM8753_LINVOL 0x31 +#define WM8753_RINVOL 0x32 +#define WM8753_MICBIAS 0x33 +#define WM8753_CLOCK 0x34 +#define WM8753_PLL1CTL1 0x35 +#define WM8753_PLL1CTL2 0x36 +#define WM8753_PLL1CTL3 0x37 +#define WM8753_PLL1CTL4 0x38 +#define WM8753_PLL2CTL1 0x39 +#define WM8753_PLL2CTL2 0x3a +#define WM8753_PLL2CTL3 0x3b +#define WM8753_PLL2CTL4 0x3c +#define WM8753_BIASCTL 0x3d +#define WM8753_ADCTL2 0x3f + +/* Voice DAC sample rates */ +#define WM8753_VD8K (0x6 << 6) +#define WM8753_VD12K (0x5 << 6) +#define WM8753_VD16K (0x2 << 6) +#define WM8753_VD24K (0x4 << 6) +#define WM8753_VD48K (0x0 << 6) + + +/* Hifi ADC/DAC sample rates */ +#define WM8753_A8D8 0x0006 +#define WM8753_A8D48 0x0004 +#define WM8753_A12D12 0x0008 +#define WM8753_A16D16 0x000a +#define WM8753_A24D24 0x001c +#define WM8753_A32D32 0x000c +#define WM8753_A48D8 0x0002 +#define WM8753_A48D48 0x0000 +#define WM8753_A96D96 0x000e + +struct wm8753_mixer_t { + int dev_mixer; +}; + +#endif diff --git a/sound/soc/codecs/wm9713-voice.c b/sound/soc/codecs/wm9713-voice.c new file mode 100644 index 0000000..f94f308 --- /dev/null +++ b/sound/soc/codecs/wm9713-voice.c @@ -0,0 +1,277 @@ +/* + * wm9713-voice.c -- PXA WM9713 PCM audio driver + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + * + * Revision history + * 1st Aug 2005 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define NAME "wm9713-voice" +#define VERSION "0.1" + +/* + * Debug + */ +#if 0 +#define dbg(format, arg...) printk(KERN_DEBUG TS_NAME ": " format "\n" , ## arg) +#else /* + */ +#define dbg(format, arg...) +#endif /* + */ +#define err(format, arg...) printk(KERN_ERR TS_NAME ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO TS_NAME ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING TS_NAME ": " format "\n" , ## arg) + +#define WM9713_PCM_8K (0xb << 8) +#define WM9713_PCM_12K (0x7 << 8) +#define WM9713_PCM_16K (0x5 << 8) +#define WM9713_PCM_24K (0x3 << 8) +#define WM9713_PCM_32K (0x2 << 8) +#define WM9713_PCM_48K (0x1 << 8) +#define WM9713_PCM_96K (0x0 << 8) + +#define WM9713_VOICE_HWFMT \ + (SND_SOC_HWFMT_I2S | SND_SOC_HWFMT_RIGHT_J | SND_SOC_HWFMT_LEFT_J | \ + SND_SOC_HWFMT_DSP_A | SND_SOC_HWFMT_DSP_B | SND_SOC_HWFMT_CBM_CFM | \ + SND_SOC_HWFMT_CBM_CFS | SND_SOC_HWFMT_CBS_CFS | SND_SOC_HWFMT_NB_NF | \ + SND_SOC_HWFMT_NB_IF | SND_SOC_HWFMT_IB_NF | SND_SOC_HWFMT_IB_IF) + +/* + * priv1 is pcm clock divider + */ +static snd_soc_hw_mode_t wm9713_voice[] = { + {WM9713_VOICE_HWFMT, SND_SOC_HWBITS(16), 48000, 256, WM9713_PCM_48K, }, + {WM9713_VOICE_HWFMT, SND_SOC_HWBITS(16), 32000, 384, WM9713_PCM_32K,}, + {WM9713_VOICE_HWFMT, SND_SOC_HWBITS(16), 24000, 256, WM9713_PCM_24K,}, + {WM9713_VOICE_HWFMT, SND_SOC_HWBITS(16), 16000, 256, WM9713_PCM_16K,}, + {WM9713_VOICE_HWFMT, SND_SOC_HWBITS(16), 8000, 256, WM9713_PCM_8K,}, +}; + +struct wm9713_pcm { + int pcm_rate; + struct wm97xx *wm; + snd_pcm_t *pcm_voice; +}; + +static struct wm9713_pcm wm9713; + +static int wm9713_voice_startup(snd_pcm_substream_t *substream) +{ + int reg; + + /* power up clock control and voice DAC */ + reg = wm97xx_reg_read(wm9713.wm, AC97_POWERDOWN); + wm97xx_reg_write(wm9713.wm, AC97_POWERDOWN, reg & ~0x2000); + reg = wm97xx_reg_read(wm9713.wm, AC97_EXTENDED_MID); + wm97xx_reg_write(wm9713.wm, AC97_EXTENDED_MID, reg & ~0x1000); + + return 0; +} + +static void wm9713_voice_shutdown(snd_pcm_substream_t *substream) +{ +} + +static int wm9713_voice_prepare(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + u16 reg = 0x8000; + + switch(pcm_c->hw_runtime.hformat & SND_SOC_CLOCK_MASK){ + case SND_SOC_HWFMT_CBM_CFM: + reg |= 0x4000; + break; + case SND_SOC_HWFMT_CBM_CFS: + reg |= 0x6000; + break; + case SND_SOC_HWFMT_CBS_CFS: + reg |= 0x0200; + break; + } + /* clock inversion */ + switch(pcm_c->hw_runtime.hformat & SND_SOC_INV_MASK) { + case SND_SOC_HWFMT_IB_IF: + reg |= 0x00c0; + break; + case SND_SOC_HWFMT_IB_NF: + reg |= 0x0080; + break; + case SND_SOC_HWFMT_NB_IF: + reg |= 0x0040; + break; + } + + switch(pcm_c->hw_runtime.hformat & SND_SOC_FORMAT_MASK) { + case SND_SOC_HWFMT_I2S: + reg |= 0x0002; + break; + case SND_SOC_HWFMT_RIGHT_J: + break; + case SND_SOC_HWFMT_LEFT_J: + reg |= 0x0001; + break; + case SND_SOC_HWFMT_DSP_A: + reg |= 0x0003; + break; + case SND_SOC_HWFMT_DSP_B: + reg |= 0x0043; + break; + } + switch(pcm_c->hw_runtime.hbits) { + case SND_SOC_HWBITS(16): + break; + case SND_SOC_HWBITS(20): + reg |= 0x0004; + break; + case SND_SOC_HWBITS(24): + reg |= 0x0008; + break; + case SND_SOC_HWBITS(32): + reg |= 0x000c; + break; + } + /* enable PCM interface in master mode */ + wm97xx_reg_write(wm9713.wm, AC97_CENTER_LFE_MASTER, reg); + + /* sample rate */ + reg = wm97xx_reg_read(wm9713.wm, AC97_HANDSET_RATE) &0xe0ff; + wm97xx_reg_write(wm9713.wm, AC97_HANDSET_RATE, reg | pcm_c->hw_runtime.priv1); + return 0; +} + +static snd_soc_pcm_codec_t wm9713_voice_client = { + .name = "WM9713 Voice", + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_96000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .startup = wm9713_voice_startup, + .shutdown = wm9713_voice_shutdown, + .prepare = wm9713_voice_prepare,}, + .hw = { + .num_hmodes = ARRAY_SIZE(wm9713_voice), + .hmodes = &wm9713_voice[0], + }, +}; + +static void wm9713_device_release(struct device * dev) +{ +} + +static snd_soc_codec_t wm9713_soc_codec; + +static int wm9713_soc_probe(snd_soc_codec_t *codec) +{ + int ret; + + ret = snd_soc_pcm_new(codec->card, 0, &wm9713_voice_client, + &wm9713.pcm_voice, 1, 1, SND_SOC_SSP, 1); + return ret; +} + +static void wm9713_soc_remove(snd_soc_codec_t *codec) +{ +} + +static snd_soc_codec_t wm9713_soc_codec = { + .name = "WM9713 Voice", + .longname = "wm9713 voice long", + .owner = THIS_MODULE, + .pdev = { + .name = "wm9713 pl", + .id = -1, + .dev = {.release = wm9713_device_release}, + }, + .probe = wm9713_soc_probe, + .remove = wm9713_soc_remove, +}; + +static int wm97xx_wm9713_probe(struct wm97xx* wm) +{ + if (wm->ac97 == NULL) + return -ENODEV; + + wm9713.wm = wm; + return snd_soc_register_codec(&wm9713_soc_codec); +} + +static void wm97xx_wm9713_remove(struct wm97xx* wm) +{ + snd_soc_unregister_codec(&wm9713_soc_codec); + wm9713.wm = NULL; +} + +static struct wm97xx_platform_drv pxa_wm9713 = { + .id = 0x4c13, + .mask = 0xffff, + .probe = wm97xx_wm9713_probe, + .remove = wm97xx_wm9713_remove, +}; + +static int __init pxa_wm9713_init(void) +{ + wm97xx_register_platform_drv(&pxa_wm9713); + return 0; +} + +static void __exit pxa_wm9713_exit(void) +{ + wm97xx_unregister_platform_drv(&pxa_wm9713); +} + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood "); +MODULE_DESCRIPTION("pxa2xx WM9713 PCM driver"); +MODULE_LICENSE("GPL"); + +module_init(pxa_wm9713_init); +module_exit(pxa_wm9713_exit); diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig new file mode 100644 index 0000000..7b4eb22 --- /dev/null +++ b/sound/soc/pxa/Kconfig @@ -0,0 +1,35 @@ +config SND_PXA2xx_SOC + tristate "SoC Audio for the Intel PXA2xx chip" + depends on ARCH_PXA && SND + select SND_AC97_CODEC + select SND_PCM + help + Say Y or M if you want to add support for codecs attached to + the PXA2xx AC97, I2S or SSP interface. You will also need + to select the audio interfaces to support below. + +config SND_PXA2xx_SOC_AC97 + tristate "SoC AC97 driver for the Intel PXA2xx chip" + depends on SND_PXA2xx_SOC + select SND_AC97_CODEC + select SND_PCM + help + Say Y or M if you want to add support for AC97 codecs attached to + the PXA2xx AC97 interface. + +config SND_PXA2xx_SOC_I2S + tristate "SoC I2S driver for the Intel PXA2xx chip" + depends on SND_PXA2xx_SOC + select SND_PCM + help + Say Y or M if you want to add support for I2S codecs attached to + the PXA2xx I2S interface. + +config SND_PXA2xx_SOC_SSP + tristate "SoC SSP driver for the Intel PXA2xx chip" + depends on SND_PXA2xx_SOC + select SND_PCM + select PXA_SSP + help + Say Y or M if you want to add support for PCM codecs attached to + the PXA2xx SSP interface. diff --git a/sound/soc/pxa/Makefile b/sound/soc/pxa/Makefile new file mode 100644 index 0000000..d6f1fe5 --- /dev/null +++ b/sound/soc/pxa/Makefile @@ -0,0 +1,10 @@ + +snd-pxa2xx-soc-objs := pxa2xx-pcm.o +snd-pxa2xx-soc-ac97-objs := pxa2xx-ac97.o +snd-pxa2xx-soc-i2s-objs := pxa2xx-i2s.o +snd-pxa2xx-soc-ssp-objs := pxa2xx-ssp.o + +obj-$(CONFIG_SND_PXA2xx_SOC) += snd-pxa2xx-soc.o +obj-$(CONFIG_SND_PXA2xx_SOC_AC97) += snd-pxa2xx-soc-ac97.o +obj-$(CONFIG_SND_PXA2xx_SOC_I2S) += snd-pxa2xx-soc-i2s.o +obj-$(CONFIG_SND_PXA2xx_SOC_SSP) += snd-pxa2xx-soc-ssp.o diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c new file mode 100644 index 0000000..3a7d4b8 --- /dev/null +++ b/sound/soc/pxa/pxa2xx-ac97.c @@ -0,0 +1,503 @@ +/* + * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip. + * + * Author: Nicolas Pitre + * Created: Dec 02, 2004 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "pxa2xx-pcm.h" + +static DECLARE_MUTEX(car_mutex); +static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); +static volatile long gsr_bits; + +/* + * Beware PXA27x bugs: + * + * o Slot 12 read from modem space will hang controller. + * o CDONE, SDONE interrupt fails after any slot 12 IO. + * + * We therefore have an hybrid approach for waiting on SDONE (interrupt or + * 1 jiffy timeout if interrupt never comes). + */ + +static unsigned short pxa2xx_ac97_read(ac97_t *ac97, unsigned short reg) +{ + unsigned short val = -1; + volatile u32 *reg_addr; + + down(&car_mutex); + + /* set up primary or secondary codec/modem space */ +#ifdef CONFIG_PXA27x + reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE; +#else + if (reg == AC97_GPIO_STATUS) + reg_addr = (ac97->num & 1) ? &SMC_REG_BASE : &PMC_REG_BASE; + else + reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE; +#endif + reg_addr += (reg >> 1); + +#ifndef CONFIG_PXA27x + if (reg == AC97_GPIO_STATUS) { + /* read from controller cache */ + val = *reg_addr; + goto out; + } +#endif + + /* start read access across the ac97 link */ + GSR = GSR_CDONE | GSR_SDONE; + gsr_bits = 0; + val = *reg_addr; + + wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1); + if (!((GSR | gsr_bits) & GSR_SDONE)) { + printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n", + __FUNCTION__, reg, GSR | gsr_bits); + val = -1; + goto out; + } + + /* valid data now */ + GSR = GSR_CDONE | GSR_SDONE; + gsr_bits = 0; + val = *reg_addr; + /* but we've just started another cycle... */ + wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1); + +out: up(&car_mutex); + return val; +} + +static void pxa2xx_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val) +{ + volatile u32 *reg_addr; + + down(&car_mutex); + + /* set up primary or secondary codec/modem space */ +#ifdef CONFIG_PXA27x + reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE; +#else + if (reg == AC97_GPIO_STATUS) + reg_addr = (ac97->num & 1) ? &SMC_REG_BASE : &PMC_REG_BASE; + else + reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE; +#endif + reg_addr += (reg >> 1); + + GSR = GSR_CDONE | GSR_SDONE; + gsr_bits = 0; + *reg_addr = val; + wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1); + if (!((GSR | gsr_bits) & GSR_CDONE)) + printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n", + __FUNCTION__, reg, GSR | gsr_bits); + + up(&car_mutex); +} + +static void pxa2xx_ac97_reset(ac97_t *ac97) +{ + /* First, try cold reset */ + GCR &= GCR_COLD_RST; /* clear everything but nCRST */ + GCR &= ~GCR_COLD_RST; /* then assert nCRST */ + + gsr_bits = 0; +#ifdef CONFIG_PXA27x + /* PXA27x Developers Manual section 13.5.2.2.1 */ + pxa_set_cken(1 << 31, 1); + udelay(5); + pxa_set_cken(1 << 31, 0); + GCR = GCR_COLD_RST; + udelay(50); +#else + GCR = GCR_COLD_RST; + GCR |= GCR_CDONE_IE|GCR_SDONE_IE; + wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); +#endif + + if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) { + printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n", + __FUNCTION__, gsr_bits); + + /* let's try warm reset */ + gsr_bits = 0; +#ifdef CONFIG_PXA27x + /* warm reset broken on Bulverde, + so manually keep AC97 reset high */ + pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); + udelay(10); + GCR |= GCR_WARM_RST; + pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + udelay(500); +#else + GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN; + wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); +#endif + + if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) + printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", + __FUNCTION__, gsr_bits); + } + + GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); + GCR |= GCR_SDONE_IE|GCR_CDONE_IE; +} + +static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs) +{ + long status; + + status = GSR; + if (status) { + GSR = status; + gsr_bits |= status; + wake_up(&gsr_wq); + +#ifdef CONFIG_PXA27x + /* Although we don't use those we still need to clear them + since they tend to spuriously trigger when MMC is used + (hardware bug? go figure)... */ + MISR = MISR_EOC; + PISR = PISR_EOC; + MCSR = MCSR_EOC; +#endif + + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + +static ac97_bus_ops_t pxa2xx_ac97_ops = { + .read = pxa2xx_ac97_read, + .write = pxa2xx_ac97_write, + .reset = pxa2xx_ac97_reset, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_stereo_out = { + .name = "AC97 PCM Stereo out", + .dev_addr = __PREG(PCDR), + .drcmr = &DRCMRTXPCDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_stereo_in = { + .name = "AC97 PCM Stereo in", + .dev_addr = __PREG(PCDR), + .drcmr = &DRCMRRXPCDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_mono_out = { + .name = "AC97 PCM Mono out", + .dev_addr = __PREG(PCDR), + .drcmr = &DRCMRTXPCDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_mono_in = { + .name = "AC97 PCM Mono in", + .dev_addr = __PREG(PCDR), + .drcmr = &DRCMRRXPCDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static snd_pcm_t *pxa2xx_ac97_pcm; +static ac97_t *pxa2xx_ac97_ac97; + +#ifdef CONFIG_PM + +static int pxa2xx_ac97_do_suspend(snd_card_t *card, unsigned int state) +{ + if (card->power_state != SNDRV_CTL_POWER_D3cold) { + pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data; + snd_pcm_suspend_all(pxa2xx_ac97_pcm); + snd_ac97_suspend(pxa2xx_ac97_ac97); + snd_power_change_state(card, SNDRV_CTL_POWER_D3cold); + if (platform_ops && platform_ops->suspend) + platform_ops->suspend(platform_ops->priv); + GCR |= GCR_ACLINK_OFF; + pxa_set_cken(CKEN2_AC97, 0); + } + + return 0; +} + +static int pxa2xx_ac97_do_resume(snd_card_t *card, unsigned int state) +{ + if (card->power_state != SNDRV_CTL_POWER_D0) { + pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data; + pxa_set_cken(CKEN2_AC97, 1); + if (platform_ops && platform_ops->resume) + platform_ops->resume(platform_ops->priv); + snd_ac97_resume(pxa2xx_ac97_ac97); + snd_power_change_state(card, SNDRV_CTL_POWER_D0); + } + + return 0; +} + +static int pxa2xx_ac97_suspend(struct device *_dev, u32 state, u32 level) +{ + snd_card_t *card = dev_get_drvdata(_dev); + int ret = 0; + + if (card && level == SUSPEND_DISABLE) + ret = pxa2xx_ac97_do_suspend(card, SNDRV_CTL_POWER_D3cold); + + return ret; +} + +static int pxa2xx_ac97_resume(struct device *_dev, u32 level) +{ + snd_card_t *card = dev_get_drvdata(_dev); + int ret = 0; + + if (card && level == RESUME_ENABLE) + ret = pxa2xx_ac97_do_resume(card, SNDRV_CTL_POWER_D0); + + return ret; +} + +#else +#define pxa2xx_ac97_suspend NULL +#define pxa2xx_ac97_resume NULL +#endif + +static snd_soc_pcm_codec_t pxa_pcm_ac97_client = { + .name = "pxa2xx AC97", + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 2,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 2,}, +}; + +static int pxa2xx_ac97_probe(struct device *dev) +{ + snd_card_t *card; + ac97_bus_t *ac97_bus; + ac97_template_t ac97_template; + int ret; + + ret = -ENOMEM; + card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, + THIS_MODULE, 0); + if (!card) + goto err; + + card->dev = dev; + strncpy(card->driver, dev->driver->name, sizeof(card->driver)); + + ret = snd_soc_pcm_new(card, 0, &pxa_pcm_ac97_client, &pxa2xx_ac97_pcm, + 1, 1, SND_SOC_AC97, 0); + if (ret) + goto err; + + ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL); + if (ret < 0) + goto err; + + pxa_gpio_mode(GPIO31_SYNC_AC97_MD); + pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); + pxa_gpio_mode(GPIO28_BITCLK_AC97_MD); + pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); +#ifdef CONFIG_PXA27x + /* Use GPIO 113 as AC97 Reset on Bulverde */ + pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); +#endif + pxa_set_cken(CKEN2_AC97, 1); + + ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus); + if (ret) + goto err; + memset(&ac97_template, 0, sizeof(ac97_template)); + ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97); + if (ret) + goto err; + + snprintf(card->shortname, sizeof(card->shortname), + "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97)); + snprintf(card->longname, sizeof(card->longname), + "%s (%s)", dev->driver->name, card->mixername); + + snd_card_set_pm_callback(card, pxa2xx_ac97_do_suspend, + pxa2xx_ac97_do_resume, NULL); + ret = snd_card_register(card); + if (ret == 0) { + dev_set_drvdata(dev, card); + return 0; + } + + err: + if (card) + snd_card_free(card); + if (CKEN & CKEN2_AC97) { + GCR |= GCR_ACLINK_OFF; + free_irq(IRQ_AC97, NULL); + pxa_set_cken(CKEN2_AC97, 0); + } + return ret; +} + +static int pxa2xx_ac97_remove(struct device *dev) +{ + snd_card_t *card = dev_get_drvdata(dev); + + if (card) { + snd_card_free(card); + dev_set_drvdata(dev, NULL); + GCR |= GCR_ACLINK_OFF; + free_irq(IRQ_AC97, NULL); + pxa_set_cken(CKEN2_AC97, 0); + } + return 0; +} + +static int pxa2xx_ac97_startup(snd_pcm_substream_t *substream) +{ + pxa2xx_audio_ops_t *platform_ops; + + platform_ops = substream->pcm->card->dev->platform_data; + if (platform_ops && platform_ops->startup) + return platform_ops->startup(substream, platform_ops->priv); + else + return 0; +} + +static void pxa2xx_ac97_shutdown(snd_pcm_substream_t *substream) +{ + pxa2xx_audio_ops_t *platform_ops; + + platform_ops = substream->pcm->card->dev->platform_data; + if (platform_ops && platform_ops->shutdown) + platform_ops->shutdown(substream, platform_ops->priv); +} + +static int pxa2xx_ac97_prepare(snd_pcm_substream_t *substream) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? + AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE; + return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate); +} + +static int pxa2xx_ac97_hw_params(snd_pcm_substream_t *substream, + snd_pcm_hw_params_t *params) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (params_channels(params) == 2) + pcm_i->platform_data = &pxa2xx_ac97_pcm_stereo_out; + else + pcm_i->platform_data = &pxa2xx_ac97_pcm_mono_out; + } else { + if (params_channels(params) == 2) + pcm_i->platform_data = &pxa2xx_ac97_pcm_stereo_in; + else + pcm_i->platform_data = &pxa2xx_ac97_pcm_mono_in; + } + printk("hw sub rate %d chn %d\n", params_rate(params), params_channels(params)); + return 0; +} + +static snd_soc_pcm_interface_t pxa_ac97_interface[] = { + { .name = "pxa2xx-ac97", + .id = 0, + .type = SND_SOC_AC97, + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 2, + .channels_max = 2,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 2, + .channels_max = 2,}, + .ops = { + .startup = pxa2xx_ac97_startup, + .shutdown = pxa2xx_ac97_shutdown, + .prepare = pxa2xx_ac97_prepare, + .hw_params = pxa2xx_ac97_hw_params,}, + }, +}; + +static struct device_driver pxa2xx_ac97_driver = { + .name = "pxa2xx-ac97", + .bus = &platform_bus_type, + .probe = pxa2xx_ac97_probe, + .remove = pxa2xx_ac97_remove, + .suspend = pxa2xx_ac97_suspend, + .resume = pxa2xx_ac97_resume, +}; + +static int __init pxa2xx_ac97_init(void) +{ + snd_soc_register_interface(pxa_ac97_interface); + return driver_register(&pxa2xx_ac97_driver); +} + +static void __exit pxa2xx_ac97_exit(void) +{ + snd_soc_unregister_interface(pxa_ac97_interface); + driver_unregister(&pxa2xx_ac97_driver); +} + +EXPORT_SYMBOL_GPL(pxa_ac97_interface); + +module_init(pxa2xx_ac97_init); +module_exit(pxa2xx_ac97_exit); + +MODULE_AUTHOR("Nicolas Pitre"); +MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c new file mode 100644 index 0000000..8e1f959 --- /dev/null +++ b/sound/soc/pxa/pxa2xx-i2s.c @@ -0,0 +1,277 @@ +/* + * pxa2xx-i2s.c -- ALSA Soc Audio Layer + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 12th Aug 2005 Initial version. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "pxa2xx-pcm.h" + +#define PXA_I2S_HWFMT \ + (SND_SOC_HWFMT_I2S | SND_SOC_HWFMT_LEFT_J | SND_SOC_HWFMT_CBS_CFS | \ + SND_SOC_HWFMT_CBM_CFS | SND_SOC_HWFMT_NB_NF) + +/* + * priv1 is sadiv + * priv2 is bits[15..8] = MCLK divisor, bits[7..0] = sr + */ +static snd_soc_hw_mode_t pxa2xx_i2s[] = { + {PXA_I2S_HWFMT, SND_SOC_HWBITS(16), 8000, 64, 0x00000048}, + {PXA_I2S_HWFMT, SND_SOC_HWBITS(16), 11025, 64, 0x00000034}, + {PXA_I2S_HWFMT, SND_SOC_HWBITS(16), 16000, 64, 0x00000024}, + {PXA_I2S_HWFMT, SND_SOC_HWBITS(16), 22050, 64, 0x0000001a}, + {PXA_I2S_HWFMT, SND_SOC_HWBITS(16), 44100, 64, 0x0000000d}, + {PXA_I2S_HWFMT, SND_SOC_HWBITS(16), 48000, 64, 0x0000000c}, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_i2s_pcm_stereo_out = { + .name = "I2S PCM Stereo out", + .dev_addr = __PREG(SADR), + .drcmr = &DRCMRTXSADR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_i2s_pcm_stereo_in = { + .name = "I2S PCM Stereo in", + .dev_addr = __PREG(SADR), + .drcmr = &DRCMRRXSADR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_i2s_pcm_mono_out = { + .name = "I2S PCM Mono out", + .dev_addr = __PREG(SADR), + .drcmr = &DRCMRTXSADR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_i2s_pcm_mono_in = { + .name = "I2S PCM Mono in", + .dev_addr = __PREG(SADR), + .drcmr = &DRCMRRXSADR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_gpio_t gpio_bus[] = { + { /* I2S SoC Slave */ + .rx = GPIO29_SDATA_IN_I2S_MD, + .tx = GPIO30_SDATA_OUT_I2S_MD, + .clk = GPIO28_BITCLK_IN_I2S_MD, + .frm = GPIO31_SYNC_I2S_MD, + }, + { /* I2S SoC Master */ + .rx = GPIO29_SDATA_IN_I2S_MD, + .tx = GPIO30_SDATA_OUT_I2S_MD, + .clk = GPIO28_BITCLK_OUT_I2S_MD, + .frm = GPIO31_SYNC_I2S_MD, + }, +}; + +static u32 get_sadiv(int rate) +{ + int i; + for (i = 0; i < ARRAY_SIZE(pxa2xx_i2s); i++) { + if (pxa2xx_i2s[i].rate == rate) + break; + } + return pxa2xx_i2s[i].priv1; +}; + +static int pxa2xx_i2s_startup(snd_pcm_substream_t *substream) +{ + return 0; +} + +/* do we need 2 waits..... - needs more testing */ +static int pxa_i2s_wait_ready(void) +{ + int i; + /* flush the Rx FIFO */ + for(i = 0; i < 16; i++) + SADR; + return 0; +} + +static int pxa_i2s_wait_close(void) +{ + int i; + /* flush the Rx FIFO */ + for(i = 0; i < 16; i++) + SADR; + return 0; +} + +static int pxa2xx_i2s_hw_params(snd_pcm_substream_t *substream, + snd_pcm_hw_params_t *params) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + int master = 0; + + if(pcm_i->hw_runtime.hformat & SND_SOC_HWFMT_CBS_CFS) + master = 1; + + pxa_gpio_mode(gpio_bus[master].rx); + pxa_gpio_mode(gpio_bus[master].tx); + pxa_gpio_mode(gpio_bus[master].frm); + pxa_gpio_mode(gpio_bus[master].clk); + pxa_set_cken(CKEN8_I2S, 1); + pxa_i2s_wait_ready(); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (params_channels(params) == 2) + pcm_i->platform_data = &pxa2xx_i2s_pcm_stereo_out; + else + pcm_i->platform_data = &pxa2xx_i2s_pcm_mono_out; + } else { + if (params_channels(params) == 2) + pcm_i->platform_data = &pxa2xx_i2s_pcm_stereo_in; + else + pcm_i->platform_data = &pxa2xx_i2s_pcm_mono_in; + } + printk("hw sub rate %d chn %d\n", params_rate(params), params_channels(params)); + return 0; +} + +static void pxa2xx_i2s_shutdown(snd_pcm_substream_t *substream) +{ + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + SACR1 |= SACR1_DRPL; + SAIMR &= ~SAIMR_TFS; + } else { + SACR1 |= SACR1_DREC; + SAIMR &= ~SAIMR_RFS; + } + + if (SACR1 & (SACR1_DREC | SACR1_DRPL)) { + pxa_i2s_wait_close(); + SACR0 &= ~SACR0_ENB; + pxa_set_cken(CKEN8_I2S, 0); + } +} + +static int pxa2xx_i2s_prepare(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + int master = 0; + + if(pcm_i->hw_runtime.hformat & SND_SOC_HWFMT_CBS_CFS) + master = 1; + + /* is port used by another stream */ + if (SACR0 & SACR0_ENB) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + SACR1 &= ~SACR1_DRPL; + SAIMR |= SAIMR_TFS; + } else { + SACR1 &= ~SACR1_DREC; + SAIMR |= SAIMR_RFS; + } + } else { + + SACR0 = 0; + SACR1 = 0; + SAIMR = SACR1_DRPL | SACR1_DREC; + if (master) + SACR0 |= SACR0_BCKD; + + SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1); + + if (pcm_i->hw_runtime.hformat & SND_SOC_HWFMT_LEFT_J) + SACR1 |= SACR1_AMSL; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + SACR1 &= ~SACR1_DRPL; + SAIMR |= SAIMR_TFS; + } else { + SACR1 &= ~SACR1_DREC; + SAIMR |= SAIMR_RFS; + } + + SADIV = get_sadiv(pcm_i->hw_runtime.rate); + SACR0 |= SACR0_ENB; + } + + return 0; +} + +static snd_soc_pcm_interface_t pxa_i2s_interface[] = { + { .name = "pxa2xx-i2s", + .id = 0, + .type = SND_SOC_I2S, + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 2, + .channels_max = 2,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | + SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 2, + .channels_max = 2,}, + .ops = { + .startup = pxa2xx_i2s_startup, + .shutdown = pxa2xx_i2s_shutdown, + .prepare = pxa2xx_i2s_prepare, + .hw_params = pxa2xx_i2s_hw_params,}, + .hw = { + .num_hmodes = ARRAY_SIZE(pxa2xx_i2s), + .hmodes = &pxa2xx_i2s[0],}, + }, +}; + +static int __init pxa2xx_soc_i2s_init(void) +{ + snd_soc_register_interface(pxa_i2s_interface); + return 0; +} + +static void __exit pxa2xx_soc_i2s_exit(void) +{ + snd_soc_unregister_interface(pxa_i2s_interface); +} + +EXPORT_SYMBOL_GPL(pxa_i2s_interface); + +module_init(pxa2xx_soc_i2s_init); +module_exit(pxa2xx_soc_i2s_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("pxa2xx I2S SoC Interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/pxa/pxa2xx-pcm.c b/sound/soc/pxa/pxa2xx-pcm.c new file mode 100644 index 0000000..ac1c964 --- /dev/null +++ b/sound/soc/pxa/pxa2xx-pcm.c @@ -0,0 +1,384 @@ +/* + * linux/sound/arm/pxa2xx-pcm.c -- ALSA PCM interface for the Intel PXA2xx chip + * + * Author: Nicolas Pitre + * Created: Nov 30, 2004 + * Copyright: (C) 2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pxa2xx-pcm.h" + +static const snd_pcm_hardware_t pxa2xx_pcm_hardware = { + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .period_bytes_min = 32, + .period_bytes_max = 8192 - 32, + .periods_min = 1, + .periods_max = PAGE_SIZE/sizeof(pxa_dma_desc), + .buffer_bytes_max = 128 * 1024, + .fifo_size = 32, +}; + +struct pxa2xx_runtime_data { + int dma_ch; + pxa2xx_pcm_dma_params_t *params; + pxa_dma_desc *dma_desc_array; + dma_addr_t dma_desc_array_phys; +}; + +static void pxa2xx_pcm_dma_irq(int dma_ch, void *dev_id, struct pt_regs *regs) +{ + snd_pcm_substream_t *substream = dev_id; + struct pxa2xx_runtime_data *rtd = substream->runtime->private_data; + int dcsr; + + dcsr = DCSR(dma_ch); + DCSR(dma_ch) = dcsr & ~DCSR_STOPIRQEN; + + if (dcsr & DCSR_ENDINTR) { + snd_pcm_period_elapsed(substream); + } else { + printk( KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n", + rtd->params->name, dma_ch, dcsr ); + } +} + +static int pxa2xx_pcm_hw_params(snd_pcm_substream_t *substream, + snd_pcm_hw_params_t *params) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + struct pxa2xx_runtime_data *rtd = runtime->private_data; + size_t totsize = params_buffer_bytes(params); + size_t period = params_period_bytes(params); + pxa2xx_pcm_dma_params_t *dma = + (pxa2xx_pcm_dma_params_t*)pcm_c->pcm_i->platform_data; + pxa_dma_desc *dma_desc; + dma_addr_t dma_buff_phys, next_desc_phys; + int ret; + + rtd->params = dma; + ret = pxa_request_dma(rtd->params->name, DMA_PRIO_LOW, + pxa2xx_pcm_dma_irq, substream); + if (ret < 0) + return ret; + rtd->dma_ch = ret; + + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + runtime->dma_bytes = totsize; + + dma_desc = rtd->dma_desc_array; + next_desc_phys = rtd->dma_desc_array_phys; + dma_buff_phys = runtime->dma_addr; + do { + next_desc_phys += sizeof(pxa_dma_desc); + dma_desc->ddadr = next_desc_phys; + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + dma_desc->dsadr = dma_buff_phys; + dma_desc->dtadr = rtd->params->dev_addr; + } else { + dma_desc->dsadr = rtd->params->dev_addr; + dma_desc->dtadr = dma_buff_phys; + } + if (period > totsize) + period = totsize; + dma_desc->dcmd = rtd->params->dcmd | period | DCMD_ENDIRQEN; + dma_desc++; + dma_buff_phys += period; + } while (totsize -= period); + dma_desc[-1].ddadr = rtd->dma_desc_array_phys; + + return 0; +} + +static int pxa2xx_pcm_hw_free(snd_pcm_substream_t *substream) +{ + struct pxa2xx_runtime_data *rtd = substream->runtime->private_data; + + if(rtd && rtd->params) + *rtd->params->drcmr = 0; + + if(rtd->dma_ch) { + snd_pcm_set_runtime_buffer(substream, NULL); + pxa_free_dma(rtd->dma_ch); + rtd->dma_ch = 0; + } + + return 0; +} + +static int pxa2xx_pcm_prepare(snd_pcm_substream_t *substream) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + struct pxa2xx_runtime_data *rtd = runtime->private_data; + + DCSR(rtd->dma_ch) &= ~DCSR_RUN; + DCSR(rtd->dma_ch) = 0; + DCMD(rtd->dma_ch) = 0; + *rtd->params->drcmr = rtd->dma_ch | DRCMR_MAPVLD; + + return 0; +} + +static int pxa2xx_pcm_trigger(snd_pcm_substream_t *substream, int cmd) +{ + struct pxa2xx_runtime_data *rtd = substream->runtime->private_data; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + DDADR(rtd->dma_ch) = rtd->dma_desc_array_phys; + DCSR(rtd->dma_ch) = DCSR_RUN; + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + DCSR(rtd->dma_ch) &= ~DCSR_RUN; + break; + + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + DCSR(rtd->dma_ch) |= DCSR_RUN; + break; + + default: + ret = -EINVAL; + } + + return ret; +} + +static snd_pcm_uframes_t pxa2xx_pcm_pointer(snd_pcm_substream_t *substream) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + struct pxa2xx_runtime_data *rtd = runtime->private_data; + dma_addr_t ptr = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? + DSADR(rtd->dma_ch) : DTADR(rtd->dma_ch); + snd_pcm_uframes_t x = bytes_to_frames(runtime, ptr - runtime->dma_addr); + if (x == runtime->buffer_size) + x = 0; + return x; +} + +static int +pxa2xx_pcm_hw_rule_mult32(snd_pcm_hw_params_t *params, snd_pcm_hw_rule_t *rule) +{ + snd_interval_t *i = hw_param_interval(params, rule->var); + int changed = 0; + + if (i->min & 31) { + i->min = (i->min & ~31) + 32; + i->openmin = 0; + changed = 1; + } + + if (i->max & 31) { + i->max &= ~31; + i->openmax = 0; + changed = 1; + } + + return changed; +} + +static int pxa2xx_pcm_open(snd_pcm_substream_t *substream) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + struct pxa2xx_runtime_data *rtd; + int ret; + + snd_soc_set_runtime_hw(substream, &pxa2xx_pcm_hardware); + + /* + * For mysterious reasons (and despite what the manual says) + * playback samples are lost if the DMA count is not a multiple + * of the DMA burst size. Let's add a rule to enforce that. + */ + ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, + pxa2xx_pcm_hw_rule_mult32, NULL, + SNDRV_PCM_HW_PARAM_PERIOD_BYTES, -1); + if (ret) + goto out; + + ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, + pxa2xx_pcm_hw_rule_mult32, NULL, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES, -1); + if (ret) + goto out; + + ret = -ENOMEM; + rtd = kmalloc(sizeof(*rtd), GFP_KERNEL); + if (!rtd) + goto out; + memset(rtd, 0, sizeof(struct pxa2xx_runtime_data)); + rtd->dma_desc_array = + dma_alloc_writecombine(substream->pcm->card->dev, PAGE_SIZE, + &rtd->dma_desc_array_phys, GFP_KERNEL); + if (!rtd->dma_desc_array) + goto err1; + + runtime->private_data = rtd; + return ret; + + err1: + kfree(rtd); + out: + return ret; +} + +static int pxa2xx_pcm_close(snd_pcm_substream_t *substream) +{ + struct pxa2xx_runtime_data *rtd = substream->runtime->private_data; + + dma_free_writecombine(substream->pcm->card->dev, PAGE_SIZE, + rtd->dma_desc_array, rtd->dma_desc_array_phys); + kfree(rtd); + return 0; +} + +static int +pxa2xx_pcm_mmap(snd_pcm_substream_t *substream, struct vm_area_struct *vma) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + return dma_mmap_writecombine(substream->pcm->card->dev, vma, + runtime->dma_area, + runtime->dma_addr, + runtime->dma_bytes); +} + +snd_pcm_ops_t pxa2xx_pcm_ops = { + .open = pxa2xx_pcm_open, + .close = pxa2xx_pcm_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = pxa2xx_pcm_hw_params, + .hw_free = pxa2xx_pcm_hw_free, + .prepare = pxa2xx_pcm_prepare, + .trigger = pxa2xx_pcm_trigger, + .pointer = pxa2xx_pcm_pointer, + .mmap = pxa2xx_pcm_mmap, +}; + +static int pxa2xx_pcm_preallocate_dma_buffer(snd_pcm_t *pcm, int stream) +{ + snd_pcm_substream_t *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + size_t size = pxa2xx_pcm_hardware.buffer_bytes_max; + buf->dev.type = SNDRV_DMA_TYPE_DEV; + buf->dev.dev = pcm->card->dev; + buf->private_data = NULL; + buf->area = dma_alloc_writecombine(pcm->card->dev, size, + &buf->addr, GFP_KERNEL); + if (!buf->area) + return -ENOMEM; + buf->bytes = size; + return 0; +} + +static void pxa2xx_pcm_free_dma_buffers(snd_pcm_t *pcm) +{ + snd_pcm_substream_t *substream; + struct snd_dma_buffer *buf; + int stream; + + for (stream = 0; stream < 2; stream++) { + substream = pcm->streams[stream].substream; + if (!substream) + continue; + buf = &substream->dma_buffer; + if (!buf->area) + continue; + dma_free_writecombine(pcm->card->dev, buf->bytes, + buf->area, buf->addr); + buf->area = NULL; + } +} + +static u64 pxa2xx_pcm_dmamask = 0xffffffff; + +int pxa2xx_pcm_new(snd_card_t *card, snd_soc_pcm_codec_t *pcm_c, + int play, int capt, snd_pcm_t *pcm) +{ + int ret = 0; + + pcm->private_free = pxa2xx_pcm_free_dma_buffers; + if (!card->dev->dma_mask) + card->dev->dma_mask = &pxa2xx_pcm_dmamask; + if (!card->dev->coherent_dma_mask) + card->dev->coherent_dma_mask = 0xffffffff; + + if (play) { + ret = pxa2xx_pcm_preallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK); + if (ret) + goto out; + } + + if (capt) { + ret = pxa2xx_pcm_preallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE); + if (ret) + goto out; + } + out: + return ret; +} + +snd_soc_platform_t pxa2xx_soc_platform; + +static int pxa2xx_soc_probe(void) +{ + return 0; +} + +static void pxa2xx_soc_remove(void) +{ +} + +static int __init pxa2xx_soc_init(void) +{ + return snd_soc_register_platform(&pxa2xx_soc_platform); +} + +static void __exit pxa2xx_soc_exit(void) +{ + snd_soc_unregister_platform(&pxa2xx_soc_platform); +} + +snd_soc_platform_t pxa2xx_soc_platform = { + .name = "pxa2xx-soc", + .probe = pxa2xx_soc_probe, + .remove = pxa2xx_soc_remove, + .pcm_ops = &pxa2xx_pcm_ops, + .pcm_new = pxa2xx_pcm_new, +}; + +module_init(pxa2xx_soc_init); +module_exit(pxa2xx_soc_exit); + +EXPORT_SYMBOL(pxa2xx_pcm_new); + +MODULE_AUTHOR("Nicolas Pitre"); +MODULE_DESCRIPTION("Intel PXA2xx PCM DMA module"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/pxa/pxa2xx-pcm.h b/sound/soc/pxa/pxa2xx-pcm.h new file mode 100644 index 0000000..d7504d3 --- /dev/null +++ b/sound/soc/pxa/pxa2xx-pcm.h @@ -0,0 +1,26 @@ +/* + * linux/sound/arm/pxa2xx-pcm.h -- ALSA PCM interface for the Intel PXA2xx chip + * + * Author: Nicolas Pitre + * Created: Nov 30, 2004 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +typedef struct { + char *name; /* stream identifier */ + u32 dcmd; /* DMA descriptor dcmd field */ + volatile u32 *drcmr; /* the DMA request channel to use */ + u32 dev_addr; /* device physical address for DMA */ +} pxa2xx_pcm_dma_params_t; + +typedef struct { + u32 rx; + u32 tx; + u32 clk; + u32 frm; +} pxa2xx_gpio_t; + diff --git a/sound/soc/pxa/pxa2xx-ssp.c b/sound/soc/pxa/pxa2xx-ssp.c new file mode 100644 index 0000000..ae1eec8 --- /dev/null +++ b/sound/soc/pxa/pxa2xx-ssp.c @@ -0,0 +1,429 @@ +/* + * pxa2xx-ssp.c -- ALSA Soc Audio Layer + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 12th Aug 2005 Initial version. + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "pxa2xx-pcm.h" + +/* + * SSP GPIO's + */ +#define GPIO26_SSP1RX_MD (26 | GPIO_ALT_FN_1_IN) +#define GPIO25_SSP1TX_MD (25 | GPIO_ALT_FN_2_OUT) +#define GPIO23_SSP1CLKS_MD (23 | GPIO_ALT_FN_2_IN) +#define GPIO24_SSP1FRMS_MD (24 | GPIO_ALT_FN_2_IN) +#define GPIO23_SSP1CLKM_MD (23 | GPIO_ALT_FN_2_OUT) +#define GPIO24_SSP1FRMM_MD (24 | GPIO_ALT_FN_2_OUT) + +#define GPIO11_SSP2RX_MD (11 | GPIO_ALT_FN_2_IN) +#define GPIO13_SSP2TX_MD (13 | GPIO_ALT_FN_1_OUT) +#define GPIO22_SSP2CLKS_MD (22 | GPIO_ALT_FN_3_IN) +#define GPIO88_SSP2FRMS_MD (88 | GPIO_ALT_FN_3_IN) +#define GPIO22_SSP2CLKM_MD (22 | GPIO_ALT_FN_3_OUT) +#define GPIO88_SSP2FRMM_MD (88 | GPIO_ALT_FN_3_OUT) + +#define GPIO82_SSP3RX_MD (82 | GPIO_ALT_FN_1_IN) +#define GPIO81_SSP3TX_MD (81 | GPIO_ALT_FN_1_OUT) +#define GPIO84_SSP3CLKS_MD (84 | GPIO_ALT_FN_1_IN) +#define GPIO83_SSP3FRMS_MD (83 | GPIO_ALT_FN_1_IN) +#define GPIO84_SSP3CLKM_MD (84 | GPIO_ALT_FN_1_OUT) +#define GPIO83_SSP3FRMM_MD (83 | GPIO_ALT_FN_1_OUT) + +#define PXA_SSP_HWFMT \ + (SND_SOC_HWFMT_DSP_B |SND_SOC_HWFMT_CBM_CFM | SND_SOC_HWFMT_CBM_CFS | \ + SND_SOC_HWFMT_CBS_CFM | SND_SOC_HWFMT_CBS_CFS | SND_SOC_HWFMT_NB_NF | \ + SND_SOC_HWFMT_NB_IF) + +/* + * priv1 is scr divider when in master mode + * -- liam, need some method of "doesn't matter" for fs, maybe 0 + */ +static snd_soc_hw_mode_t pxa2xx_ssp[] = { + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 8000, 256, 1626}, + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 8000, 384, 1626}, + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 11025, 256, 1180}, + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 16000, 256, 813}, + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 22050, 256, 590}, + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 44100, 256, 295}, + {PXA_SSP_HWFMT, SND_SOC_HWBITS(16), 48000, 256, 271}, +}; + +static struct ssp_dev ssp[3]; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_mono_out = { + .name = "SSP1 PCM Mono out", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRTXSSDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_mono_in = { + .name = "SSP1 PCM Mono in", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRRXSSDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_stereo_out = { + .name = "SSP1 PCM Stereo out", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRTXSSDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_stereo_in = { + .name = "SSP1 PCM Stereo in", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRRXSSDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp2_pcm_mono_out = { + .name = "SSP2 PCM Mono out", + .dev_addr = __PREG(SSDR_P2), + .drcmr = &DRCMRTXSS2DR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp2_pcm_mono_in = { + .name = "SSP2 PCM Mono in", + .dev_addr = __PREG(SSDR_P2), + .drcmr = &DRCMRRXSS2DR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp2_pcm_stereo_out = { + .name = "SSP2 PCM Stereo out", + .dev_addr = __PREG(SSDR_P2), + .drcmr = &DRCMRTXSS2DR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp2_pcm_stereo_in = { + .name = "SSP2 PCM Stereo in", + .dev_addr = __PREG(SSDR_P2), + .drcmr = &DRCMRRXSS2DR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp3_pcm_mono_out = { + .name = "SSP3 PCM Mono out", + .dev_addr = __PREG(SSDR_P3), + .drcmr = &DRCMRTXSS3DR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp3_pcm_mono_in = { + .name = "SSP3 PCM Mono in", + .dev_addr = __PREG(SSDR_P3), + .drcmr = &DRCMRRXSS3DR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp3_pcm_stereo_out = { + .name = "SSP3 PCM Stereo out", + .dev_addr = __PREG(SSDR_P3), + .drcmr = &DRCMRTXSS3DR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp3_pcm_stereo_in = { + .name = "SSP3 PCM Stereo in", + .dev_addr = __PREG(SSDR_P3), + .drcmr = &DRCMRRXSS3DR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t *ssp_dma_params[3][4] = { + {&pxa2xx_ssp1_pcm_mono_out, &pxa2xx_ssp1_pcm_mono_in, + &pxa2xx_ssp1_pcm_stereo_out,&pxa2xx_ssp1_pcm_stereo_in,}, + {&pxa2xx_ssp2_pcm_mono_out, &pxa2xx_ssp2_pcm_mono_in, + &pxa2xx_ssp2_pcm_stereo_out, &pxa2xx_ssp2_pcm_stereo_in,}, + {&pxa2xx_ssp3_pcm_mono_out, &pxa2xx_ssp3_pcm_mono_in, + &pxa2xx_ssp3_pcm_stereo_out,&pxa2xx_ssp3_pcm_stereo_in,}, +}; + +static pxa2xx_gpio_t ssp_gpios[3][2] = { + {{ /* SSP1 Slave */ + .rx = GPIO26_SSP1RX_MD, + .tx = GPIO25_SSP1TX_MD, + .clk = GPIO23_SSP1CLKS_MD, + .frm = GPIO24_SSP1FRMS_MD, + }, + { /* SSP1 Master */ + .rx = GPIO26_SSP1RX_MD, + .tx = GPIO25_SSP1TX_MD, + .clk = GPIO23_SSP1CLKM_MD, + .frm = GPIO24_SSP1FRMM_MD, + }}, + {{ /* SSP2 Slave */ + .rx = GPIO11_SSP2RX_MD, + .tx = GPIO13_SSP2TX_MD, + .clk = GPIO22_SSP2CLKS_MD, + .frm = GPIO88_SSP2FRMS_MD, + }, + { /* SSP2 Master */ + .rx = GPIO11_SSP2RX_MD, + .tx = GPIO13_SSP2TX_MD, + .clk = GPIO22_SSP2CLKM_MD, + .frm = GPIO88_SSP2FRMM_MD, + }}, + {{ /* SSP3 Slave */ + .rx = GPIO82_SSP3RX_MD, + .tx = GPIO81_SSP3TX_MD, + .clk = GPIO84_SSP3CLKS_MD, + .frm = GPIO83_SSP3FRMS_MD, + }, + { /* SSP3 Master */ + .rx = GPIO82_SSP3RX_MD, + .tx = GPIO81_SSP3TX_MD, + .clk = GPIO84_SSP3CLKM_MD, + .frm = GPIO83_SSP3FRMM_MD, + }}, +}; + +static int pxa2xx_ssp_startup(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + int ret = 0; + + if((ret = ssp_init (&ssp[pcm_i->id], pcm_i->id + 1, SSP_NO_IRQ)) < 0) + return ret; + + ssp_disable(&ssp[pcm_i->id]); + return ret; +} + +static void pxa2xx_ssp_shutdown(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + +#if defined (CONFIG_MACH_MAINSTONE) + if(pcm_i->id == 1) { + /* disable USB on the go MUX so we can use ttyS0 */ + MST_MSCWR2 &= ~MST_MSCWR2_USB_OTG_SEL; + MST_MSCWR2 |= MST_MSCWR2_USB_OTG_RST; + } +#endif + + ssp_disable(&ssp[pcm_i->id]); + ssp_exit(&ssp[pcm_i->id]); +} + +static int pxa2xx_ssp_hw_params(snd_pcm_substream_t *substream, + snd_pcm_hw_params_t *params) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + int master = 0, dma = 0; + + if(pcm_i->hw_runtime.hformat & SND_SOC_HWFMT_CBS_CFS) + master = 1; + + pxa_gpio_mode(ssp_gpios[pcm_i->id][master].rx); + pxa_gpio_mode(ssp_gpios[pcm_i->id][master].tx); + pxa_gpio_mode(ssp_gpios[pcm_i->id][master].frm); + pxa_gpio_mode(ssp_gpios[pcm_i->id][master].clk); + + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + dma = 1; + if (params_channels(params) == 2) + dma += 2; + pcm_i->platform_data = ssp_dma_params[pcm_i->id][dma]; + +printk("hw sub rate %d chn %d\n", params_rate(params), params_channels(params)); + +#if defined(CONFIG_MACH_MAINSTONE) + if(pcm_i->id == 1) { + /* enable USB on the go MUX so we can use SSPFRM2 */ + MST_MSCWR2 |= MST_MSCWR2_USB_OTG_SEL; + MST_MSCWR2 &= ~MST_MSCWR2_USB_OTG_RST; + } +#endif + return 0; +} + +static int pxa2xx_ssp_prepare(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + u32 ssp_mode = 0, ssp_setup = 0, psp_mode = 0; + int bits = generic_ffs(pcm_i->hw_runtime.hbits); + + ssp_mode = SSCR0_PSP | SSCR0_DataSize(bits); + ssp_setup = SSCR1_RxTresh(14) | SSCR1_TxTresh(1) | SSCR1_TRAIL | + SSCR1_TSRE | SSCR1_RSRE | SSCR1_TIE | SSCR1_RIE; + + switch(pcm_i->hw_runtime.hformat & SND_SOC_CLOCK_MASK) { + case SND_SOC_HWFMT_CBM_CFM: + ssp_setup |= (SSCR1_SCLKDIR | SSCR1_SFRMDIR); + break; + case SND_SOC_HWFMT_CBM_CFS: + ssp_setup |= SSCR1_SCLKDIR; + break; + case SND_SOC_HWFMT_CBS_CFM: + ssp_setup |= SSCR1_SFRMDIR; + break; + } + + switch(pcm_i->hw_runtime.hformat & SND_SOC_INV_MASK){ + case SND_SOC_HWFMT_NB_NF: + psp_mode |= SSPSP_SFRMP; + break; + } + if (pcm_i->hw_runtime.hformat & SND_SOC_HWFMT_DSP_A) + psp_mode |= SSPSP_SCMODE(2); + if (pcm_i->hw_runtime.hformat & SND_SOC_HWFMT_DSP_B) + psp_mode |= SSPSP_SCMODE(3); + + ssp_disable(&ssp[pcm_i->id]); + ssp_config(&ssp[pcm_i->id], ssp_mode, ssp_setup, psp_mode, + SSCR0_SerClkDiv(pcm_i->hw_runtime.priv1)); + ssp_enable(&ssp[pcm_i->id]); + + return 0; +} + + +static snd_soc_pcm_interface_t pxa_ssp_interfaces[] = { + { .name = "pxa2xx-ssp1", + .id = 0, + .type = SND_SOC_SSP, + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 2,}, + .ops = { + .startup = pxa2xx_ssp_startup, + .shutdown = pxa2xx_ssp_shutdown, + .prepare = pxa2xx_ssp_prepare, + .hw_params = pxa2xx_ssp_hw_params,}, + .hw = { + .hmodes = &pxa2xx_ssp[0], + .num_hmodes = ARRAY_SIZE(pxa2xx_ssp),}, + }, + { .name = "pxa2xx-ssp2", + .id = 1, + .type = SND_SOC_SSP, + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .startup = pxa2xx_ssp_startup, + .shutdown = pxa2xx_ssp_shutdown, + .prepare = pxa2xx_ssp_prepare, + .hw_params = pxa2xx_ssp_hw_params,}, + .hw = { + .hmodes = &pxa2xx_ssp[0], + .num_hmodes = ARRAY_SIZE(pxa2xx_ssp),}, + }, + { .name = "pxa2xx-ssp3", + .id = 2, + .type = SND_SOC_SSP, + .playback = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .startup = pxa2xx_ssp_startup, + .shutdown = pxa2xx_ssp_shutdown, + .prepare = pxa2xx_ssp_prepare, + .hw_params = pxa2xx_ssp_hw_params,}, + .hw = { + .hmodes = &pxa2xx_ssp[0], + .num_hmodes = ARRAY_SIZE(pxa2xx_ssp),}, + }, +}; + +static int __init pxa2xx_soc_ssp_init(void) +{ + snd_soc_register_interface(&pxa_ssp_interfaces[0]); + snd_soc_register_interface(&pxa_ssp_interfaces[1]); + snd_soc_register_interface(&pxa_ssp_interfaces[2]); + return 0; +} + +static void __exit pxa2xx_soc_ssp_exit(void) +{ + snd_soc_unregister_interface(&pxa_ssp_interfaces[2]); + snd_soc_unregister_interface(&pxa_ssp_interfaces[1]); + snd_soc_unregister_interface(&pxa_ssp_interfaces[0]); +} + +EXPORT_SYMBOL_GPL(pxa_ssp_interfaces); + +module_init(pxa2xx_soc_ssp_init); +module_exit(pxa2xx_soc_ssp_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("pxa2xx SSP/PCM SoC Interface"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c new file mode 100644 index 0000000..e41b377 --- /dev/null +++ b/sound/soc/soc-core.c @@ -0,0 +1,697 @@ +/* + * soc-core.c -- ALSA Soc Audio Layer + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 12th Aug 2005 Initial version. + * + * TODO: + * o Check return values for interface and codec calbacks + * o Should probably add hw rules to enforce rates, etc. + * o Testing..... + * o Add more codecs and platforms to ensure good API coverage. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define SND_SOC_VERSION "0.1" + +#define iface_name(x) \ + (((x) == SND_SOC_AC97) ? "ac97" : ((x) == SND_SOC_I2S) ? "i2s" : ((x) == SND_SOC_SSP) ? "ssp" : NULL) + +static DECLARE_MUTEX(soc_sem); +static LIST_HEAD(codecs); +static LIST_HEAD(interfaces); +struct snd_soc_platform *platform = NULL; + +int snd_soc_update_bits(snd_soc_codec_t *codec, unsigned short reg, + unsigned short mask, unsigned short value) +{ + int change; + unsigned short old, new; + + old = snd_soc_read(codec, reg); + new = (old & ~mask) | value; + change = old != new; + if (change) + snd_soc_write(codec, reg, new); + + return change; +} + +int snd_soc_test_bits(snd_soc_codec_t *codec, unsigned short reg, + unsigned short mask, unsigned short value) +{ + int change; + unsigned short old, new; + + old = snd_soc_read(codec, reg); + new = (old & ~mask) | value; + change = old != new; + + return change; +} + + +static int soc_match_hw(snd_soc_hw_mode_t *c, snd_soc_hw_mode_t *i, int rate, int fs) +{ + if (c->rate != i->rate) + return 0; + + if (c->rate != rate) + return 0; + + if (c->fs != i->fs) + return 0; + + if (!(c->hformat & i->hformat & SND_SOC_FORMAT_MASK)) + return 0; + + if (!(c->hformat & i->hformat & SND_SOC_CLOCK_MASK)) + return 0; + + if (!(c->hformat & i->hformat & SND_SOC_INV_MASK)) + return 0; + + if (i->fs < fs) + return i->fs; +} + +static int soc_check_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *params) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + int fs = 2048, i, j, match = 0; + + for (i = 0; i < pcm_c->hw.num_hmodes; i++) { + for (j = 0; j < pcm_i->hw.num_hmodes; j++) { + if (soc_match_hw(&pcm_c->hw.hmodes[i], &pcm_i->hw.hmodes[j], + params_rate(params), fs)) { + pcm_c->hw_runtime = pcm_c->hw.hmodes[i]; + pcm_i->hw_runtime = pcm_i->hw.hmodes[j]; + fs = pcm_c->hw.hmodes[i].fs; + match = 1; + } + } + } + + if (!match) + return -EINVAL; + + pcm_i->hw_runtime.hformat = + 1 << (generic_ffs(pcm_i->hw_runtime.hformat & pcm_c->hw_runtime.hformat & SND_SOC_FORMAT_MASK) -1) | + 1 << (generic_ffs(pcm_i->hw_runtime.hformat & pcm_c->hw_runtime.hformat & SND_SOC_CLOCK_MASK) - 1) | + 1 << (generic_ffs(pcm_i->hw_runtime.hformat & pcm_c->hw_runtime.hformat & SND_SOC_INV_MASK) - 1); + + pcm_i->hw_runtime.hbits = pcm_i->hw_runtime.hbits & pcm_c->hw_runtime.hbits; + pcm_c->hw_runtime.hformat = pcm_i->hw_runtime.hformat; + pcm_c->hw_runtime.hbits = pcm_i->hw_runtime.hbits; + + printk("c rate %d fs %d format %x\n", pcm_c->hw_runtime.rate, pcm_c->hw_runtime.fs, pcm_c->hw_runtime.hformat); + printk("i rate %d fs %d format %x\n", pcm_i->hw_runtime.rate, pcm_i->hw_runtime.fs, pcm_i->hw_runtime.hformat); + printk("hw sub rate %d chn %d\n", params_rate(params), params_channels(params)); + + return 0; +} + +static int soc_pcm_open(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + snd_pcm_runtime_t *runtime = substream->runtime; + + /* Check that the codec and SoC audio interface's are compatible */ + if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + runtime->hw.rates = pcm_c->playback.rates & pcm_i->playback.rates; + runtime->hw.formats = pcm_c->playback.formats & pcm_i->playback.formats; + runtime->hw.rate_min = max(pcm_c->playback.rate_min, pcm_i->playback.rate_min); + runtime->hw.rate_max = min(pcm_c->playback.rate_max, pcm_i->playback.rate_max); + runtime->hw.channels_min = max(pcm_c->playback.channels_min, pcm_i->playback.channels_min); + runtime->hw.channels_max = min(pcm_c->playback.channels_max, pcm_i->playback.channels_max); + } else { + runtime->hw.rates = pcm_c->capture.rates & pcm_i->capture.rates; + runtime->hw.formats = pcm_c->capture.formats & pcm_i->capture.formats; + runtime->hw.rate_min = max(pcm_c->capture.rate_min, pcm_i->capture.rate_min); + runtime->hw.rate_max = min(pcm_c->capture.rate_max, pcm_i->capture.rate_max); + runtime->hw.channels_min = max(pcm_c->capture.channels_min, pcm_i->capture.channels_min); + runtime->hw.channels_max = min(pcm_c->capture.channels_max, pcm_i->capture.channels_max); + } + snd_pcm_limit_hw_rates(runtime); + if (!runtime->hw.rates) { + printk(KERN_ERR "%s <-> %s No matching rates\n", pcm_c->name, pcm_i->name); + return -ENODEV; + } + if(!runtime->hw.formats) { + printk(KERN_ERR "%s <-> %s No matching formats\n", pcm_c->name, pcm_i->name); + return -ENODEV; + } + if(!runtime->hw.channels_min || !runtime->hw.channels_max) { + printk(KERN_ERR "%s <-> %s No matching channels\n", pcm_c->name, pcm_i->name); + return -ENODEV; + } + printk(KERN_INFO "%s <-> %s info:\n", pcm_c->name, pcm_i->name); + printk(KERN_INFO "rates %x n\nmin ch %d max ch %d\nmin rate %d max rate %d\n", + runtime->hw.rates, runtime->hw.channels_min, + runtime->hw.channels_max, runtime->hw.rate_min, runtime->hw.rate_max); + + if(pcm_i->ops.startup) + pcm_i->ops.startup(substream); + + if(platform->pcm_ops->open) + platform->pcm_ops->open(substream); + + if(pcm_c->ops.startup) + pcm_c->ops.startup(substream); + + return 0; +} + +static int soc_pcm_close(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + + if(pcm_i->ops.shutdown) + pcm_i->ops.shutdown(substream); + + if(pcm_c->ops.shutdown) + pcm_c->ops.shutdown(substream); + + if(platform->pcm_ops->close) + platform->pcm_ops->close(substream); + + return 0; +} + +static int soc_pcm_prepare(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + + if(platform->pcm_ops->prepare) + platform->pcm_ops->prepare(substream); + + if(pcm_c->ops.prepare) + pcm_c->ops.prepare(substream); + + if(pcm_i->ops.prepare) + pcm_i->ops.prepare(substream); + + return 0; +} + +static int soc_pcm_trigger(snd_pcm_substream_t *substream, int cmd) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + + if(pcm_c->ops.trigger) + pcm_c->ops.trigger(substream, cmd); + + if(pcm_i->ops.trigger) + pcm_i->ops.trigger(substream, cmd); + + if(platform->pcm_ops->trigger) + platform->pcm_ops->trigger(substream, cmd); + + return 0; +} + +static int soc_pcm_hw_params(snd_pcm_substream_t *substream, + snd_pcm_hw_params_t *params) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + int ret; + + /* prepare hw non AC97 only */ + if(pcm_i->type != SND_SOC_AC97) { + if((ret = soc_check_hw_params(substream, params)) < 0) + return ret; + } + + if(pcm_c->ops.hw_params) + pcm_c->ops.hw_params(substream, params); + + if(pcm_i->ops.hw_params) + pcm_i->ops.hw_params(substream, params); + + if(platform->pcm_ops->hw_params) + platform->pcm_ops->hw_params(substream, params); + + return 0; +} + +static int soc_pcm_hw_free(snd_pcm_substream_t *substream) +{ + snd_soc_pcm_codec_t *pcm_c = substream->private_data; + snd_soc_pcm_interface_t *pcm_i = pcm_c->pcm_i; + + if(pcm_c->ops.hw_free) + pcm_c->ops.hw_free(substream); + + if(pcm_i->ops.hw_free) + pcm_i->ops.hw_free(substream); + + if(platform->pcm_ops->hw_free) + platform->pcm_ops->hw_free(substream); + + return 0; +} + +static snd_pcm_ops_t soc_pcm_ops = { + .open = soc_pcm_open, + .close = soc_pcm_close, + .hw_params = soc_pcm_hw_params, + .hw_free = soc_pcm_hw_free, + .prepare = soc_pcm_prepare, + .trigger = soc_pcm_trigger, +}; + +static int soc_probe_codec(snd_soc_codec_t *codec) +{ + int ret = 0; +//printk("%s %s %d\n", __FILE__, __FUNCTION__, __LINE__); + /* register a sound card */ + codec->card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, codec->owner, 0); + if (!codec->card) + return -ENODEV; + + platform_device_register(&codec->pdev); + codec->card->dev = &codec->pdev.dev; + //strncpy(codec.card->driver, dev->driver->name, sizeof(codec.card->driver)); + strncpy(codec->card->driver, "blah", sizeof(codec->card->driver)); + + if((ret = codec->probe(codec)) < 0) { + snd_card_free(codec->card); + platform_device_unregister(&codec->pdev); + codec->card = NULL; + return ret; + } + + snprintf(codec->card->shortname, sizeof(codec->card->shortname), + "%s", codec->name); + snprintf(codec->card->longname, sizeof(codec->card->longname), + "%s (%s)", codec->longname, "crapo"); + + if((ret = snd_card_register(codec->card)) < 0) { + snd_card_free(codec->card); + platform_device_unregister(&codec->pdev); + codec->card = NULL; + return ret; + } + codec->probed = 1; + + return ret; +} + +static int soc_remove_codec(snd_soc_codec_t *codec) +{ + snd_soc_dpm_widget_t *w; + snd_soc_dpm_path_t *p; + struct list_head *l; + + if (!codec->probed) + return 0; + + if (codec->card) { + snd_card_free(codec->card); + platform_device_unregister(&codec->pdev); + codec->card = NULL; + } + + list_for_each(l, &codec->dpm_widgets) + { + w = list_entry(l, snd_soc_dpm_widget_t, list); + kfree(w); + } + list_del_init(&codec->dpm_widgets); + + list_for_each(l, &codec->dpm_paths) + { + p = list_entry(l, snd_soc_dpm_path_t, list); + if(p->long_name) + kfree(p->long_name); + kfree(p); + } + list_del_init(&codec->dpm_paths); + + codec->remove(codec); + codec->probed = 0; + return 0; +} + +int snd_soc_register_codec(snd_soc_codec_t *codec) +{ + down(&soc_sem); + INIT_LIST_HEAD(&codec->list); + INIT_LIST_HEAD(&codec->dpm_widgets); + INIT_LIST_HEAD(&codec->dpm_paths); + list_add(&codec->list, &codecs); + + up(&soc_sem); + if (platform) + soc_probe_codec(codec); + + return 0; +} + +void snd_soc_unregister_codec(snd_soc_codec_t *codec) +{ + down(&soc_sem); + list_del_init(&codec->list); + if (platform) + soc_remove_codec(codec); + up(&soc_sem); +} + +int snd_soc_register_interface(snd_soc_pcm_interface_t *iface) +{ + down (&soc_sem); + INIT_LIST_HEAD(&iface->list); + list_add(&iface->list, &interfaces); + up(&soc_sem); + return 0; +} + +void snd_soc_unregister_interface(snd_soc_pcm_interface_t *iface) +{ + down(&soc_sem); + list_del_init(&iface->list); + up(&soc_sem); +} + +int snd_soc_register_platform(snd_soc_platform_t *p) +{ + struct list_head *l; + snd_soc_codec_t *c; + + down(&soc_sem); + if(platform) { + up(&soc_sem); + return -EBUSY; + } + platform = p; + soc_pcm_ops.mmap = p->pcm_ops->mmap; + soc_pcm_ops.pointer = p->pcm_ops->pointer; + soc_pcm_ops.ioctl = p->pcm_ops->ioctl; + + up(&soc_sem); + platform->probe(); + + list_for_each(l, &codecs) { + c = list_entry(l, snd_soc_codec_t, list); + soc_probe_codec(c); + } + + return 0; +} + +void snd_soc_unregister_platform(snd_soc_platform_t *platform) +{ + struct list_head *l; + snd_soc_codec_t *c; + + down(&soc_sem); + list_for_each(l, &codecs) { + c = list_entry(l, snd_soc_codec_t, list); + soc_remove_codec(c); + } + up(&soc_sem); + + platform->remove(); + down(&soc_sem); + platform = NULL; + up(&soc_sem); +} + +int snd_soc_pcm_new(snd_card_t *card, int dev_no, snd_soc_pcm_codec_t *pcm_c, + snd_pcm_t **rpcm, int play, int capt, int iface_type, int num) +{ + snd_pcm_t *pcm; + int ret; + struct list_head *l; + snd_soc_pcm_interface_t *i = NULL; + char name[32]; + + down(&soc_sem); + list_for_each(l, &interfaces) { + i = list_entry(l, snd_soc_pcm_interface_t, list); + if (i->type == iface_type && i->id == num){ + if (i->pcm_c){ + up(&soc_sem); + return -EBUSY; + } else + break; + } + } + + /* check client and interface hw capabilities */ + pcm_c->pcm_i = i; + i->pcm_c = pcm_c; + sprintf(name, "%s-%s-%d", pcm_c->name, iface_name(iface_type), num); + ret = snd_pcm_new(card, name, dev_no, play, capt, &pcm); + if (ret) + goto out; + + pcm->private_data = pcm_c; + if (play) + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &soc_pcm_ops); + + if (capt) + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &soc_pcm_ops); + + if((ret = platform->pcm_new(card, pcm_c, play, capt, pcm)) < 0) + goto out; + + if (rpcm) + *rpcm = pcm; + + printk(KERN_INFO "%s <-> %s mapping ok\n", pcm_c->name, i->name); +out: + up(&soc_sem); + return ret; +} + +int snd_soc_iface_query(int iface_type, int num) +{ + struct list_head *l; + snd_soc_pcm_interface_t *i; + + down(&soc_sem); + list_for_each(l, &interfaces) { + i = list_entry(l, snd_soc_pcm_interface_t, list); + if (i->type == iface_type && i->id == num){ + up(&soc_sem); + return 0; + } + } + up(&soc_sem); + return -ENODEV; +} + +int snd_soc_set_runtime_hw(snd_pcm_substream_t *substream, const snd_pcm_hardware_t *hw) +{ + snd_pcm_runtime_t *runtime = substream->runtime; + runtime->hw.info = hw->info; + runtime->hw.formats = hw->formats; + runtime->hw.period_bytes_min = hw->period_bytes_min; + runtime->hw.period_bytes_max = hw->period_bytes_max; + runtime->hw.periods_min = hw->periods_min; + runtime->hw.periods_max = hw->periods_max; + runtime->hw.buffer_bytes_max = hw->buffer_bytes_max; + runtime->hw.fifo_size = hw->fifo_size; + return 0; +} + +snd_kcontrol_t *snd_soc_cnew(const snd_kcontrol_new_t *_template, + void *data, char *long_name) +{ + snd_kcontrol_new_t template; + memcpy(&template, _template, sizeof(template)); + if(long_name) + template.name = long_name; + snd_runtime_check(!template.index, return NULL); + //template.index = codec->num; + return snd_ctl_new1(&template, data); +} + +/* + * Controls + */ + +int snd_soc_info_enum_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) +{ + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->count = e->shift_l == e->shift_r ? 1 : 2; + uinfo->value.enumerated.items = e->mask; + + if (uinfo->value.enumerated.item > e->mask - 1) + uinfo->value.enumerated.item = e->mask - 1; + strcpy(uinfo->value.enumerated.name, e->texts[uinfo->value.enumerated.item]); + return 0; +} + +int snd_soc_dpm_get_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_dpm_widget_t *widget = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned short val, bitmask; + + for (bitmask = 1; bitmask < e->mask; bitmask <<= 1) + ; + val = snd_soc_read(widget->codec, e->reg); + ucontrol->value.enumerated.item[0] = (val >> e->shift_l) & (bitmask - 1); + if (e->shift_l != e->shift_r) + ucontrol->value.enumerated.item[1] = (val >> e->shift_r) & (bitmask - 1); + + return 0; +} + +int snd_soc_put_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_codec_t *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned short val; + unsigned short mask, bitmask; + + for (bitmask = 1; bitmask < e->mask; bitmask <<= 1) + ; + if (ucontrol->value.enumerated.item[0] > e->mask - 1) + return -EINVAL; + val = ucontrol->value.enumerated.item[0] << e->shift_l; + mask = (bitmask - 1) << e->shift_l; + if (e->shift_l != e->shift_r) { + if (ucontrol->value.enumerated.item[1] > e->mask - 1) + return -EINVAL; + val |= ucontrol->value.enumerated.item[1] << e->shift_r; + mask |= (bitmask - 1) << e->shift_r; + } + + return snd_soc_update_bits(codec, e->reg, mask, val); +} + +/* volume and switch controls */ +int snd_soc_info_volsw(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo) +{ + int mask = (kcontrol->private_value >> 16) & 0xff; + int shift = (kcontrol->private_value >> 8) & 0x0f; + int rshift = (kcontrol->private_value >> 12) & 0x0f; + + uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = shift == rshift ? 1 : 2; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = mask; + return 0; +} + +int snd_soc_get_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_codec_t *codec = snd_kcontrol_chip(kcontrol); + int reg = kcontrol->private_value & 0xff; + int shift = (kcontrol->private_value >> 8) & 0x0f; + int rshift = (kcontrol->private_value >> 12) & 0x0f; + int mask = (kcontrol->private_value >> 16) & 0xff; + int invert = (kcontrol->private_value >> 24) & 0x01; + + ucontrol->value.integer.value[0] = (snd_soc_read(codec, reg) >> shift) & mask; + if (shift != rshift) + ucontrol->value.integer.value[1] = (snd_soc_read(codec, reg) >> rshift) & mask; + if (invert) { + ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; + if (shift != rshift) + ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; + } + + return 0; +} + +int snd_soc_put_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_codec_t *codec = snd_kcontrol_chip(kcontrol); + int reg = kcontrol->private_value & 0xff; + int shift = (kcontrol->private_value >> 8) & 0x0f; + int rshift = (kcontrol->private_value >> 12) & 0x0f; + int mask = (kcontrol->private_value >> 16) & 0xff; + int invert = (kcontrol->private_value >> 24) & 0x01; + int err; + unsigned short val, val2, val_mask; + + val = (ucontrol->value.integer.value[0] & mask); + if (invert) + val = mask - val; + val_mask = mask << shift; + val = val << shift; + if (shift != rshift) { + val2 = (ucontrol->value.integer.value[1] & mask); + if (invert) + val2 = mask - val2; + val_mask |= mask << rshift; + val |= val2 << rshift; + } + err = snd_soc_update_bits(codec, reg, val_mask, val); + return err; +} + +static int __init snd_soc_init(void) +{ + printk(KERN_INFO "version %s liam.girdwood@wolfsonmicro.com\n", SND_SOC_VERSION); + return 0; +} + +static void __exit snd_soc_exit(void) +{ +} + +module_init(snd_soc_init); +module_exit(snd_soc_exit); + +EXPORT_SYMBOL_GPL(snd_soc_register_codec); +EXPORT_SYMBOL_GPL(snd_soc_unregister_codec); +EXPORT_SYMBOL_GPL(snd_soc_register_platform); +EXPORT_SYMBOL_GPL(snd_soc_unregister_platform); +EXPORT_SYMBOL_GPL(snd_soc_pcm_new); +EXPORT_SYMBOL_GPL(snd_soc_iface_query); +EXPORT_SYMBOL_GPL(snd_soc_register_interface); +EXPORT_SYMBOL_GPL(snd_soc_unregister_interface); +EXPORT_SYMBOL_GPL(snd_soc_set_runtime_hw); +EXPORT_SYMBOL_GPL(snd_soc_cnew); +EXPORT_SYMBOL_GPL(snd_soc_info_enum_double); +EXPORT_SYMBOL_GPL(snd_soc_get_enum_double); +EXPORT_SYMBOL_GPL(snd_soc_put_enum_double); +EXPORT_SYMBOL_GPL(snd_soc_info_volsw); +EXPORT_SYMBOL_GPL(snd_soc_get_volsw); +EXPORT_SYMBOL_GPL(snd_soc_put_volsw); +EXPORT_SYMBOL_GPL(snd_soc_update_bits); +EXPORT_SYMBOL_GPL(snd_soc_test_bits); + + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC Core"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/soc-dpm.c b/sound/soc/soc-dpm.c new file mode 100644 index 0000000..ec1f348 --- /dev/null +++ b/sound/soc/soc-dpm.c @@ -0,0 +1,490 @@ +/* + * soc-dpm.c -- ALSA Soc Dynamic Power Management + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 12th Aug 2005 Initial version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static snd_soc_dpm_widget_t *snd_soc_cnew_widget(const snd_soc_dpm_widget_t *_widget) +{ + snd_soc_dpm_widget_t* widget; + widget = kmalloc(sizeof(snd_soc_dpm_widget_t), GFP_KERNEL); + if (!widget) + return NULL; + + memcpy(widget, _widget, sizeof(snd_soc_dpm_widget_t)); + return widget; +} + +int snd_soc_dpm_new_control(snd_soc_codec_t *codec, const snd_soc_dpm_widget_t *widget) +{ + snd_soc_dpm_widget_t *w; + + if ((w = snd_soc_cnew_widget(widget)) == NULL) + return -ENOMEM; + + w->codec = codec; + INIT_LIST_HEAD(&w->inputs); + INIT_LIST_HEAD(&w->outputs); + INIT_LIST_HEAD(&w->list); + list_add(&w->list, &codec->dpm_widgets); + + return 0; +} + +int snd_soc_dpm_connect_input(snd_soc_codec_t *codec, char *dest_name, + char * control_name, char *src_name) +{ + snd_soc_dpm_path_t *path; + snd_soc_dpm_widget_t *src = NULL, *dest = NULL, *w; + struct list_head *l; + int i; + + list_for_each(l, &codec->dpm_widgets) + { + w = list_entry(l, snd_soc_dpm_widget_t, list); + + if(!(strcmp(w->name, dest_name))) { + dest = w; + continue; + } + if(!(strcmp(w->name, src_name))) { + src = w; + } + } + + if(src == NULL || dest == NULL) + return -ENODEV; + +printk("dest name %s src %s\n",dest->name, src->name); + path = kmalloc(sizeof(snd_soc_dpm_path_t), GFP_KERNEL); + if (!path) + return -ENOMEM; + memset(path, 0, sizeof(snd_soc_dpm_path_t)); + path->in = src; + path->out = dest; +printk("path in %s %p\n", src_name, src); +printk("path out %s %p\n", dest_name, dest); +printk ("path name %p\n", path); + INIT_LIST_HEAD(&path->list); + INIT_LIST_HEAD(&path->list_in); + INIT_LIST_HEAD(&path->list_out); + + + switch(dest->id){ + case snd_soc_dpm_volume: + case snd_soc_dpm_output: + case snd_soc_dpm_adc: + path->connect = 1; + break; + case snd_soc_dpm_mixer: + case snd_soc_dpm_mux: + path->connect = 0; + break; + } + + + if (control_name == NULL) { + list_add(&path->list, &codec->dpm_paths); + list_add(&path->list_out, &dest->inputs); + list_add(&path->list_in, &src->outputs); +printk("NULL ctrl path in %s %p\n", src_name, src); +printk("path out %s %p\n", dest_name, dest); + return 0; + } + + for (i = 0; i < dest->num_kcontrols; i++){ +printk("control %s dest %s\n",control_name, dest->kcontrols[i].name); + if(!strcmp(control_name, dest->kcontrols[i].name)) { + list_add(&path->list, &codec->dpm_paths); + list_add(&path->list_out, &dest->inputs); + list_add(&path->list_in, &src->outputs); + path->name = dest->kcontrols[i].name; +printk("named ctrl path in %s %p\n", src_name, src); +printk("path out %s %p\n", dest_name, dest); + return 0; + } + } + + kfree(path); + return -ENODEV; +} + +static void snd_soc_dpm_set_path_status(snd_soc_dpm_widget_t *w, + snd_soc_dpm_path_t *p, int i) +{ + switch (w->id) + { + case snd_soc_dpm_mixer: + { + int val; + int reg = w->kcontrols[i].private_value & 0xff; + int shift = (w->kcontrols[i].private_value >> 8) & 0x0f; + int mask = (w->kcontrols[i].private_value >> 16) & 0xff; + int invert = (w->kcontrols[i].private_value >> 24) & 0x01; + + val = snd_soc_read(w->codec, reg); + val = (reg >> shift) & mask; + + if((invert && !reg) || (!invert && reg)) + p->connect = 1; + else + p->connect = 0; + } + break; + case snd_soc_dpm_mux: + { + struct soc_enum *e = (struct soc_enum *)w->kcontrols[i].private_value; + p->connect = 0; + for (i = 0; i < e->mask; i++) { + if (!(strcmp(p->name, e->texts[i]))) + p->connect = 1; + } + } + break; + } +} + +/* + * Create DPM kcontrols + */ +#warning NEED to Sync with startup values and create paths and correct PM status +int snd_soc_dpm_sync(snd_soc_codec_t *codec) +{ + snd_soc_dpm_path_t *path; + snd_soc_dpm_widget_t *w = NULL; + struct list_head *lw, *lp; + int i, err; + char name[32]; + + list_for_each(lw, &codec->dpm_widgets) + { + w = list_entry(lw, snd_soc_dpm_widget_t, list); + printk("widget %s\n",w->name); + + /* add kcontrol */ + for (i = 0; i < w->num_kcontrols; i++) { + + /* match name */ + list_for_each(lp, &w->inputs) + { + path = list_entry(lp, snd_soc_dpm_path_t, list_out); + printk("path %s kc %s\n",path->name, w->kcontrols[i].name); + if (path->name == w->kcontrols[i].name) { + + /* add dpm control with long name */ + snprintf(name, 32, "%s %s", w->name, w->kcontrols[i].name); + path->long_name = kstrdup (name, GFP_KERNEL); + path->kcontrol = snd_soc_cnew(&w->kcontrols[i], w, path->long_name); + if ((err = snd_ctl_add(codec->card, path->kcontrol)) < 0) + return err; + printk(" path %s\n",path->long_name); + + /* set dpm widget connect status */ + snd_soc_dpm_set_path_status(w, path, i); + snd_soc_dpm_update_bits(w, 0); + } + } + } + } + return 0; +} + +static int snd_soc_dpm_update_bits(snd_soc_dpm_widget_t *widget, int power) +{ + int change; + unsigned short old, new; + snd_soc_codec_t *codec = widget->codec; + if(power) + power = 1; + + old = snd_soc_read(codec, widget->reg); + new = (old & ~(0x1 << widget->shift)) | (power << widget->shift); + + change = old != new; + //printk("test power %d block %s change %d\n", power, widget->name, change); + if (change) { + snd_soc_write(codec, widget->reg, new); + printk("**power block %s %d\n", widget->name, power); + } + return change; +} + +/* + * Check for a completed path to the input widget and that the input widget + * is connected to it's source end point. + */ +static int snd_soc_dpm_check_widget(snd_soc_dpm_widget_t *widget, int power) +{ + snd_soc_dpm_path_t *path = NULL; + struct list_head *lp; +//printk("w name %s id %d pwr %d\n", widget->name, widget->id, power); + switch(widget->id) { + case snd_soc_dpm_dac: /* ep */ + widget->active = 1; + power = widget->active; + break; + case snd_soc_dpm_input: /* ep */ + widget->connected = 1; + power = widget->connected & power; + break; + case snd_soc_dpm_adc: /* ep */ + widget->active = 1; + power = widget->active; + break; + case snd_soc_dpm_output: /* ep */ + widget->connected = 1; + power = widget->connected & power; + break; + case snd_soc_dpm_volume: + list_for_each(lp, &widget->inputs) + { + path = list_entry(lp, snd_soc_dpm_path_t, list_out); + if(path->checked) + continue; + //printk("w ipv %s %s pwr %d\n", widget->name, path->name, power); + if (path->in) { + path->checked = 1; + power |= snd_soc_dpm_check_widget(path->in, power); + } + } + list_for_each(lp, &widget->outputs) + { + path = list_entry(lp, snd_soc_dpm_path_t, list_in); + if(path->checked) + continue; + // printk("w opv %s %s pwr %d\n", widget->name, path->name, power); + if (path->out) { + path->checked = 1; + power |= snd_soc_dpm_check_widget(path->out, power); + } + } + break; + case snd_soc_dpm_mixer: + list_for_each(lp, &widget->inputs) + { + path = list_entry(lp, snd_soc_dpm_path_t, list_out); + if(path->checked) + continue; + // printk("ip %s %s conn %d pwr %d\n", widget->name, path->name, path->connect, power); + if (path->in) { + path->checked = 1; + power |= snd_soc_dpm_check_widget(path->in, path->connect & power) & path->connect; + } + + } + list_for_each(lp, &widget->outputs) + { + path = list_entry(lp, snd_soc_dpm_path_t, list_in); + if(path->checked) + continue; +//printk("op %s %s conn %d pwr %d\n", widget->name, path->name, path->connect, power); + if (path->out) { + path->checked = 1; + power |= snd_soc_dpm_check_widget(path->out, path->connect & power)& path->connect; + } + } + break; + case snd_soc_dpm_mux: + break; + } + + snd_soc_dpm_update_bits(widget, power); + return power; +} + +static snd_soc_dpm_widget_t * snd_soc_dpm_find_stream(snd_soc_codec_t *codec, + char* name) +{ + snd_soc_dpm_widget_t *w = NULL; + struct list_head *l = NULL; + + list_for_each(l, &codec->dpm_widgets) + { + w = list_entry(l, snd_soc_dpm_widget_t, list); + if (!strcmp(name, w->name)) + return w; + } + + return NULL; +} + +static snd_soc_dpm_widget_t * snd_soc_dpm_clear_paths(snd_soc_codec_t *codec) +{ + snd_soc_dpm_path_t *p = NULL; + struct list_head *l = NULL; + + list_for_each(l, &codec->dpm_paths) + { + p = list_entry(l, snd_soc_dpm_path_t, list); + p->checked = 0; + } +} + +static int snd_soc_dpm_update_path(snd_soc_dpm_widget_t *widget, + snd_kcontrol_t *kcontrol, int reg, int val_mask, int val) +{ + struct list_head *l; + snd_soc_dpm_path_t *path; + int power = 0; + + if (snd_soc_test_bits(widget->codec, reg, val_mask, val)) { + + list_for_each(l, &widget->codec->dpm_paths) + { + path = list_entry(l, snd_soc_dpm_path_t, list); + + if (path->kcontrol == kcontrol) { + if (widget->id == snd_soc_dpm_mixer) { + if (val) { + path->connect = 1; + power = 1; + } else + path->connect = 0; + } + if (widget->id == snd_soc_dpm_mux) { + } + #warning have to decide whether path is up/down + break; + } + } + + power = snd_soc_dpm_check_widget(widget, power); + } + + snd_soc_dpm_clear_paths(widget->codec); + return 0; +} + +static int snd_soc_dpm_update_stream(snd_soc_dpm_widget_t *widget, + snd_kcontrol_t *kcontrol) +{ +} + +int snd_soc_dpm_get_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_dpm_widget_t *widget = snd_kcontrol_chip(kcontrol); + int reg = kcontrol->private_value & 0xff; + int shift = (kcontrol->private_value >> 8) & 0x0f; + int rshift = (kcontrol->private_value >> 12) & 0x0f; + int mask = (kcontrol->private_value >> 16) & 0xff; + int invert = (kcontrol->private_value >> 24) & 0x01; + + ucontrol->value.integer.value[0] = (snd_soc_read(widget->codec, reg) >> shift) & mask; + if (shift != rshift) + ucontrol->value.integer.value[1] = (snd_soc_read(widget->codec, reg) >> rshift) & mask; + if (invert) { + ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; + if (shift != rshift) + ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; + } + + return 0; +} + +int snd_soc_dpm_put_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_dpm_widget_t *widget = snd_kcontrol_chip(kcontrol); + int reg = kcontrol->private_value & 0xff; + int shift = (kcontrol->private_value >> 8) & 0x0f; + int rshift = (kcontrol->private_value >> 12) & 0x0f; + int mask = (kcontrol->private_value >> 16) & 0xff; + int invert = (kcontrol->private_value >> 24) & 0x01; + int err; + unsigned short val, val2, val_mask; + + val = (ucontrol->value.integer.value[0] & mask); + if (invert) + val = mask - val; + val_mask = mask << shift; + val = val << shift; + if (shift != rshift) { + val2 = (ucontrol->value.integer.value[1] & mask); + if (invert) + val2 = mask - val2; + val_mask |= mask << rshift; + val |= val2 << rshift; + } + + snd_soc_dpm_update_path(widget, kcontrol, reg, val_mask, val); + + err = snd_soc_update_bits(widget->codec, reg, val_mask, val); + return err; +} + +int snd_soc_get_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_codec_t *codec = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned short val, bitmask; + + for (bitmask = 1; bitmask < e->mask; bitmask <<= 1) + ; + val = snd_soc_read(codec, e->reg); + ucontrol->value.enumerated.item[0] = (val >> e->shift_l) & (bitmask - 1); + if (e->shift_l != e->shift_r) + ucontrol->value.enumerated.item[1] = (val >> e->shift_r) & (bitmask - 1); + + return 0; +} + +int snd_soc_dpm_put_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol) +{ + snd_soc_dpm_widget_t *widget = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + unsigned short val; + unsigned short mask, bitmask; + + for (bitmask = 1; bitmask < e->mask; bitmask <<= 1) + ; + if (ucontrol->value.enumerated.item[0] > e->mask - 1) + return -EINVAL; + val = ucontrol->value.enumerated.item[0] << e->shift_l; + mask = (bitmask - 1) << e->shift_l; + if (e->shift_l != e->shift_r) { + if (ucontrol->value.enumerated.item[1] > e->mask - 1) + return -EINVAL; + val |= ucontrol->value.enumerated.item[1] << e->shift_r; + mask |= (bitmask - 1) << e->shift_r; + } + + return snd_soc_update_bits(widget->codec, e->reg, mask, val); +} + +EXPORT_SYMBOL_GPL(snd_soc_dpm_put_volsw); +EXPORT_SYMBOL_GPL(snd_soc_dpm_get_volsw); +EXPORT_SYMBOL_GPL(snd_soc_dpm_connect_input); +EXPORT_SYMBOL_GPL(snd_soc_dpm_new_control); +EXPORT_SYMBOL_GPL(snd_soc_dpm_sync); +EXPORT_SYMBOL_GPL(snd_soc_dpm_put_enum_double); +EXPORT_SYMBOL_GPL(snd_soc_dpm_get_enum_double); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC DPM"); +MODULE_LICENSE("GPL"); diff --git a/include/sound/soc-dpm.h b/include/sound/soc-dpm.h new file mode 100644 index 0000000..2d64ac5 --- /dev/null +++ b/include/sound/soc-dpm.h @@ -0,0 +1,149 @@ +/* + * linux/sound/soc-dpm.h -- ALSA SoC Dynamic Power Management + * + * Author: Liam Girdwood + * Created: Aug 11th 2005 + * Copyright: Wolfson Microelectronics. PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_SND_SOC_DPM_H +#define __LINUX_SND_SOC_DPM_H + +#include +#include +#include +#include + +/* + * SoC dynamic power managment + * + * We can have upto 4 power domains + * 1. Codec domain - VREF, VMID + * Usually controlled at codec probe/remove, although can be set + * at stream time if power is not needed for sidetone, etc. + * 2. Platform domain - physically connected inputs and outputs + * Is platform and stream specific and set in the .asoundrc file and + * automatically based on + * 3. Path domain - Internal codec path mixers + * Can be automatically set when mixer and paths settings are + * changed by the user. + * 4. Stream domain - DAC's and ADC's. + * Enabled when stream playback/capture is started. + */ + +/* codec domain */ +#define SND_SOC_DPM_CODEC(wname) \ +{.id = snd_soc_dpm_codec, .name = wname} + +/* platform domain */ +#define SND_SOC_DPM_INPUT(wname) \ +{.id = snd_soc_dpm_input, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0} +#define SND_SOC_DPM_OUTPUT(wname) \ +{.id = snd_soc_dpm_output, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0} + +/* path domain */ +#define SND_SOC_DPM_VOLUME(wname, preg, pshift, pinvert, wcontrols, wncontrols) \ +{.id = snd_soc_dpm_volume, .name = wname, .reg = preg, .shift = pshift, \ + .invert = pinvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} +#define SND_SOC_DPM_MUX(wname, preg, pshift, pinvert, wcontrols, wncontrols) \ +{.id = snd_soc_dpm_mux, .name = wname, .reg = preg, .shift = pshift, \ + .invert = pinvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} +#define SND_SOC_DPM_MIXER(wname, preg, pshift, pinvert, wcontrols, wncontrols) \ +{.id = snd_soc_dpm_mixer, .name = wname, .reg = preg, .shift = pshift, \ + .invert = pinvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} +#define SND_SOC_DPM_MIC(wname, preg, pshift, pinvert, wcontrols, wncontrols) \ +{.id = snd_soc_dpm_mic, .name = wname, .reg = preg, .shift = pshift, \ + .invert = pinvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} + +/* stream domain */ +#define SND_SOC_DPM_DAC(wname, stname, preg, pshift, pinvert, wcontrols, wncontrols) \ +{.id = snd_soc_dpm_dac, .name = wname, .sname = stname, .reg = preg, .shift = pshift, \ + .invert = pinvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} +#define SND_SOC_DPM_ADC(preg, stname, pshift, pinvert, wname, wcontrols, wncontrols) \ +{.id = snd_soc_dpm_adc, .name = wname, .sname = stname, .reg = preg, .shift = pshift, \ + .invert = pinvert,.kcontrols = wcontrols, .num_kcontrols = wncontrols} + +#define SOC_DPM_SINGLE(xname, reg, shift, mask, invert) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_volsw, \ + .get = snd_soc_dpm_get_volsw, .put = snd_soc_dpm_put_volsw, \ + .private_value = SOC_SINGLE_VALUE(reg, shift, mask, invert) } +#define SOC_DPM_DOUBLE(xname, reg, shift_left, shift_right, mask, invert, power) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_soc_info_volsw, \ + .get = snd_soc_dpm_get_volsw, .put = snd_soc_dpm_put_volsw, \ + .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 16) | ((invert) << 24) } +#define SOC_DPM_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_enum_double, \ + .get = snd_soc_dpm_get_enum_double, .put = snd_soc_dpm_put_enum_double, \ + .private_value = (unsigned long)&xenum } + +typedef struct snd_soc_dpm_widget snd_soc_dpm_widget_t; +typedef enum snd_soc_dpm_type snd_soc_dpm_type_t; +typedef struct snd_soc_dpm_path snd_soc_dpm_path_t; + +int snd_soc_dpm_put_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_dpm_get_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_dpm_get_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_dpm_put_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_dpm_new_control(snd_soc_codec_t *codec, const snd_soc_dpm_widget_t *widget); +int snd_soc_dpm_connect_input(snd_soc_codec_t *codec, char *target_name, + char *control_name, char *src_name); +int snd_soc_dpm_sync(snd_soc_codec_t *codec); + +enum snd_soc_dpm_type { + snd_soc_dpm_input = 0, + snd_soc_dpm_output, + snd_soc_dpm_mux, + snd_soc_dpm_mixer, + snd_soc_dpm_volume, + snd_soc_dpm_adc, + snd_soc_dpm_dac, + snd_soc_dpm_codec, +}; + +struct snd_soc_dpm_path { + char *name; + char *long_name; + snd_soc_dpm_widget_t *in; + snd_soc_dpm_widget_t *out; + snd_kcontrol_t *kcontrol; + + u8 connect:1; /* applies to widget inputs only */ + u8 checked:1; /* path has been checked */ + + struct list_head list_in; + struct list_head list_out; + struct list_head list; +}; + +struct snd_soc_dpm_widget { + snd_soc_dpm_type_t id; + char *name; + char *sname; + snd_soc_codec_t *codec; + struct list_head list; + + /* dpm control */ + unsigned short reg; + unsigned char shift; + unsigned char status; /* block rules status */ + unsigned char power:1; /* block power status */ + unsigned char invert:1; + unsigned char active:1; /* active stream on DAC, ADC's */ + unsigned char connected:1; + + /* kcontrols that relate to this widget */ + int num_kcontrols; + const snd_kcontrol_new_t * kcontrols; + + /* widget input and outputs */ + struct list_head inputs; + struct list_head outputs; +}; + +#endif diff --git a/include/sound/soc.h b/include/sound/soc.h new file mode 100644 index 0000000..917c79c --- /dev/null +++ b/include/sound/soc.h @@ -0,0 +1,257 @@ +/* + * linux/sound/soc.h -- ALSA SoC Layer + * + * Author: Liam Girdwood + * Created: Aug 11th 2005 + * Copyright: Wolfson Microelectronics. PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_SND_SOC_H +#define __LINUX_SND_SOC_H + +#include +#include +#include + +/* + * Convenience kcontrol builders + */ + +#define SOC_SINGLE_VALUE(reg,shift,mask,invert) ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | ((invert) << 24)) +#define SOC_SINGLE(xname, reg, shift, mask, invert) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_volsw, \ + .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \ + .private_value = SOC_SINGLE_VALUE(reg, shift, mask, invert) } +#define SOC_DOUBLE(xname, reg, shift_left, shift_right, mask, invert, power) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_soc_info_volsw, \ + .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \ + .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 16) | ((invert) << 24) } +#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \ +{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ + .mask = xmask, .texts = xtexts } +#define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \ + SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts) +#define SOC_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_enum_double, \ + .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ + .private_value = (unsigned long)&xenum } + + +/* + * Audio interface types + */ +#define SND_SOC_AC97 0x1 +#define SND_SOC_I2S 0x2 +#define SND_SOC_SSP 0x3 + +/* + * hw interface formats + */ +#define SND_SOC_HWFMT_I2S (1 << 0) /* I2S mode */ +#define SND_SOC_HWFMT_RIGHT_J (1 << 1) /* Right justified mode */ +#define SND_SOC_HWFMT_LEFT_J (1 << 2) /* Left Justified mode */ +#define SND_SOC_HWFMT_DSP_A (1 << 3) /* L data msb after FRM */ +#define SND_SOC_HWFMT_DSP_B (1 << 4) /* L data msb during FRM */ + +/* + * hw signal inversions + */ +#define SND_SOC_HWFMT_NB_NF (1 << 24) /* normal bit clock + frame */ +#define SND_SOC_HWFMT_NB_IF (1 << 25) /* normal bclk + inv frm */ +#define SND_SOC_HWFMT_IB_NF (1 << 26) /* invert bclk + nor frm */ +#define SND_SOC_HWFMT_IB_IF (1 << 27) /* invert bclc + frm */ + +/* + * hw clock masters + */ +#define SND_SOC_HWFMT_CBM_CFM (1 << 28) /* codec clk & frm master */ +#define SND_SOC_HWFMT_CBS_CFM (1 << 29) /* codec clk slave & frm master */ +#define SND_SOC_HWFMT_CBM_CFS (1 << 30) /* codec clk master & frame slave */ +#define SND_SOC_HWFMT_CBS_CFS (1 << 31) /* codec clk & frm slave */ + + +#define SND_SOC_FORMAT_MASK 0x000000ff +#define SND_SOC_INV_MASK 0x0f000000 +#define SND_SOC_CLOCK_MASK 0xf0000000 + +#define SND_SOC_HWBITS(x) (1 << (x - 1)) /* sample size in bits */ + +/* + * Codec IO + */ +#define snd_soc_read(codec, reg) codec->read(reg) +#define snd_soc_write(codec, reg, value) codec->write(reg, value) + +typedef struct snd_soc_codec snd_soc_codec_t; +typedef struct snd_soc_pcm_codec snd_soc_pcm_codec_t; +typedef struct snd_soc_platform snd_soc_platform_t; +typedef struct snd_soc_pcm_interface snd_soc_pcm_interface_t; +typedef struct snd_soc_pcm_stream snd_soc_pcm_stream_t; +typedef struct snd_soc_ops snd_soc_ops_t; +typedef struct snd_soc_hw_bus snd_soc_hw_bus_t; +typedef struct snd_soc_hw_mode snd_soc_hw_mode_t; + +/* + * Queries SoC layer for available interface + */ +int snd_soc_iface_query(int iface_type, int num); + +int snd_soc_register_codec(snd_soc_codec_t *codec); +void snd_soc_unregister_codec(snd_soc_codec_t *codec); + +int snd_soc_register_platform(snd_soc_platform_t *platform); +void snd_soc_unregister_platform(snd_soc_platform_t *platform); + +int snd_soc_register_interface(snd_soc_pcm_interface_t *iface); +void snd_soc_unregister_interface(snd_soc_pcm_interface_t *iface); + +int snd_soc_pcm_new(snd_card_t *card, int dev_no, snd_soc_pcm_codec_t *codec, + snd_pcm_t **rpcm, int play, int capt, int iface_type, int num); + +int snd_soc_set_runtime_hw(snd_pcm_substream_t *substream, + const snd_pcm_hardware_t *hw); + +int snd_soc_update_bits(snd_soc_codec_t *codec, unsigned short reg, + unsigned short mask, unsigned short value); + +int snd_soc_test_bits(snd_soc_codec_t *codec, unsigned short reg, + unsigned short mask, unsigned short value); + +/* + *Controls + */ +snd_kcontrol_t *snd_soc_cnew(const snd_kcontrol_new_t *_template, + void *data, char *long_name); + +int snd_soc_info_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo); +int snd_soc_get_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_put_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_info_volsw(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo); +int snd_soc_get_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); +int snd_soc_put_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol); + +/* SoC supported stream types */ +struct snd_soc_pcm_stream { + char *sname; + unsigned int rates; /* SNDRV_PCM_RATE_* */ + u64 formats; /* SNDRV_PCM_FMTBIT_* */ + unsigned int rate_min; /* min rate */ + unsigned int rate_max; /* max rate */ + unsigned int channels_min; /* min channels */ + unsigned int channels_max; /* max channels */ +}; + +/* SoC audio ops */ +struct snd_soc_ops { + int (*startup)(snd_pcm_substream_t *); + void (*shutdown)(snd_pcm_substream_t *); + int (*hw_params)(snd_pcm_substream_t *, snd_pcm_hw_params_t *); + int (*hw_free)(snd_pcm_substream_t *); + int (*prepare)(snd_pcm_substream_t *); + int (*trigger)(snd_pcm_substream_t *, int); +}; + +/* SoC hardware mode */ +struct snd_soc_hw_mode { + u32 hformat; /* SND_SOC_HWFMT_* */ + u32 hbits; /* SND_SOC_HWBITS() */ + u32 rate; /* sample rate */ + u32 fs; /* ratio of rate:bclk */ + long priv1; /* private mode data 1 */ + long priv2; /* private mode data 2 */ + long priv3; /* private mode data 3 */ +}; + +/* SoC hardware bus and all modes */ +struct snd_soc_hw_bus { + int num_hmodes; /* number of hw modes */ + snd_soc_hw_mode_t *hmodes; /* array of supported audio hw modes */ +}; + +/* SoC Codec pcm stream */ +struct snd_soc_pcm_codec { + char *name; + + /* codec pcm capabilities */ + snd_soc_pcm_stream_t playback; + snd_soc_pcm_stream_t capture; + snd_soc_hw_bus_t hw; + + /* runtime info */ + snd_soc_hw_mode_t hw_runtime; + snd_soc_ops_t ops; + snd_soc_pcm_interface_t *pcm_i; + + /* private data */ + void *priv; + void (*private_free)(snd_pcm_runtime_t *runtime); +}; + +/* SoC platform audio port interface */ +struct snd_soc_pcm_interface { + + /* interface description */ + char *name; + unsigned int id; + unsigned char type; + + /* interface pcm capabilities */ + snd_soc_pcm_stream_t capture; + snd_soc_pcm_stream_t playback; + snd_soc_hw_bus_t hw; + + /* runtime info */ + snd_soc_hw_mode_t hw_runtime; + snd_soc_pcm_codec_t *pcm_c; + snd_soc_ops_t ops; + + /* platform private data */ + void* platform_data; + + struct list_head list; +}; + +/* SoC Codec interface */ +struct snd_soc_codec { + char *name; + char *longname; + struct module *owner; + + int probed; + int (*probe)(snd_soc_codec_t *codec); + void (*remove)(snd_soc_codec_t *codec); + + snd_card_t *card; + struct platform_device pdev; + + unsigned int (*read)(u16); + int (*write)(u16, unsigned int); + + struct list_head list; + struct list_head dpm_widgets; + struct list_head dpm_paths; +}; + +/* SoC platform interface */ +struct snd_soc_platform { + char *name; + int (*probe)(void); + void (*remove)(void); + int (*pcm_new)(snd_card_t *, snd_soc_pcm_codec_t *, int, int, snd_pcm_t *); + snd_pcm_ops_t *pcm_ops; +}; + +struct soc_enum { + unsigned short reg; + unsigned char shift_l; + unsigned char shift_r; + unsigned int mask; + const char **texts; + void *dpm; +}; + +#endif