Index: linux-2.6-pxa/Documentation/sound/alsa/soc/DAI.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/DAI.txt @@ -0,0 +1,380 @@ +ASoC currently supports the three main Digital Audio Interfaces (DAI) found on +SoC controllers and portable audio CODECS today, namely AC97, I2S and PCM. + + +AC97 +==== + + AC97 is a five wire interface commonly found on many PC sound cards. It is +now also popular in many portable devices. This DAI has a reset line and time +multiplexes its data on its SDATA_OUT (playback) and SDATA_IN (capture) lines. +The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the +frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97 +frame is 21uS long and is divided into 13 time slots. + +The AC97 specification can be found at http://intel.com/ + + +I2S +=== + + I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and +Rx lines are used for audio transmision, whilst the bit clock (BCLK) and +left/right clock (LRC) synchronise the link. I2S is flexible in that either the +controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock +usually varies depending on the sample rate and the master system clock +(SYSCLK). LRCLK is the same as the sample rate. A few devices support separate +ADC and DAC LRCLK's, this allows for similtanious capture and playback at +different sample rates. + +I2S has several different operating modes:- + + o I2S - MSB is transmitted on the falling edge of the first BCLK after LRC + transition. + + o Left Justified - MSB is transmitted on transition of LRC. + + o Right Justified - MSB is transmitted sample size BCLK's before LRC + transition. + +PCM +=== + +PCM is another 4 wire interface, very similar to I2S, that can support a more +flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used +to synchronise the link whilst the Tx and Rx lines are used to transmit and +receive the audio data. Bit clock usually varies depending on sample rate +whilst sync runs at the sample rate. PCM also supports Time Division +Multiplexing (TDM) in that several devices can use the bus similtaniuosly (This +is sometimes referred to as network mode). + +Common PCM operating modes:- + + o Mode A - MSB is transmitted on falling edge of first BCLK after FRAME/SYNC. + + o Mode B - MSB is transmitted on rising edge of FRAME/SYNC. + + +ASoC DAI Configuration +====================== + +Every CODEC DAI and SoC DAI must have their capabilities defined in order to +be configured together at runtime when the audio and clocking parameters are +known. This is achieved by creating an array of struct snd_soc_hw_mode in the +the CODEC and SoC interface drivers. Each element in the array describes a DAI +mode and each mode is usually based upon the DAI system clock to sample rate +ratio (FS). + +i.e. 48k sample rate @ 256 FS = sytem clock of 12.288 MHz + 48000 * 256 = 12288000 + +The CPU and Codec DAI modes are then ANDed together at runtime to determine the +rutime DAI configuration for both the Codec and CPU. + +When creating a new codec or SoC DAI it's probably best to start of with a few +sample rates first and then test your interface. + +struct snd_soc_dai_mode is defined (in soc.h) as:- + +/* SoC DAI mode */ +struct snd_soc_hw_mode { + unsigned int fmt:16; /* SND_SOC_DAIFMT_* */ + unsigned int tdm:16; /* SND_SOC_DAITDM_* */ + unsigned int pcmfmt:6; /* SNDRV_PCM_FORMAT_* */ + unsigned int pcmrate:16; /* SND_SOC_DAIRATE_* */ + unsigned int pcmdir:2; /* SND_SOC_DAIDIR_* */ + unsigned int flags:8; /* hw flags */ + unsigned int fs:32; /* mclk to rate dividers */ + unsigned int bfs:16; /* mclk to bclk dividers */ + unsigned long priv; /* private mode data */ +}; + +fmt: +---- +This field defines the DAI mode hardware format (e.g. I2S settings) and +supports the following settings:- + + 1) hardware DAI formats + +#define SND_SOC_DAIFMT_I2S (1 << 0) /* I2S mode */ +#define SND_SOC_DAIFMT_RIGHT_J (1 << 1) /* Right justified mode */ +#define SND_SOC_DAIFMT_LEFT_J (1 << 2) /* Left Justified mode */ +#define SND_SOC_DAIFMT_DSP_A (1 << 3) /* L data msb after FRM */ +#define SND_SOC_DAIFMT_DSP_B (1 << 4) /* L data msb during FRM */ +#define SND_SOC_DAIFMT_AC97 (1 << 5) /* AC97 */ + + 2) hw DAI signal inversions + +#define SND_SOC_DAIFMT_NB_NF (1 << 8) /* normal bit clock + frame */ +#define SND_SOC_DAIFMT_NB_IF (1 << 9) /* normal bclk + inv frm */ +#define SND_SOC_DAIFMT_IB_NF (1 << 10) /* invert bclk + nor frm */ +#define SND_SOC_DAIFMT_IB_IF (1 << 11) /* invert bclk + frm */ + + 3) hw clock masters + This is wrt the codec, the inverse is true for the interface + i.e. if the codec is clk and frm master then the interface is + clk and frame slave. + +#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & frm master */ +#define SND_SOC_DAIFMT_CBS_CFM (1 << 13) /* codec clk slave & frm master */ +#define SND_SOC_DAIFMT_CBM_CFS (1 << 14) /* codec clk master & frame slave */ +#define SND_SOC_DAIFMT_CBS_CFS (1 << 15) /* codec clk & frm slave */ + +At least one option from each section must be selected. Multiple selections are +also supported e.g. + + .fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \ + SND_SOC_DAIFMT_IB_IF + + +tdm: +------ +This field defines the Time Division Multiplexing left and right word +positions for the DAI mode if applicable. Set to SND_SOC_DAITDM_LRDW(0,0) for +no TDM. + + +pcmfmt: +--------- +The hardware PCM format. This describes the PCM formats supported by the DAI +mode e.g. + + .hwpcmfmt = SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE + +pcmrate: +---------- +The PCM sample rates supported by the DAI mode. e.g. + + .hwpcmrate = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 + + +pcmdir: +--------- +The stream directions supported by this mode. e.g. playback and capture + + +flags: +-------- +The DAI hardware flags supported by the mode. + +SND_SOC_DAI_BFS_DIV +This flag states that bit clock is generated by dividing MCLK in this mode, if +this flag is absent the bitclock generated by mulitiplying sample rate. + +NOTE: Bitclock division and mulitiplication modes can be safely matched by the +core logic. + + +fs: +----- +The FS supported by this DAI mode FS is the ratio between the system clock and +the sample rate. See above + +bfs: +------ +BFS is the ratio of BCLK to MCLK or the ratio of BCLK to sample rate (this +depends on the codec or CPU DAI). + +The BFS supported by the DAI mode. This can either be the ratio between the +bitclock (BCLK) and the sample rate OR the ratio between the system clock and +the sample rate. Depends on the SND_SOC_DAI_BFS_DIV flag above. + +priv: +----- +private codec mode data. + + + +Examples +======== + +Note that Codec DAI and CPU DAI examples are interchangeable in these examples +as long as the bus master is reversed. i.e. + + SND_SOC_DAIFMT_CBM_CFM would become SND_SOC_DAIFMT_CBS_CFS + and vice versa. + +This applies to all SND_SOC_DAIFMT_CB*_CF*. + +Example 1 +--------- + +Simple codec that only runs at 8k & 48k @ 256FS in master mode, can generate a +BCLK of either MCLK/2 or MCLK/4. + + /* codec master */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_48000, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 256, SND_SOC_FSBD(2) | SND_SOC_FSBD(4)}, + + +Example 2 +--------- +Simple codec that only runs at 8k & 48k @ 256FS in master mode, can generate a +BCLK of either Rate * 32 or Rate * 64. + + /* codec master */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_48000, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, 0, + 256, SND_SOC_FSB(32) | SND_SOC_FSB(64)}, + + +Example 3 +--------- +Codec that only runs at 8k & 48k @ 256FS in master mode, can generate a +BCLK of either Rate * 32 or Rate * 64. Codec can also run in slave mode as long +as BCLK is rate * 32 or rate * 64. + + /* codec master */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_48000, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, 0, + 256, SND_SOC_FSB(32) | SND_SOC_FSB(64)}, + + /* codec slave */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_48000, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, 0, + SND_SOC_FS_ALL, SND_SOC_FSB(32) | SND_SOC_FSB(64)}, + + +Example 4 +--------- +Codec that only runs at 8k, 16k, 32k, 48k, 96k @ 128FS, 192FS & 256FS in master +mode and can generate a BCLK of MCLK / (1,2,4,8,16). Codec can also run in slave +mode as and does not care about FS or BCLK (as long as there is enough bandwidth). + + #define CODEC_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + + #define CODEC_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 |\ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000) + + /* codec master @ 128, 192 & 256 FS */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, CODEC_RATES, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 128, CODEC_FSB}, + + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, CODEC_RATES, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 192, CODEC_FSB}, + + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, CODEC_RATES, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 256, CODEC_FSB}, + + /* codec slave */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, CODEC_RATES, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, 0, + SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, + + +Example 5 +--------- +Codec that only runs at 8k, 44.1k, 48k @ different FS in master mode (for use +with a fixed MCLK) and can generate a BCLK of MCLK / (1,2,4,8,16). +Codec can also run in slave mode as and does not care about FS or BCLK (as long +as there is enough bandwidth). Codec can support 16, 24 and 32 bit PCM sample +sizes. + + #define CODEC_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + + #define CODEC_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) + + /* codec master */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_8000, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 1536, CODEC_FSB}, + + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 272, CODEC_FSB}, + + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, SND_SOC_DAI_BFS_DIV, + 256, CODEC_FSB}, + + /* codec slave */ + {SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, CODEC_RATES, + SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE, 0, + SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, + + +Example 6 +--------- +AC97 Codec that does not support VRA (i.e only runs at 48k). + + #define AC97_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + + + #define AC97_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S18_3LE | \ + SNDRV_PCM_FORMAT_S20_3LE) + + /* AC97 with no VRA */ + {0, 0, AC97_PCM_FORMATS, SNDRV_PCM_RATE_48000}, + + +Example 7 +--------- + +CPU DAI that supports 8k - 48k @ 256FS and BCLK = MCLK / 4 in master mode. +Slave mode (CPU DAI is FRAME master) supports 8k - 96k at any FS as long as +BCLK = 64 * rate. (Intel XScale I2S controller). + + #define PXA_I2S_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF) + + #define PXA_I2S_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + + #define PXA_I2S_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + + /* pxa2xx I2S frame and clock master modes */ + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_8000, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x48}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_11025, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x34}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_16000, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x24}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_22050, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x1a}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_44100, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0xd}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_48000, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0xc}, + + /* pxa2xx I2S frame master and clock slave mode */ + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBM_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + PXA_I2S_RATES, PXA_I2S_DIR, 0, SND_SOC_FS_ALL, SND_SOC_FSB(64)}, + Index: linux-2.6-pxa/Documentation/sound/alsa/soc/clocking.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/clocking.txt @@ -0,0 +1,309 @@ +Audio Clocking +============== + +This text describes the audio clocking terms in ASoC and digital audio in +general. Note: Audio clocking can be complex ! + + +Master Clock +------------ + +Every audio subsystem is driven by a master clock (sometimes refered to as MCLK +or SYSCLK). This audio master clock can be derived from a number of sources +(e.g. crystal, PLL, CPU clock) and is responsible for producing the correct +audio playback and capture sample rates. + +Some master clocks (e.g. PLL's and CPU based clocks) are configuarble in that +their speed can be altered by software (depending on the system use and to save +power). Other master clocks are fixed at at set frequency (i.e. crystals). + + +DAI Clocks +---------- +The Digital Audio Interface is usually driven by a Bit Clock (often referred to +as BCLK). This clock is used to drive the digital audio data across the link +between the codec and CPU. + +The DAI also has a frame clock to signal the start of each audio frame. This +clock is sometimes referred to as LRC (left right clock) or FRAME. This clock +runs at exactly the sample rate. + +Bit Clock is usually always a ratio of MCLK or a multiple of LRC. i.e. + +BCLK = MCLK / x + + or + +BCLK = LRC * x + +This relationship depends on the codec or SoC CPU in particular. ASoC can quite +easily match a codec that generates BCLK by division (FSBD) with a CPU that +generates BCLK by multiplication (FSB). + + +ASoC Clocking +------------- + +The ASoC core determines the clocking for each particular configuration at +runtime. This is to allow for dynamic audio clocking wereby the audio clock is +variable and depends on the system state or device usage scenario. i.e. a voice +call requires slower clocks (and hence less power) than MP3 playback. + +ASoC will call the config_sysclock() function for the target machine during the +audio parameters configuration. The function is responsible for then clocking +the machine audio subsytem and returning the audio clock speed to the core. +This function should also call the codec and cpu DAI clock_config() functions +to configure their respective internal clocking if required. + + +ASoC Clocking Control Flow +-------------------------- + +The ASoC core will call the machine drivers config_sysclock() when most of the +DAI capabilities are known. The machine driver is then responsible for calling +the codec and/or CPU DAI drivers with the selected capabilities and the current +MCLK. Note that the machine driver is also resonsible for setting the MCLK (and +enabling it). + + (1) Match Codec and CPU DAI capabilities. At this point we have + matched the majority of the DAI fields and now need to make sure this + mode is currently clockable. + + (2) machine->config_sysclk() is now called with the matched DAI FS, sample + rate and BCLK master. This function then gets/sets the current audio + clock (depening on usage) and calls the codec and CPUI DAI drivers with + the FS, rate, BCLK master and MCLK. + + (3) Codec/CPU DAI config_sysclock(). This function checks that the FS, rate, + BCLK master and MCLK are acceptable for the codec or CPU DAI. It also + sets the DAI internal state to work with said clocks. + +The config_sysclk() functions for CPU, codec and machine should return the MCLK +on success and 0 on failure. + + +Examples (b = BCLK, l = LRC) +============================ + +Example 1 +--------- + +Simple codec that only runs at 48k @ 256FS in master mode. + +CPU only runs as slave DAI, however it generates a variable MCLK. + + -------- --------- + | | <----mclk--- | | + | Codec |b -----------> | CPU | + | |l -----------> | | + | | | | + -------- --------- + +The codec driver has the following config_sysclock() + + static unsigned int config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) + { + /* make sure clock is 256 * rate */ + if(info->rate << 8 == clk) { + dai->mclk = clk; + return clk; + } + + return 0; + } + +The CPU I2S DAI driver has the following config_sysclk() + + static unsigned int config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) + { + /* can we support this clk */ + if(set_audio_clk(clk) < 0) + return -EINVAL; + + dai->mclk = clk; + return dai->clk; + } + +The machine driver config_sysclk() in this example is as follows:- + + unsigned int machine_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) + { + int clk = info->rate * info->fs; + + /* check that CPU can deliver clock */ + if(rtd->cpu_dai->config_sysclk(rtd->cpu_dai, info, clk) < 0) + return -EINVAL; + + /* can codec work with this clock */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, clk); + } + + +Example 2 +--------- + +Codec that can master at 8k and 48k at various FS (and hence supports a fixed +set of input MCLK's) and can also be slave at various FS . + +The CPU can master at 8k and 48k @256 FS and can be slave at any FS. + +MCLK is a 12.288MHz crystal on this machine. + + -------- --------- + | | <---xtal---> | | + | Codec |b <----------> | CPU | + | |l <----------> | | + | | | | + -------- --------- + + +The codec driver has the following config_sysclock() + + /* supported input clocks */ + const static int hifi_clks[] = {11289600, 12000000, 12288000, + 16934400, 18432000}; + + static unsigned int config_hsysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) + { + int i; + + /* is clk supported */ + for(i = 0; i < ARRAY_SIZE(hifi_clks); i++) { + if(clk == hifi_clks[i]) { + dai->mclk = clk; + return clk; + } + } + + /* this clk is not supported */ + return 0; + } + +The CPU I2S DAI driver has the following config_sysclk() + + static unsigned int config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) + { + /* are we master or slave */ + if (info->bclk_master & + (SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS)) { + + /* we can only master @ 256FS */ + if(info->rate << 8 == clk) { + dai->mclk = clk; + return dai->mclk; + } + } else { + /* slave we can run at any FS */ + dai->mclk = clk; + return dai->mclk; + } + + /* not supported */ + return dai->clk; + } + +The machine driver config_sysclk() in this example is as follows:- + + unsigned int machine_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) + { + int clk = 12288000; /* 12.288MHz */ + + /* who's driving the link */ + if (info->bclk_master & + (SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS)) { + /* codec master */ + + /* check that CPU can work with clock */ + if(rtd->cpu_dai->config_sysclk(rtd->cpu_dai, info, clk) < 0) + return -EINVAL; + + /* can codec work with this clock */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, clk); + } else { + /* cpu master */ + + /* check that codec can work with clock */ + if(rtd->codec_dai->config_sysclk(rtd->codec_dai, info, clk) < 0) + return -EINVAL; + + /* can CPU work with this clock */ + return rtd->cpu_dai->config_sysclk(rtd->cpu_dai, info, clk); + } + } + + + +Example 3 +--------- + +Codec that masters at 8k ... 48k @256 FS. Codec can also be slave and +doesn't care about FS. The codec has an internal PLL and dividers to generate +the necessary internal clocks (for 256FS). + +CPU can only be slave and doesn't care about FS. + +MCLK is a non controllable 13MHz clock from the CPU. + + + -------- --------- + | | <----mclk--- | | + | Codec |b <----------> | CPU | + | |l <----------> | | + | | | | + -------- --------- + +The codec driver has the following config_sysclock() + + /* valid PCM clock dividers * 2 */ + static int pcm_divs[] = {2, 6, 11, 4, 8, 12, 16}; + + static unsigned int config_vsysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) + { + int i, j, best_clk = info->fs * info->rate; + + /* can we run at this clk without the PLL ? */ + for (i = 0; i < ARRAY_SIZE(pcm_divs); i++) { + if ((best_clk >> 1) * pcm_divs[i] == clk) { + dai->pll_in = 0; + dai->clk_div = pcm_divs[i]; + dai->mclk = best_clk; + return dai->mclk; + } + } + + /* now check for PLL support */ + for (i = 0; i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].pll_in == clk) { + for (j = 0; j < ARRAY_SIZE(pcm_divs); j++) { + if (pll_div[i].pll_out == pcm_divs[j] * (best_clk >> 1)) { + dai->pll_in = clk; + dai->pll_out = pll_div[i].pll_out; + dai->clk_div = pcm_divs[j]; + dai->mclk = best_clk; + return dai->mclk; + } + } + } + } + + /* this clk is not supported */ + return 0; + } + + +The CPU I2S DAI driver has the does not need a config_sysclk() as it can slave +at any FS. + + unsigned int config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) + { + /* codec has pll that generates mclk from 13MHz xtal */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 13000000); + } Index: linux-2.6-pxa/Documentation/sound/alsa/soc/codec.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/codec.txt @@ -0,0 +1,232 @@ +ASoC Codec Driver +================= + +The codec driver is generic and hardware independent code that configures the +codec to provide audio capture and playback. It should contain no code that is +specific to the target platform or machine. All platform and machine specific +code should be added to the platform and machine drivers respectively. + +Each codec driver must provide the following features:- + + 1) Digital audio interface (DAI) description + 2) Digital audio interface configuration + 3) PCM's description + 4) Codec control IO - using I2C, 3 Wire(SPI) or both API's + 5) Mixers and audio controls + 6) Sysclk configuration + 7) Codec audio operations + +Optionally, codec drivers can also provide:- + + 8) DAPM description. + 9) DAPM event handler. +10) DAC Digital mute control. + +It's probably best to use this guide in conjuction with the existing codec +driver code in sound/soc/codecs/ + +ASoC Codec driver breakdown +=========================== + +1 - Digital Audio Interface (DAI) description +--------------------------------------------- +The DAI is a digital audio data transfer link between the codec and host SoC +CPU. It typically has data transfer capabilities in both directions +(playback and capture) and can run at a variety of different speeds. +Supported interfaces currently include AC97, I2S and generic PCM style links. +Please read DAI.txt for implementation information. + + +2 - Digital Audio Interface (DAI) configuration +----------------------------------------------- +DAI configuration is handled by the codec_pcm_prepare function and is +responsible for configuring and starting the DAI on the codec. This can be +called multiple times and is atomic. It can access the runtime parameters. + +This usually consists of a large function with numerous switch statements to +set up each configuration option. These options are set by the core at runtime. + + +3 - Codec PCM's +--------------- +Each codec must have it's PCM's defined. This defines the number of channels, +stream names, callbacks and codec name. It is also used to register the DAI +with the ASoC core. The PCM structure also associates the DAI capabilities with +the ALSA PCM. + +e.g. + +static struct snd_soc_pcm_codec wm8731_pcm_client = { + .name = "WM8731", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = wm8731_config_sysclk, + .ops = { + .prepare = wm8731_pcm_prepare, + }, + .caps = { + .num_modes = ARRAY_SIZE(wm8731_hwfmt), + .modes = &wm8731_hwfmt[0], + }, +}; + + +4 - Codec control IO +-------------------- +The codec can ususally be controlled via an I2C or SPI style interface (AC97 +combines control with data in the DAI). The codec drivers will have to provide +functions to read and write the codec registers along with supplying a register +cache:- + + /* IO control data and register cache */ + void *control_data; /* codec control (i2c/3wire) data */ + void *reg_cache; + +Codec read/write should do any data formatting and call the hardware read write +below to perform the IO. These functions are called by the core and alsa when +performing DAPM or changing the mixer:- + + unsigned int (*read)(struct snd_soc_codec *, unsigned int); + int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); + +Codec hardware IO functions - usually points to either the I2C, SPI or AC97 +read/write:- + + hw_write_t hw_write; + hw_read_t hw_read; + + +5 - Mixers and audio controls +----------------------------- +All the codec mixers and audio controls can be defined using the convenience +macros defined in soc.h. + + #define SOC_SINGLE(xname, reg, shift, mask, invert) + +Defines a single control as follows:- + + xname = Control name e.g. "Playback Volume" + reg = codec register + shift = control bit(s) offset in register + mask = control bit size(s) e.g. mask of 7 = 3 bits + invert = the control is inverted + +Other macros include:- + + #define SOC_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) + +A stereo control + + #define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, mask, invert) + +A stereo control spanning 2 registers + + #define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) + +Defines an single enumerated control as follows:- + + xreg = register + xshift = control bit(s) offset in register + xmask = control bit(s) size + xtexts = pointer to array of strings that describe each setting + + #define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) + +Defines a stereo enumerated control + + +6 - System clock configuration. +------------------------------- +The system clock that drives the audio subsystem can change depending on sample +rate and the system power state. i.e. + +o Higher sample rates sometimes need a higher system clock. +o Low system power states can sometimes limit the available clocks. + +This function is a callback that the machine driver can call to set and +determine if the clock and sample rate combination is supported by the codec at +the present time (and system state). + +NOTE: If the codec has a PLL then it has a lot more flexability wrt clock and +sample rate combinations. + +Your config_sysclock function should return the MCLK if it's a valid +combination for your codec else 0; + +Please read clocking.txt now. + + +7 - Codec Audio Operations +-------------------------- +The codec driver also supports the following alsa operations:- + +/* SoC audio ops */ +struct snd_soc_ops { + int (*startup)(snd_pcm_substream_t *); + void (*shutdown)(snd_pcm_substream_t *); + int (*hw_params)(snd_pcm_substream_t *, snd_pcm_hw_params_t *); + int (*hw_free)(snd_pcm_substream_t *); + int (*prepare)(snd_pcm_substream_t *); +}; + +Please refer to the alsa driver PCM documentation for details. +http://www.alsa-project.org/~iwai/writing-an-alsa-driver/c436.htm + + +8 - DAPM description. +--------------------- +The Dynamic Audio Power Management description describes the codec's power +components, their relationships and registers to the ASoC core. Please read +dapm.txt for details of building the description. + +Please also see the examples in other codec drivers. + + +9 - DAPM event handler +---------------------- +This function is a callback that handles codec domain PM calls and system +domain PM calls (e.g. suspend and resume). It's used to put the codec to sleep +when not in use. + +Power states:- + + SNDRV_CTL_POWER_D0: /* full On */ + /* vref/mid, clk and osc on, active */ + + SNDRV_CTL_POWER_D1: /* partial On */ + SNDRV_CTL_POWER_D2: /* partial On */ + + SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* everything off except vref/vmid, inactive */ + + SNDRV_CTL_POWER_D3cold: /* Everything Off, without power */ + + +10 - Codec DAC digital mute control. +------------------------------------ +Most codecs have a digital mute before the DAC's that can be used to minimise +any system noise. The mute stops any digital data from entering the DAC. + +A callback can be created that is called by the core for each codec DAI when the +mute is applied or freed. + +i.e. + +static int wm8974_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = wm8974_read_reg_cache(codec, WM8974_DAC) & 0xffbf; + if(mute) + wm8974_write(codec, WM8974_DAC, mute_reg | 0x40); + else + wm8974_write(codec, WM8974_DAC, mute_reg); + return 0; +} Index: linux-2.6-pxa/Documentation/sound/alsa/soc/dapm.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/dapm.txt @@ -0,0 +1,297 @@ +Dynamic Audio Power Management for Portable Devices +=================================================== + +1. Description +============== + +Dynamic Audio Power Management (DAPM) is designed to allow portable Linux devices +to use the minimum amount of power within the audio subsystem at all times. It +is independent of other kernel PM and as such, can easily co-exist with the +other PM systems. + +DAPM is also completely transparent to all user space applications as all power +switching is done within the ASoC core. No code changes or recompiling are +required for user space applications. DAPM makes power switching descisions based +upon any audio stream (capture/playback) activity and audio mixer settings +within the device. + +DAPM spans the whole machine. It covers power control within the entire audio +subsystem, this includes internal codec power blocks and machine level power +systems. + +There are 4 power domains within DAPM + + 1. Codec domain - VREF, VMID (core codec and audio power) + Usually controlled at codec probe/remove and suspend/resume, although + can be set at stream time if power is not needed for sidetone, etc. + + 2. Platform/Machine domain - physically connected inputs and outputs + Is platform/machine and user action specific, is configured by the + machine driver and responds to asynchronous events e.g when HP + are inserted + + 3. Path domain - audio susbsystem signal paths + Automatically set when mixer and mux settings are changed by the user. + e.g. alsamixer, amixer. + + 4. Stream domain - DAC's and ADC's. + Enabled and disabled when stream playback/capture is started and + stopped respectively. e.g. aplay, arecord. + +All DAPM power switching descisons are made automatically by consulting an audio +routing map of the whole machine. This map is specific to each machine and +consists of the interconnections between every audio component (including +internal codec components). All audio components that effect power are called +widgets hereafter. + + +2. DAPM Widgets +=============== + +Audio DAPM widgets fall into a number of types:- + + o Mixer - Mixes several analog signals into a single analog signal. + o Mux - An analog switch that outputs only 1 of it's inputs. + o PGA - A programmable gain amplifier or attenuation widget. + o ADC - Analog to Digital Converter + o DAC - Digital to Analog Converter + o Switch - An analog switch + o Input - A codec input pin + o Output - A codec output pin + o Headphone - Headphone (and optional Jack) + o Mic - Mic (and optional Jack) + o Line - Line Input/Output (and optional Jack) + o Speaker - Speaker + o Pre - Special PRE widget (exec before all others) + o Post - Special POST widget (exec after all others) + +(Widgets are defined in include/sound/soc-dapm.h) + +Widgets are usually added in the codec driver and the machine driver. There are +convience macros defined in soc-dapm.h that can be used to quickly build a +list of widgets of the codecs and machines DAPM widgets. + +Most widgets have a name, register, shift and invert. Some widgets have extra +parameters for stream name and kcontrols. + + +2.1 Stream Domain Widgets +------------------------- + +Stream Widgets relate to the stream power domain and only consist of ADC's +(analog to digital converters) and DAC's (digital to analog converters). + +Stream widgets have the following format:- + +SND_SOC_DAPM_DAC(name, stream name, reg, shift, invert), + +NOTE: the stream name must match the corresponding stream name in your codecs +snd_soc_codec_dai. + +e.g. stream widgets for HiFi playback and capture + +SND_SOC_DAPM_DAC("HiFi DAC", "HiFi Playback", REG, 3, 1), +SND_SOC_DAPM_ADC("HiFi ADC", "HiFi Capture", REG, 2, 1), + + +2.2 Path Domain Widgets +----------------------- + +Path domain widgets have a ability to control or effect the audio signal or +audio paths within the audio subsystem. They have the following form:- + +SND_SOC_DAPM_PGA(name, reg, shift, invert, controls, num_controls) + +Any widget kcontrols can be set using the controls and num_controls members. + +e.g. Mixer widget (the kcontrols are declared first) + +/* Output Mixer */ +static const snd_kcontrol_new_t wm8731_output_mixer_controls[] = { +SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0), +SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0), +SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0), +}; + +SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1, wm8731_output_mixer_controls, + ARRAY_SIZE(wm8731_output_mixer_controls)), + + +2.3 Platform/Machine domain Widgets +----------------------------------- + +Machine widgets are different from codec widgets in that they don't have a +codec register bit associated with them. A machine widget is assigned to each +machine audio component (non codec) that can be independently powered. e.g. + + o Speaker Amp + o Microphone Bias + o Jack connectors + +A machine widget can have an optional call back. + +e.g. Jack connector widget for an external Mic that enables Mic Bias +when the Mic is inserted:- + +static int spitz_mic_bias(struct snd_soc_dapm_widget* w, int event) +{ + if(SND_SOC_DAPM_EVENT_ON(event)) + set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_MIC_BIAS); + else + reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_MIC_BIAS); + + return 0; +} + +SND_SOC_DAPM_MIC("Mic Jack", spitz_mic_bias), + + +2.4 Codec Domain +---------------- + +The Codec power domain has no widgets and is handled by the codecs DAPM event +handler. This handler is called when the codec powerstate is changed wrt to any +stream event or by kernel PM events. + + +2.5 Virtual Widgets +------------------- + +Sometimes widgets exist in the codec or machine audio map that don't have any +corresponding register bit for power control. In this case it's necessary to +create a virtual widget - a widget with no control bits e.g. + +SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_DAPM_NOPM, 0, 0, NULL, 0), + +This can be used to merge to signal paths together in software. + +After all the widgets have been defined, they can then be added to the DAPM +subsystem individually with a call to snd_soc_dapm_new_control(). + + +3. Codec Widget Interconnections +================================ + +Widgets are connected to each other within the codec and machine by audio +paths (called interconnections). Each interconnection must be defined in order +to create a map of all audio paths between widgets. +This is easiest with a diagram of the codec (and schematic of the machine audio +system), as it requires joining widgets together via their audio signal paths. + +i.e. from the WM8731 codec's output mixer (wm8731.c) + +The WM8731 output mixer has 3 inputs (sources) + + 1. Line Bypass Input + 2. DAC (HiFi playback) + 3. Mic Sidetone Input + +Each input in this example has a kcontrol associated with it (defined in example +above) and is connected to the output mixer via it's kcontrol name. We can now +connect the destination widget (wrt audio signal) with it's source widgets. + + /* output mixer */ + {"Output Mixer", "Line Bypass Switch", "Line Input"}, + {"Output Mixer", "HiFi Playback Switch", "DAC"}, + {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"}, + +So we have :- + + Destination Widget <=== Path Name <=== Source Widget + +Or:- + + Sink, Path, Source + +Or :- + + "Output Mixer" is connected to the "DAC" via the "HiFi Playback Switch". + +When there is no path name connecting widgets (e.g. a direct connection) we +pass NULL for the path name. + +Interconnections are created with a call to:- + +snd_soc_dapm_connect_input(codec, sink, path, source); + +Finally, snd_soc_dapm_new_widgets(codec) must be called after all widgets and +interconnections have been registered with the core. This causes the core to +scan the codec and machine so that the internal DAPM state matches the +physical state of the machine. + + +3.1 Machine Widget Interconnections +----------------------------------- +Machine widget interconnections are created in the same way as codec ones and +directly connect the codec pins to machine level widgets. + +e.g. connects the speaker out codec pins to the internal speaker. + + /* ext speaker connected to codec pins LOUT2, ROUT2 */ + {"Ext Spk", NULL , "ROUT2"}, + {"Ext Spk", NULL , "LOUT2"}, + +This allows the DAPM to power on and off pins that are connected (and in use) +and pins that are NC respectively. + + +4 Endpoint Widgets +=================== +An endpoint is a start or end point (widget) of an audio signal within the +machine and includes the codec. e.g. + + o Headphone Jack + o Internal Speaker + o Internal Mic + o Mic Jack + o Codec Pins + +When a codec pin is NC it can be marked as not used with a call to + +snd_soc_dapm_set_endpoint(codec, "Widget Name", 0); + +The last argument is 0 for inactive and 1 for active. This way the pin and its +input widget will never be powered up and consume power. + +This also applies to machine widgets. e.g. if a headphone is connected to a +jack then the jack can be marked active. If the headphone is removed, then +the headphone jack can be marked inactive. + + +5 DAPM Widget Events +==================== + +Some widgets can register their interest with the DAPM core in PM events. +e.g. A Speaker with an amplifier registers a widget so the amplifier can be +powered only when the spk is in use. + +/* turn speaker amplifier on/off depending on use */ +static int corgi_amp_event(struct snd_soc_dapm_widget *w, int event) +{ + if (SND_SOC_DAPM_EVENT_ON(event)) + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_APM_ON); + else + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_APM_ON); + + return 0; +} + +/* corgi machine dapm widgets */ +static const struct snd_soc_dapm_widget wm8731_dapm_widgets = + SND_SOC_DAPM_SPK("Ext Spk", corgi_amp_event); + +Please see soc-dapm.h for all other widgets that support events. + + +5.1 Event types +--------------- + +The following event types are supported by event widgets. + +/* dapm event types */ +#define SND_SOC_DAPM_PRE_PMU 0x1 /* before widget power up */ +#define SND_SOC_DAPM_POST_PMU 0x2 /* after widget power up */ +#define SND_SOC_DAPM_PRE_PMD 0x4 /* before widget power down */ +#define SND_SOC_DAPM_POST_PMD 0x8 /* after widget power down */ +#define SND_SOC_DAPM_PRE_REG 0x10 /* before audio path setup */ +#define SND_SOC_DAPM_POST_REG 0x20 /* after audio path setup */ Index: linux-2.6-pxa/Documentation/sound/alsa/soc/machine.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/machine.txt @@ -0,0 +1,114 @@ +ASoC Machine Driver +=================== + +The ASoC machine (or board) driver is the code that glues together the platform +and codec drivers. + +The machine driver can contain codec and platform specific code. It registers +the audio subsystem with the kernel as a platform device and is represented by +the following struct:- + +/* SoC machine */ +struct snd_soc_machine { + char *name; + + int (*probe)(struct platform_device *pdev); + int (*remove)(struct platform_device *pdev); + + /* the pre and post PM functions are used to do any PM work before and + * after the codec and DAI's do any PM work. */ + int (*suspend_pre)(struct platform_device *pdev, pm_message_t state); + int (*suspend_post)(struct platform_device *pdev, pm_message_t state); + int (*resume_pre)(struct platform_device *pdev); + int (*resume_post)(struct platform_device *pdev); + + /* machine stream operations */ + struct snd_soc_ops *ops; + + /* CPU <--> Codec DAI links */ + struct snd_soc_dai_link *dai_link; + int num_links; +}; + +probe()/remove() +---------------- +probe/remove are optional. Do any machine specific probe here. + + +suspend()/resume() +------------------ +The machine driver has pre and post versions of suspend and resume to take care +of any machine audio tasks that have to be done before or after the codec, DAI's +and DMA is suspended and resumed. Optional. + + +Machine operations +------------------ +The machine specific audio operations can be set here. Again this is optional. + + +Machine DAI Configuration +------------------------- +The machine DAI configuration glues all the codec and CPU DAI's together. It can +also be used to set up the DAI system clock and for any machine related DAI +initialisation e.g. the machine audio map can be connected to the codec audio +map, unconnnected codec pins can be set as such. Please see corgi.c, spitz.c +for examples. + +struct snd_soc_dai_link is used to set up each DAI in your machine. e.g. + +/* corgi digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link corgi_dai = { + .name = "WM8731", + .stream_name = "WM8731", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8731_dai, + .init = corgi_wm8731_init, + .config_sysclk = corgi_config_sysclk, +}; + +struct snd_soc_machine then sets up the machine with it's DAI's. e.g. + +/* corgi audio machine driver */ +static struct snd_soc_machine snd_soc_machine_corgi = { + .name = "Corgi", + .dai_link = &corgi_dai, + .num_links = 1, + .ops = &corgi_ops, +}; + + +Machine Audio Subsystem +----------------------- + +The machine soc device glues the platform, machine and codec driver together. +Private data can also be set here. e.g. + +/* corgi audio private data */ +static struct wm8731_setup_data corgi_wm8731_setup = { + .i2c_address = 0x1b, +}; + +/* corgi audio subsystem */ +static struct snd_soc_device corgi_snd_devdata = { + .machine = &snd_soc_machine_corgi, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8731, + .codec_data = &corgi_wm8731_setup, +}; + + +Machine Power Map +----------------- + +The machine driver can optionally extend the codec power map and to become an +audio power map of the audio subsystem. This allows for automatic power up/down +of speaker/HP amplifiers, etc. Codec pins can be connected to the machines jack +sockets in the machine init function. See soc/pxa/spitz.c and dapm.txt for +details. + + +Machine Controls +---------------- + +Machine specific audio mixer controls can be added in the dai init function. \ No newline at end of file Index: linux-2.6-pxa/Documentation/sound/alsa/soc/overview.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/overview.txt @@ -0,0 +1,83 @@ +ALSA SoC Layer +============== + +The overall project goal of the ALSA System on Chip (ASoC) layer is to provide +better ALSA support for embedded system on chip procesors (e.g. pxa2xx, au1x00, +iMX, etc) and portable audio codecs. Currently there is some support in the +kernel for SoC audio, however it has some limitations:- + + * Currently, codec drivers are often tightly coupled to the underlying SoC + cpu. This is not ideal and leads to code duplication i.e. Linux now has 4 + different wm8731 drivers for 4 different SoC platforms. + + * There is no standard method to signal user initiated audio events. + e.g. Headphone/Mic insertion, Headphone/Mic detection after an insertion + event. These are quite common events on portable devices and ofter require + machine specific code to re route audio, enable amps etc after such an event. + + * Current drivers tend to power up the entire codec when playing + (or recording) audio. This is fine for a PC, but tends to waste a lot of + power on portable devices. There is also no support for saving power via + changing codec oversampling rates, bias currents, etc. + + +ASoC Design +=========== + +The ASoC layer is designed to address these issues and provide the following +features :- + + * Codec independence. Allows reuse of codec drivers on other platforms + and machines. + + * Easy I2S/PCM audio interface setup between codec and SoC. Each SoC interface + and codec registers it's audio interface capabilities with the core and are + subsequently matched and configured when the application hw params are known. + + * Dynamic Audio Power Management (DAPM). DAPM automatically sets the codec to + it's minimum power state at all times. This includes powering up/down + internal power blocks depending on the internal codec audio routing and any + active streams. + + * Pop and click reduction. Pops and clicks can be reduced by powering the + codec up/down in the correct sequence (including using digital mute). ASoC + signals the codec when to change power states. + + * Machine specific controls: Allow machines to add controls to the sound card + e.g. volume control for speaker amp. + +To achieve all this, ASoC basically splits an embedded audio system into 3 +components :- + + * Codec driver: The codec driver is platform independent and contains audio + controls, audio interface capabilities, codec dapm definition and codec IO + functions. + + * Platform driver: The platform driver contains the audio dma engine and audio + interface drivers (e.g. I2S, AC97, PCM) for that platform. + + * Machine driver: The machine driver handles any machine specific controls and + audio events. i.e. turing on an amp at start of playback. + + +Documentation +============= + +The documentation is spilt into the following sections:- + +overview.txt: This file. + +codec.txt: Codec driver internals. + +DAI.txt: Description of Digital Audio Interface standards and how to configure +a DAI within your codec and CPU DAI drivers. + +dapm.txt: Dynamic Audio Power Management + +platform.txt: Platform audio DMA and DAI. + +machine.txt: Machine driver internals. + +pop_clicks.txt: How to minimise audio artifacts. + +clocking.txt: ASoC clocking for best power performance. \ No newline at end of file Index: linux-2.6-pxa/Documentation/sound/alsa/soc/platform.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/platform.txt @@ -0,0 +1,58 @@ +ASoC Platform Driver +==================== + +An ASoC platform driver can be divided into audio DMA and SoC DAI configuration +and control. The platform drivers only target the SoC CPU and must have no board +specific code. + +Audio DMA +========= + +The platform DMA driver optionally supports the following alsa operations:- + +/* SoC audio ops */ +struct snd_soc_ops { + int (*startup)(snd_pcm_substream_t *); + void (*shutdown)(snd_pcm_substream_t *); + int (*hw_params)(snd_pcm_substream_t *, snd_pcm_hw_params_t *); + int (*hw_free)(snd_pcm_substream_t *); + int (*prepare)(snd_pcm_substream_t *); + int (*trigger)(snd_pcm_substream_t *, int); +}; + +The platform driver exports it's DMA functionailty via struct snd_soc_platform:- + +struct snd_soc_platform { + char *name; + + int (*probe)(struct platform_device *pdev); + int (*remove)(struct platform_device *pdev); + int (*suspend)(struct platform_device *pdev, struct snd_soc_cpu_dai *cpu_dai); + int (*resume)(struct platform_device *pdev, struct snd_soc_cpu_dai *cpu_dai); + + /* pcm creation and destruction */ + int (*pcm_new)(snd_card_t *, struct snd_soc_codec_dai *, snd_pcm_t *); + void (*pcm_free)(snd_pcm_t *); + + /* platform stream ops */ + snd_pcm_ops_t *pcm_ops; +}; + +Please refer to the alsa driver documentation for details of audio DMA. +http://www.alsa-project.org/~iwai/writing-an-alsa-driver/c436.htm + +An example DMA driver is soc/pxa/pxa2xx-pcm.c + + +SoC DAI Drivers +=============== + +Each SoC DAI driver must provide the following features:- + + 1) Digital audio interface (DAI) description + 2) Digital audio interface configuration + 3) PCM's description + 4) Sysclk configuration + 5) Suspend and resume (optional) + +Please see codec.txt for a description of items 1 - 4. Index: linux-2.6-pxa/Documentation/sound/alsa/soc/pops_clicks.txt =================================================================== --- /dev/null +++ linux-2.6-pxa/Documentation/sound/alsa/soc/pops_clicks.txt @@ -0,0 +1,52 @@ +Audio Pops and Clicks +===================== + +Pops and clicks are unwanted audio artifacts caused by the powering up and down +of components within the audio subsystem. This is noticable on PC's when an audio +module is either loaded or unloaded (at module load time the sound card is +powered up and causes a popping noise on the speakers). + +Pops and clicks can be more frequent on portable systems with DAPM. This is because +the components within the subsystem are being dynamically powered depending on +the audio usage and this can subsequently cause a small pop or click every time a +component power state is changed. + + +Minimising Playback Pops and Clicks +=================================== + +Playback pops in portable audio subsystems cannot be completely eliminated atm, +however future audio codec hardware will have better pop and click supression. +Pops can be reduced within playback by powering the audio components in a +specific order. This order is different for startup and shutdown and follows +some basic rules:- + + Startup Order :- DAC --> Mixers --> Output PGA --> Digital Unmute + + Shutdown Order :- Digital Mute --> Output PGA --> Mixers --> DAC + +This assumes that the codec PCM output path from the DAC is via a mixer and then +a PGA (programmable gain amplifier) before being output to the speakers. + + +Minimising Capture Pops and Clicks +================================== + +Capture artifacts are somewhat easier to get rid as we can delay activating the +ADC until all the pops have occured. This follows similar power rules to +playback in that components are powered in a sequence depending upon stream +startup or shutdown. + + Startup Order - Input PGA --> Mixers --> ADC + + Shutdown Order - ADC --> Mixers --> Input PGA + + +Zipper Noise +============ +An unwanted zipper noise can occur within the audio playback or capture stream +when a volume control is changed near its maximum gain value. The zipper noise +is heard when the gain increase or decrease changes the mean audio signal +amplitude too quickly. It can be minimised by enabling the zero cross setting +for each volume control. The ZC forces the gain change to occur when the signal +crosses the zero amplitude line. Index: linux-2.6-pxa/include/sound/ac97_codec.h =================================================================== --- linux-2.6-pxa.orig/include/sound/ac97_codec.h +++ linux-2.6-pxa/include/sound/ac97_codec.h @@ -409,6 +409,7 @@ struct snd_ac97_build_ops { struct snd_ac97_bus_ops { void (*reset) (struct snd_ac97 *ac97); + void (*warm_reset)(struct snd_ac97 *ac97); void (*write) (struct snd_ac97 *ac97, unsigned short reg, unsigned short val); unsigned short (*read) (struct snd_ac97 *ac97, unsigned short reg); void (*wait) (struct snd_ac97 *ac97); Index: linux-2.6-pxa/include/sound/soc-dapm.h =================================================================== --- /dev/null +++ linux-2.6-pxa/include/sound/soc-dapm.h @@ -0,0 +1,269 @@ +/* + * linux/sound/soc-dapm.h -- ALSA SoC Dynamic Audio Power Management + * + * Author: Liam Girdwood + * Created: Aug 11th 2005 + * Copyright: Wolfson Microelectronics. PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_SND_SOC_DAPM_H +#define __LINUX_SND_SOC_DAPM_H + +#include +#include +#include +#include + +/* widget has no PM register bit */ +#define SND_SOC_NOPM -1 + +/* + * SoC dynamic audio power managment + * + * We can have upto 4 power domains + * 1. Codec domain - VREF, VMID + * Usually controlled at codec probe/remove, although can be set + * at stream time if power is not needed for sidetone, etc. + * There are no widgest for this domain as it is handled in the + * code driver (wrt the ACPI power states) + * 2. Platform/Machine domain - physically connected inputs and outputs + * Is platform/machine and user action specific, is set in the machine + * driver and by userspace e.g when HP are inserted + * 3. Path domain - Internal codec path mixers + * Are automatically set when mixer and mux settings are + * changed by the user. + * 4. Stream domain - DAC's and ADC's. + * Enabled when stream playback/capture is started. + */ + +/* platform domain */ +#define SND_SOC_DAPM_INPUT(wname) \ +{.id = snd_soc_dapm_input, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0} +#define SND_SOC_DAPM_OUTPUT(wname) \ +{.id = snd_soc_dapm_output, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0} +#define SND_SOC_DAPM_MIC(wname, wevent) \ +{.id = snd_soc_dapm_mic, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0, .event = wevent, \ + .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD} +#define SND_SOC_DAPM_HP(wname, wevent) \ +{.id = snd_soc_dapm_hp, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0, .event = wevent, \ + .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD} +#define SND_SOC_DAPM_SPK(wname, wevent) \ +{.id = snd_soc_dapm_spk, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0, .event = wevent, \ + .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD} +#define SND_SOC_DAPM_LINE(wname, wevent) \ +{.id = snd_soc_dapm_line, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0, .event = wevent, \ + .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD} + +/* path domain */ +#define SND_SOC_DAPM_PGA(wname, wreg, wshift, winvert, wcontrols, wncontrols) \ +{.id = snd_soc_dapm_pga, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} +#define SND_SOC_DAPM_MIXER(wname, wreg, wshift, winvert, wcontrols, wncontrols)\ +{.id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols} +#define SND_SOC_DAPM_MICBIAS(wname, wreg, wshift, winvert) \ +{.id = snd_soc_dapm_micbias, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = NULL, .num_kcontrols = 0} +#define SND_SOC_DAPM_SWITCH(wname, wreg, wshift, winvert, wcontrols) \ +{.id = snd_soc_dapm_switch, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1} +#define SND_SOC_DAPM_MUX(wname, wreg, wshift, winvert, wcontrols) \ +{.id = snd_soc_dapm_mux, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1} + +/* path domain with event - event handler must return 0 for success */ +#define SND_SOC_DAPM_PGA_E(wname, wreg, wshift, winvert, wcontrols, wncontrols, wevent, wflags) \ +{.id = snd_soc_dapm_pga, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols, \ + .event = wevent, .event_flags = wflags} +#define SND_SOC_DAPM_MIXER_E(wname, wreg, wshift, winvert, wcontrols, wncontrols, wevent, wflags) \ +{.id = snd_soc_dapm_mixer, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = wncontrols, \ + .event = wevent, .event_flags = wflags} +#define SND_SOC_DAPM_MICBIAS_E(wname, wreg, wshift, winvert, wevent, wflags) \ +{.id = snd_soc_dapm_micbias, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = NULL, .num_kcontrols = 0, .event = wevent, \ + .event_flags = wflags} +#define SND_SOC_DAPM_SWITCH_E(wname, wreg, wshift, winvert, wcontrols, wevent, wflags) \ +{.id = snd_soc_dapm_switch, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1 \ + .event = wevent, .event_flags = wflags} +#define SND_SOC_DAPM_MUX_E(wname, wreg, wshift, winvert, wcontrols, wevent, wflags) \ +{.id = snd_soc_dapm_mux, .name = wname, .reg = wreg, .shift = wshift, \ + .invert = winvert, .kcontrols = wcontrols, .num_kcontrols = 1, .event = wevent, \ + .event_flags = wflags} + +/* events that are pre and post DAPM */ +#define SND_SOC_DAPM_PRE(wname, wevent) \ +{.id = snd_soc_dapm_pre, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0, .event = wevent, \ + .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD} +#define SND_SOC_DAPM_POST(wname, wevent) \ +{.id = snd_soc_dapm_post, .name = wname, .kcontrols = NULL, \ + .num_kcontrols = 0, .event = wevent, \ + .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD} + +/* stream domain */ +#define SND_SOC_DAPM_DAC(wname, stname, wreg, wshift, winvert) \ +{.id = snd_soc_dapm_dac, .name = wname, .sname = stname, .reg = wreg, \ + .shift = wshift, .invert = winvert} +#define SND_SOC_DAPM_ADC(wname, stname, wreg, wshift, winvert) \ +{.id = snd_soc_dapm_adc, .name = wname, .sname = stname, .reg = wreg, \ + .shift = wshift, .invert = winvert} + +/* dapm kcontrol types */ +#define SOC_DAPM_SINGLE(xname, reg, shift, mask, invert) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_volsw, \ + .get = snd_soc_dapm_get_volsw, .put = snd_soc_dapm_put_volsw, \ + .private_value = SOC_SINGLE_VALUE(reg, shift, mask, invert) } +#define SOC_DAPM_DOUBLE(xname, reg, shift_left, shift_right, mask, invert, power) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_soc_info_volsw, \ + .get = snd_soc_dapm_get_volsw, .put = snd_soc_dapm_put_volsw, \ + .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 16) | ((invert) << 24) } +#define SOC_DAPM_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_enum_double, \ + .get = snd_soc_dapm_get_enum_double, .put = snd_soc_dapm_put_enum_double, \ + .private_value = (unsigned long)&xenum } + +/* dapm stream operations */ +#define SND_SOC_DAPM_STREAM_NOP 0x0 +#define SND_SOC_DAPM_STREAM_START 0x1 +#define SND_SOC_DAPM_STREAM_STOP 0x2 +#define SND_SOC_DAPM_STREAM_SUSPEND 0x4 +#define SND_SOC_DAPM_STREAM_RESUME 0x8 +#define SND_SOC_DAPM_STREAM_PAUSE_PUSH 0x10 +#define SND_SOC_DAPM_STREAM_PAUSE_RELEASE 0x20 + +/* dapm event types */ +#define SND_SOC_DAPM_PRE_PMU 0x1 /* before widget power up */ +#define SND_SOC_DAPM_POST_PMU 0x2 /* after widget power up */ +#define SND_SOC_DAPM_PRE_PMD 0x4 /* before widget power down */ +#define SND_SOC_DAPM_POST_PMD 0x8 /* after widget power down */ +#define SND_SOC_DAPM_PRE_REG 0x10 /* before audio path setup */ +#define SND_SOC_DAPM_POST_REG 0x20 /* after audio path setup */ + +/* convenience event type detection */ +#define SND_SOC_DAPM_EVENT_ON(e) (e & (SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU)) +#define SND_SOC_DAPM_EVENT_OFF(e) (e & (SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD)) + +struct snd_soc_dapm_widget; +enum snd_soc_dapm_type; +struct snd_soc_dapm_path; +struct snd_soc_dapm_pin; + +/* dapm controls */ +int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_get_enum_double(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_new_control(struct snd_soc_codec *codec, + const struct snd_soc_dapm_widget *widget); + +/* dapm path setup */ +int snd_soc_dapm_connect_input(struct snd_soc_codec *codec, + const char *sink_name, const char *control_name, const char *src_name); +int snd_soc_dapm_new_widgets(struct snd_soc_codec *codec); +void snd_soc_dapm_free(struct snd_soc_device *socdev); + +/* dapm events */ +int snd_soc_dapm_stream_event(struct snd_soc_codec *codec, char *stream, + int event); + +/* dapm sys fs - used by the core */ +int snd_soc_dapm_sys_add(struct device *dev); + +/* dapm audio endpoint control */ +int snd_soc_dapm_set_endpoint(struct snd_soc_codec *codec, + char *pin, int status); +int snd_soc_dapm_sync_endpoints(struct snd_soc_codec *codec); + +/* dapm widget types */ +enum snd_soc_dapm_type { + snd_soc_dapm_input = 0, /* input pin */ + snd_soc_dapm_output, /* output pin */ + snd_soc_dapm_mux, /* selects 1 analog signal from many inputs */ + snd_soc_dapm_mixer, /* mixes several analog signals together */ + snd_soc_dapm_pga, /* programmable gain/attenuation (volume) */ + snd_soc_dapm_adc, /* analog to digital converter */ + snd_soc_dapm_dac, /* digital to analog converter */ + snd_soc_dapm_micbias, /* microphone bias (power) */ + snd_soc_dapm_mute, /* digital mute */ + snd_soc_dapm_mic, /* microphone */ + snd_soc_dapm_hp, /* headphones */ + snd_soc_dapm_spk, /* speaker */ + snd_soc_dapm_line, /* line input/output */ + snd_soc_dapm_switch, /* analog switch */ + snd_soc_dapm_pre, /* machine specific pre widget - exec first */ + snd_soc_dapm_post, /* machine specific post widget - exec last */ +}; + +/* dapm audio path between two widgets */ +struct snd_soc_dapm_path { + char *name; + char *long_name; + + /* source (input) and sink (output) widgets */ + struct snd_soc_dapm_widget *source; + struct snd_soc_dapm_widget *sink; + struct snd_kcontrol *kcontrol; + + /* status */ + u32 connect:1; /* source and sink widgets are connected */ + u32 walked:1; /* path has been walked */ + + struct list_head list_source; + struct list_head list_sink; + struct list_head list; +}; + +/* dapm widget */ +struct snd_soc_dapm_widget { + enum snd_soc_dapm_type id; + char *name; /* widget name */ + char *sname; /* stream name */ + struct snd_soc_codec *codec; + struct list_head list; + + /* dapm control */ + short reg; /* negative reg = no direct dapm */ + unsigned char shift; /* bits to shift */ + unsigned int saved_value; /* widget saved value */ + unsigned int value; /* widget current value */ + unsigned char power:1; /* block power status */ + unsigned char invert:1; /* invert the power bit */ + unsigned char active:1; /* active stream on DAC, ADC's */ + unsigned char connected:1; /* connected codec pin */ + unsigned char new:1; /* cnew complete */ + unsigned char ext:1; /* has external widgets */ + unsigned char muted:1; /* muted for pop reduction */ + unsigned char suspend:1; /* was active before suspend */ + unsigned char pmdown:1; /* waiting for timeout */ + + /* external events */ + unsigned short event_flags; /* flags to specify event types */ + int (*event)(struct snd_soc_dapm_widget*, int); + + /* kcontrols that relate to this widget */ + int num_kcontrols; + const struct snd_kcontrol_new *kcontrols; + + /* widget input and outputs */ + struct list_head sources; + struct list_head sinks; +}; + +#endif Index: linux-2.6-pxa/include/sound/soc.h =================================================================== --- /dev/null +++ linux-2.6-pxa/include/sound/soc.h @@ -0,0 +1,462 @@ +/* + * linux/sound/soc.h -- ALSA SoC Layer + * + * Author: Liam Girdwood + * Created: Aug 11th 2005 + * Copyright: Wolfson Microelectronics. PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_SND_SOC_H +#define __LINUX_SND_SOC_H + +#include +#include +#include +#include +#include +#include +#include + +#define SND_SOC_VERSION "0.11pre11" + +/* + * Convenience kcontrol builders + */ +#define SOC_SINGLE_VALUE(reg,shift,mask,invert) ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | ((invert) << 24)) +#define SOC_SINGLE_VALUE_EXT(reg,mask,invert) ((reg) | ((mask) << 16) | ((invert) << 31)) +#define SOC_SINGLE(xname, reg, shift, mask, invert) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_volsw, \ + .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \ + .private_value = SOC_SINGLE_VALUE(reg, shift, mask, invert) } +#define SOC_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_soc_info_volsw, \ + .get = snd_soc_get_volsw, .put = snd_soc_put_volsw, \ + .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 16) | ((invert) << 24) } +#define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, mask, invert) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_soc_info_volsw_2r, \ + .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ + .private_value = (reg_left) | ((shift) << 8) | ((mask) << 12) | ((invert) << 20) | ((reg_right) << 24) } +#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \ +{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ + .mask = xmask, .texts = xtexts } +#define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \ + SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts) +#define SOC_ENUM_SINGLE_EXT(xmask, xtexts) \ +{ .mask = xmask, .texts = xtexts } +#define SOC_ENUM(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_enum_double, \ + .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ + .private_value = (unsigned long)&xenum } +#define SOC_SINGLE_EXT(xname, xreg, xmask, xinvert, xhandler_get, xhandler_put) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_volsw_ext, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = SOC_SINGLE_VALUE_EXT(xreg, xmask, xinvert) } +#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_bool_ext, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = xdata } +#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_soc_info_enum_ext, \ + .get = xhandler_get, .put = xhandler_put, \ + .private_value = (unsigned long)&xenum } + +/* + * Digital Audio Interface (DAI) types + */ +#define SND_SOC_DAI_AC97 0x1 +#define SND_SOC_DAI_I2S 0x2 +#define SND_SOC_DAI_PCM 0x4 + +/* + * DAI hardware audio formats + */ +#define SND_SOC_DAIFMT_I2S (1 << 0) /* I2S mode */ +#define SND_SOC_DAIFMT_RIGHT_J (1 << 1) /* Right justified mode */ +#define SND_SOC_DAIFMT_LEFT_J (1 << 2) /* Left Justified mode */ +#define SND_SOC_DAIFMT_DSP_A (1 << 3) /* L data msb after FRM or LRC */ +#define SND_SOC_DAIFMT_DSP_B (1 << 4) /* L data msb during FRM or LRC */ +#define SND_SOC_DAIFMT_AC97 (1 << 5) /* AC97 */ + +/* + * DAI hardware signal inversions + */ +#define SND_SOC_DAIFMT_NB_NF (1 << 8) /* normal bit clock + frame */ +#define SND_SOC_DAIFMT_NB_IF (1 << 9) /* normal bclk + inv frm */ +#define SND_SOC_DAIFMT_IB_NF (1 << 10) /* invert bclk + nor frm */ +#define SND_SOC_DAIFMT_IB_IF (1 << 11) /* invert bclk + frm */ + +/* + * DAI hardware clock masters + * This is wrt the codec, the inverse is true for the interface + * i.e. if the codec is clk and frm master then the interface is + * clk and frame slave. + */ +#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & frm master */ +#define SND_SOC_DAIFMT_CBS_CFM (1 << 13) /* codec clk slave & frm master */ +#define SND_SOC_DAIFMT_CBM_CFS (1 << 14) /* codec clk master & frame slave */ +#define SND_SOC_DAIFMT_CBS_CFS (1 << 15) /* codec clk & frm slave */ + +#define SND_SOC_DAIFMT_FORMAT_MASK 0x00ff +#define SND_SOC_DAIFMT_INV_MASK 0x0f00 +#define SND_SOC_DAIFMT_CLOCK_MASK 0xf000 + +/* + * DAI hardware audio direction + */ +#define SND_SOC_DAIDIR_PLAYBACK 0x1 +#define SND_SOC_DAIDIR_CAPTURE 0x2 + +/* + * DAI hardware Time Division Multiplexing (TDM) Slots + * Left and Right data word positions + * This is measured in words (sample size) and not bits. + */ +#define SND_SOC_DAITDM_LRDW(l,r) ((l << 8) | r) + +/* + * DAI hardware clock ratios + * bit clock can either be a generated by dividing mclk or + * by multiplying sample rate, hence there are 2 definitions below + * depending on codec type. + */ +/* ratio of sample rate to mclk/sysclk */ +#define SND_SOC_FS_ALL 0xffff /* all mclk supported */ + +/* bit clock dividers */ +#define SND_SOC_FSBD(x) (1 << (x - 1)) /* ratio mclk:bclk */ +#define SND_SOC_FSBD_REAL(x) (ffs(x)) +#define SND_SOC_FSBD_ALL 0xffff /* all bit clock dividers supported */ + +/* bit clock ratio to sample rate */ +#define SND_SOC_FSB(x) (1 << ((x - 16) / 16)) +#define SND_SOC_FSB_REAL(x) (((ffs(x) - 1) * 16) + 16) +#define SND_SOC_FSB_ALL SND_SOC_FSBD_ALL /* all bclk ratios supported */ + +/* + * DAI hardware flags + */ +#define SND_SOC_DAI_BFS_DIV 0x1 /* use bfs mclk divider mode, else sample rate ratio */ + +/* + * AC97 codec ID's bitmask + */ +#define SND_SOC_DAI_AC97_ID0 (1 << 0) +#define SND_SOC_DAI_AC97_ID1 (1 << 1) +#define SND_SOC_DAI_AC97_ID2 (1 << 2) +#define SND_SOC_DAI_AC97_ID3 (1 << 3) + +struct snd_soc_device; +struct snd_soc_pcm_stream; +struct snd_soc_ops; +struct snd_soc_dai_mode; +struct snd_soc_pcm_runtime; +struct snd_soc_codec_dai; +struct snd_soc_cpu_dai; +struct snd_soc_codec; +struct snd_soc_machine_config; +struct soc_enum; +struct snd_soc_ac97_ops; +struct snd_soc_clock_info; + +typedef int (*hw_write_t)(void *,const char* ,int); +typedef int (*hw_read_t)(void *,char* ,int); + +extern struct snd_ac97_bus_ops soc_ac97_ops; + +/* pcm <-> DAI connect */ +void snd_soc_free_pcms(struct snd_soc_device *socdev); +int snd_soc_new_pcms(struct snd_soc_device *socdev); +int snd_soc_register_card(struct snd_soc_device *socdev); + +/* set runtime hw params */ +int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, + const struct snd_pcm_hardware *hw); +int snd_soc_get_rate(int rate); + +/* codec IO */ +#define snd_soc_read(codec, reg) codec->read(codec, reg) +#define snd_soc_write(codec, reg, value) codec->write(codec, reg, value) + +/* codec register bit access */ +int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, + unsigned short mask, unsigned short value); +int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, + unsigned short mask, unsigned short value); + +int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, + struct snd_ac97_bus_ops *ops, int num); +void snd_soc_free_ac97_codec(struct snd_soc_codec *codec); + +/* + *Controls + */ +struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template, + void *data, char *long_name); +int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +int snd_soc_info_bool_ext(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo); +int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); + +/* SoC PCM stream information */ +struct snd_soc_pcm_stream { + char *stream_name; + unsigned int rate_min; /* min rate */ + unsigned int rate_max; /* max rate */ + unsigned int channels_min; /* min channels */ + unsigned int channels_max; /* max channels */ + unsigned int active:1; /* stream is in use */ +}; + +/* SoC audio ops */ +struct snd_soc_ops { + int (*startup)(struct snd_pcm_substream *); + void (*shutdown)(struct snd_pcm_substream *); + int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *); + int (*hw_free)(struct snd_pcm_substream *); + int (*prepare)(struct snd_pcm_substream *); + int (*trigger)(struct snd_pcm_substream *, int); +}; + +/* SoC DAI hardware mode */ +struct snd_soc_dai_mode { + unsigned int fmt:16; /* SND_SOC_DAIFMT_* */ + unsigned int tdm:16; /* SND_SOC_HWTDM_* */ + unsigned int pcmfmt:6; /* SNDRV_PCM_FORMAT_* */ + unsigned int pcmrate:16; /* SND_SOC_HWRATE_* */ + unsigned int pcmdir:2; /* SND_SOC_HWDIR_* */ + unsigned int flags:8; /* hw flags */ + unsigned int fs:16; /* mclk to rate divider */ + unsigned int bfs; /* mclk to bclk dividers */ + unsigned long priv; /* private mode data */ +}; + +/* DAI capabilities */ +struct snd_soc_dai_cap { + int num_modes; /* number of DAI modes */ + struct snd_soc_dai_mode *mode; /* array of supported DAI modes */ +}; + +/* SoC Codec DAI */ +struct snd_soc_codec_dai { + char *name; + int id; + + /* DAI capabilities */ + struct snd_soc_pcm_stream playback; + struct snd_soc_pcm_stream capture; + struct snd_soc_dai_cap caps; + + /* DAI runtime info */ + struct snd_soc_dai_mode dai_runtime; + struct snd_soc_ops ops; + unsigned int (*config_sysclk)(struct snd_soc_codec_dai*, + struct snd_soc_clock_info *info, unsigned int clk); + int (*digital_mute)(struct snd_soc_codec *, + struct snd_soc_codec_dai*, int); + unsigned int mclk; /* the audio master clock */ + unsigned int pll_in; /* the PLL input clock */ + unsigned int pll_out; /* the PLL output clock */ + unsigned int clk_div; /* internal clock divider << 1 (handles fractions) */ + unsigned int active; + unsigned char pop_wait:1; + + /* DAI private data */ + void *private_data; +}; + +/* SoC CPU DAI */ +struct snd_soc_cpu_dai { + + /* DAI description */ + char *name; + unsigned int id; + unsigned char type; + + /* DAI callbacks */ + int (*probe)(struct platform_device *pdev); + void (*remove)(struct platform_device *pdev); + int (*suspend)(struct platform_device *pdev, struct snd_soc_cpu_dai *cpu_dai); + int (*resume)(struct platform_device *pdev, struct snd_soc_cpu_dai *cpu_dai); + unsigned int (*config_sysclk)(struct snd_soc_cpu_dai *cpu_dai, + struct snd_soc_clock_info *info, unsigned int clk); + + /* DAI capabilities */ + struct snd_soc_pcm_stream capture; + struct snd_soc_pcm_stream playback; + struct snd_soc_dai_cap caps; + + /* DAI runtime info */ + struct snd_soc_dai_mode dai_runtime; + struct snd_soc_ops ops; + struct snd_pcm_runtime *runtime; + unsigned char active:1; + unsigned int mclk; + void *dma_data; + + /* DAI private data */ + void *private_data; +}; + +/* SoC Audio Codec */ +struct snd_soc_codec { + char *name; + struct module *owner; + struct mutex mutex; + + /* callbacks */ + int (*dapm_event)(struct snd_soc_codec *codec, int event); + + /* runtime */ + struct snd_card *card; + struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */ + unsigned int active; + unsigned int pcm_devs; + void *private_data; + + /* codec IO */ + void *control_data; /* codec control (i2c/3wire) data */ + unsigned int (*read)(struct snd_soc_codec *, unsigned int); + int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); + hw_write_t hw_write; + hw_read_t hw_read; + void *reg_cache; + short reg_cache_size; + short reg_cache_step; + + /* dapm */ + struct list_head dapm_widgets; + struct list_head dapm_paths; + unsigned int dapm_state; + unsigned int suspend_dapm_state; + + /* codec DAI's */ + struct snd_soc_codec_dai *dai; + unsigned int num_dai; +}; + +/* codec device */ +struct snd_soc_codec_device { + int (*probe)(struct platform_device *pdev); + int (*remove)(struct platform_device *pdev); + int (*suspend)(struct platform_device *pdev, pm_message_t state); + int (*resume)(struct platform_device *pdev); +}; + +/* SoC platform interface */ +struct snd_soc_platform { + char *name; + + int (*probe)(struct platform_device *pdev); + int (*remove)(struct platform_device *pdev); + int (*suspend)(struct platform_device *pdev, struct snd_soc_cpu_dai *cpu_dai); + int (*resume)(struct platform_device *pdev, struct snd_soc_cpu_dai *cpu_dai); + + /* pcm creation and destruction */ + int (*pcm_new)(struct snd_card *, struct snd_soc_codec_dai *, + struct snd_pcm *); + void (*pcm_free)(struct snd_pcm *); + + /* platform stream ops */ + struct snd_pcm_ops *pcm_ops; +}; + +/* SoC machine DAI configuration, glues a codec and cpu DAI together */ +struct snd_soc_dai_link { + char *name; /* Codec name */ + char *stream_name; /* Stream name */ + + /* DAI */ + struct snd_soc_codec_dai *codec_dai; + struct snd_soc_cpu_dai *cpu_dai; + u32 flags; /* DAI config preference flags */ + + /* codec/machine specific init - e.g. add machine controls */ + int (*init)(struct snd_soc_codec *codec); + + /* audio sysclock configuration */ + unsigned int (*config_sysclk)(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info); +}; + +/* SoC machine */ +struct snd_soc_machine { + char *name; + + int (*probe)(struct platform_device *pdev); + int (*remove)(struct platform_device *pdev); + + /* the pre and post PM functions are used to do any PM work before and + * after the codec and DAI's do any PM work. */ + int (*suspend_pre)(struct platform_device *pdev, pm_message_t state); + int (*suspend_post)(struct platform_device *pdev, pm_message_t state); + int (*resume_pre)(struct platform_device *pdev); + int (*resume_post)(struct platform_device *pdev); + + /* machine stream operations */ + struct snd_soc_ops *ops; + + /* CPU <--> Codec DAI links */ + struct snd_soc_dai_link *dai_link; + int num_links; +}; + +/* SoC Device - the audio subsystem */ +struct snd_soc_device { + struct device *dev; + struct snd_soc_machine *machine; + struct snd_soc_platform *platform; + struct snd_soc_codec *codec; + struct snd_soc_codec_device *codec_dev; + void *codec_data; +}; + +/* runtime channel data */ +struct snd_soc_pcm_runtime { + struct snd_soc_codec_dai *codec_dai; + struct snd_soc_cpu_dai *cpu_dai; + struct snd_soc_device *socdev; +}; + +/* enumerated kcontrol */ +struct soc_enum { + unsigned short reg; + unsigned short reg2; + unsigned char shift_l; + unsigned char shift_r; + unsigned int mask; + const char **texts; + void *dapm; +}; + +/* clocking configuration data */ +struct snd_soc_clock_info { + unsigned int rate; + unsigned int fs; + unsigned int bclk_master; +}; + +#endif Index: linux-2.6-pxa/sound/Kconfig =================================================================== --- linux-2.6-pxa.orig/sound/Kconfig +++ linux-2.6-pxa/sound/Kconfig @@ -76,6 +76,8 @@ source "sound/sparc/Kconfig" source "sound/parisc/Kconfig" +source "sound/soc/Kconfig" + endmenu menu "Open Sound System" Index: linux-2.6-pxa/sound/soc/Kconfig =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/Kconfig @@ -0,0 +1,30 @@ +# +# SoC audio configuration +# + +menu "SoC audio support" + +config SND_SOC + tristate "SoC audio support" + ---help--- + + If you want SoC support, you should say Y here and also to the + specific driver for your SoC below. You will also need to select the + specific codec(s) attached to the SoC + + This SoC audio support can also be built as a module. If so, the module + will be called snd-soc-core. + +# All the supported Soc's +menu "Soc Platforms" +depends on SND_SOC +source "sound/soc/pxa/Kconfig" +endmenu + +# Supported codecs +menu "Soc Codecs" +depends on SND_SOC +source "sound/soc/codecs/Kconfig" +endmenu + +endmenu Index: linux-2.6-pxa/sound/soc/Makefile =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/Makefile @@ -0,0 +1,4 @@ +snd-soc-core-objs := soc-core.o soc-dapm.o + +obj-$(CONFIG_SND_SOC) += snd-soc-core.o +obj-$(CONFIG_SND_SOC) += pxa/ codecs/ Index: linux-2.6-pxa/sound/soc/codecs/Kconfig =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/Kconfig @@ -0,0 +1,66 @@ +config SND_SOC_AC97_CODEC + tristate "SoC generic AC97 support" + depends SND_SOC + help + Say Y or M if you want generic AC97 support. This is not required + for the AC97 codecs listed below. + +config SND_SOC_WM8731 + tristate "SoC driver for the WM8731 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8731 codec. + +config SND_SOC_WM8750 + tristate "SoC driver for the WM8750 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8750 codec. + +config SND_SOC_WM8753 + tristate "SoC driver for the WM8753 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8753 codec. + +config SND_SOC_WM8772 + tristate "SoC driver for the WM8772 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8772 codec. + +config SND_SOC_WM8971 + tristate "SoC driver for the WM8971 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8971 codec. + +config SND_SOC_WM8974 + tristate "SoC driver for the WM8974 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM8974 codec. + +config SND_SOC_WM9713 + tristate "SoC driver for the WM9713 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM9713 codec. + +config SND_SOC_WM9712 + tristate "SoC driver for the WM9712 codec" + depends SND_SOC + help + Say Y or M if you want to support the WM9712 codec. + +config SND_SOC_UDA1380 + tristate "SoC driver for the UDA1380 codec" + depends SND_SOC + help + Say Y or M if you want to support the UDA1380 codec. + +config SND_SOC_AK4535 + tristate "SoC driver for the AK4535 codec" + depends SND_SOC + help + Say Y or M if you want to support the AK4535 codec. Index: linux-2.6-pxa/sound/soc/codecs/Makefile =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/Makefile @@ -0,0 +1,23 @@ +snd-soc-ac97-objs := ac97.o +snd-soc-wm8731-objs := wm8731.o +snd-soc-wm8750-objs := wm8750.o +snd-soc-wm8753-objs := wm8753.o +snd-soc-wm8772-objs := wm8772.o +snd-soc-wm8971-objs := wm8971.o +snd-soc-wm8974-objs := wm8974.o +snd-soc-uda1380-objs := uda1380.o +snd-soc-ak4535-objs := ak4535.o +snd-soc-wm9713-objs := wm9713.o +snd-soc-wm9712-objs := wm9712.o + +obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o +obj-$(CONFIG_SND_SOC_WM8731) += snd-soc-wm8731.o +obj-$(CONFIG_SND_SOC_WM8750) += snd-soc-wm8750.o +obj-$(CONFIG_SND_SOC_WM8753) += snd-soc-wm8753.o +obj-$(CONFIG_SND_SOC_WM8772) += snd-soc-wm8772.o +obj-$(CONFIG_SND_SOC_WM8971) += snd-soc-wm8971.o +obj-$(CONFIG_SND_SOC_WM8974) += snd-soc-wm8974.o +obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o +obj-$(CONFIG_SND_SOC_AK4535) += snd-soc-ak4535.o +obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o +obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o Index: linux-2.6-pxa/sound/soc/codecs/ac97.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/ac97.c @@ -0,0 +1,162 @@ +/* + * ac97.c -- ALSA Soc AC97 codec support + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 17th Oct 2005 Initial version. + * + * Generic AC97 support. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define AC97_VERSION "0.5" + +#define AC97_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define AC97_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +#define AC97_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S18_3LE | SNDRV_PCM_FORMAT_S20_3LE) + +/* may need to expand this */ +static struct snd_soc_dai_mode soc_ac97[] = { + {0, 0, AC97_PCM_FORMATS, AC97_RATES}, +}; + +static int ac97_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + + int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? + AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE; + return snd_ac97_set_rate(codec->ac97, reg, runtime->rate); +} + +static struct snd_soc_codec_dai ac97_dai = { + .name = "AC97 HiFi", + .playback = { + .stream_name = "AC97 Playback", + .channels_min = 1, + .channels_max = 2,}, + .capture = { + .stream_name = "AC97 Capture", + .channels_min = 1, + .channels_max = 2,}, + .ops = { + .prepare = ac97_prepare,}, + .caps = { + .num_modes = ARRAY_SIZE(soc_ac97), + .mode = soc_ac97,}, +}; + +static unsigned int ac97_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + return soc_ac97_ops.read(codec->ac97, reg); +} + +static int ac97_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int val) +{ + soc_ac97_ops.write(codec->ac97, reg, val); + return 0; +} + +static int ac97_soc_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec; + struct snd_ac97_bus *ac97_bus; + struct snd_ac97_template ac97_template; + int ret = 0; + + printk(KERN_INFO "AC97 SoC Audio Codec %s\n", AC97_VERSION); + + if ((socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + codec = socdev->codec; + mutex_init(&codec->mutex); + + codec->name = "AC97"; + codec->owner = THIS_MODULE; + codec->dai = &ac97_dai; + codec->num_dai = 1; + codec->write = ac97_write; + codec->read = ac97_read; + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) + goto err; + + /* add codec as bus device for standard ac97 */ + if((ret = snd_ac97_bus(codec->card, 0, &soc_ac97_ops, NULL, &ac97_bus)) < 0) + goto bus_err; + + memset(&ac97_template, 0, sizeof(struct snd_ac97_template)); + if((ret = snd_ac97_mixer(ac97_bus, &ac97_template, &codec->ac97)) < 0) + goto bus_err; + + snd_soc_register_card(socdev); + return 0; + +bus_err: + snd_soc_free_pcms(socdev); + +err: + kfree(socdev->codec->reg_cache); + kfree(socdev->codec); + socdev->codec = NULL; + return ret; +} + +static int ac97_soc_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if(codec == NULL) + return 0; + + snd_soc_free_pcms(socdev); + kfree(socdev->codec->reg_cache); + kfree(socdev->codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_ac97= { + .probe = ac97_soc_probe, + .remove = ac97_soc_remove, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_ac97); + +MODULE_DESCRIPTION("Soc Generic AC97 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/ac97.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/ac97.h @@ -0,0 +1,18 @@ +/* + * linux/sound/codecs/ac97.h -- ALSA SoC Layer + * + * Author: Liam Girdwood + * Created: Dec 1st 2005 + * Copyright: Wolfson Microelectronics. PLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __LINUX_SND_SOC_AC97_H +#define __LINUX_SND_SOC_AC97_H + +extern struct snd_soc_codec_device soc_codec_dev_ac97; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/ak4535.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/ak4535.c @@ -0,0 +1,658 @@ +/* + * ak4535.c -- AK4535 ALSA Soc Audio driver + * + * Copyright 2005 Openedhand Ltd. + * + * Author: Richard Purdie + * + * Based on wm8753.c by Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ak4535.h" + +#define AUDIO_NAME "ak4535" +#define AK4535_VERSION "0.2" + +struct snd_soc_codec_device soc_codec_dev_ak4535; + +/* + * ak4535 register cache + */ +static const u16 ak4535_reg[AK4535_CACHEREGNUM] = { + 0x0000, 0x0080, 0x0000, 0x0003, + 0x0002, 0x0000, 0x0011, 0x0001, + 0x0000, 0x0040, 0x0036, 0x0010, + 0x0000, 0x0000, 0x0057, 0x0000, +}; + +#define AK4535_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBS_CFS | \ + SND_SOC_DAIFMT_NB_NF) + +#define AK4535_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define AK4535_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +static struct snd_soc_dai_mode ak4535_modes[] = { + /* codec frame and clock slave modes */ + {AK4535_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + AK4535_RATES, AK4535_DIR, 0, 256, SND_SOC_FSB(64) | SND_SOC_FSB(32)}, +}; + +/* + * read ak4535 register cache + */ +static inline unsigned int ak4535_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg >= AK4535_CACHEREGNUM) + return -1; + return cache[reg]; +} + +/* + * write ak4535 register cache + */ +static inline void ak4535_write_reg_cache(struct snd_soc_codec *codec, + u16 reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg >= AK4535_CACHEREGNUM) + return; + cache[reg] = value; +} + +/* + * write to the AK4535 register space + */ +static int ak4535_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D8 AK4535 register offset + * D7...D0 register data + */ + data[0] = reg & 0xff; + data[1] = value & 0xff; + + ak4535_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +static const char* ak4535_mono_gain[] = {"+6dB", "-17dB"}; +static const char* ak4535_mono_out[] = {"(L + R)/2", "Hi-Z"}; +static const char* ak4535_hp_out[] = {"Stereo", "Mono"}; +static const char* ak4535_deemp[] = {"44.1kHz", "Off", "48kHz", "32kHz"}; +static const char* ak4535_mic_select[] = {"Internal", "External"}; + +static const struct soc_enum ak4535_enum[] = { + SOC_ENUM_SINGLE(AK4535_SIG1, 7, 2, ak4535_mono_gain), + SOC_ENUM_SINGLE(AK4535_SIG1, 6, 2, ak4535_mono_out), + SOC_ENUM_SINGLE(AK4535_MODE2, 2, 2, ak4535_hp_out), + SOC_ENUM_SINGLE(AK4535_DAC, 0, 4, ak4535_deemp), + SOC_ENUM_SINGLE(AK4535_MIC, 1, 2, ak4535_mic_select), +}; + +static const struct snd_kcontrol_new ak4535_snd_controls[] = { + SOC_SINGLE("ALC2 Switch", AK4535_SIG1, 1, 1, 0), + SOC_ENUM("Mono 1 Output", ak4535_enum[1]), + SOC_ENUM("Mono 1 Gain", ak4535_enum[0]), + SOC_ENUM("Headphone Output", ak4535_enum[2]), + SOC_ENUM("Playback Deemphasis", ak4535_enum[3]), + SOC_SINGLE("Bass Volume", AK4535_DAC, 2, 3, 0), + SOC_SINGLE("Mic Boost (+20dB) Switch", AK4535_MIC, 0, 1, 0), + SOC_ENUM("Mic Select", ak4535_enum[4]), + SOC_SINGLE("ALC Operation Time", AK4535_TIMER, 0, 3, 0), + SOC_SINGLE("ALC Recovery Time", AK4535_TIMER, 2, 3, 0), + SOC_SINGLE("ALC ZC Time", AK4535_TIMER, 4, 3, 0), + SOC_SINGLE("ALC 1 Switch", AK4535_ALC1, 5, 1, 0), + SOC_SINGLE("ALC 2 Switch", AK4535_ALC1, 6, 1, 0), + SOC_SINGLE("ALC Volume", AK4535_ALC2, 0, 127, 0), + SOC_SINGLE("Capture Volume", AK4535_PGA, 0, 127, 0), + SOC_SINGLE("Left Playback Volume", AK4535_LATT, 0, 127, 1), + SOC_SINGLE("Right Playback Volume", AK4535_RATT, 0, 127, 1), + SOC_SINGLE("AUX Bypass Volume", AK4535_VOL, 0, 15, 0), + SOC_SINGLE("Mic Sidetone Volume", AK4535_VOL, 4, 7, 0), +}; + +/* add non dapm controls */ +static int ak4535_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(ak4535_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&ak4535_snd_controls[i],codec, NULL))) < 0) + return err; + } + + return 0; +} + +/* Mono 1 Mixer */ +static const struct snd_kcontrol_new ak4535_mono1_mixer_controls[] = { + SOC_DAPM_SINGLE("Mic Sidetone Switch", AK4535_SIG1, 4, 1, 0), + SOC_DAPM_SINGLE("Mono Playback Switch", AK4535_SIG1, 5, 1, 0), +}; + +/* Stereo Mixer */ +static const struct snd_kcontrol_new ak4535_stereo_mixer_controls[] = { + SOC_DAPM_SINGLE("Mic Sidetone Switch", AK4535_SIG2, 4, 1, 0), + SOC_DAPM_SINGLE("Playback Switch", AK4535_SIG2, 7, 1, 0), + SOC_DAPM_SINGLE("Aux Bypass Switch", AK4535_SIG2, 5, 1, 0), +}; + +/* Input Mixer */ +static const struct snd_kcontrol_new ak4535_input_mixer_controls[] = { + SOC_DAPM_SINGLE("Mic Capture Switch", AK4535_MIC, 2, 1, 0), + SOC_DAPM_SINGLE("Aux Capture Switch", AK4535_MIC, 5, 1, 0), +}; + +/* Input mux */ +static const struct snd_kcontrol_new ak4535_input_mux_control = + SOC_DAPM_ENUM("Input Select", ak4535_enum[0]); + +/* HP L switch */ +static const struct snd_kcontrol_new ak4535_hpl_control = + SOC_DAPM_SINGLE("Switch", AK4535_SIG2, 1, 1, 1); + +/* HP R switch */ +static const struct snd_kcontrol_new ak4535_hpr_control = + SOC_DAPM_SINGLE("Switch", AK4535_SIG2, 0, 1, 1); + +/* Speaker switch */ +static const struct snd_kcontrol_new ak4535_spk_control = + SOC_DAPM_SINGLE("Switch", AK4535_MODE2, 0, 0, 0); + +/* mono 2 switch */ +static const struct snd_kcontrol_new ak4535_mono2_control = + SOC_DAPM_SINGLE("Switch", AK4535_SIG1, 0, 1, 0); + +/* Line out switch */ +static const struct snd_kcontrol_new ak4535_line_control = + SOC_DAPM_SINGLE("Switch", AK4535_SIG2, 6, 1, 0); + +/* ak4535 dapm widgets */ +static const struct snd_soc_dapm_widget ak4535_dapm_widgets[] = { + SND_SOC_DAPM_MIXER("Stereo Mixer", SND_SOC_NOPM, 0, 0, + &ak4535_stereo_mixer_controls[0], ARRAY_SIZE(ak4535_stereo_mixer_controls)), + SND_SOC_DAPM_MIXER("Mono1 Mixer", SND_SOC_NOPM, 0, 0, + &ak4535_mono1_mixer_controls[0], ARRAY_SIZE(ak4535_mono1_mixer_controls)), + SND_SOC_DAPM_MIXER("Input Mixer", SND_SOC_NOPM, 0, 0, + &ak4535_input_mixer_controls[0], ARRAY_SIZE(ak4535_mono1_mixer_controls)), + SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &ak4535_input_mux_control), + SND_SOC_DAPM_DAC("DAC", "Playback", AK4535_PM2, 0, 0), + SND_SOC_DAPM_SWITCH("Mono 2 Enable", SND_SOC_NOPM, 0, 0, &ak4535_mono2_control), + SND_SOC_DAPM_SWITCH("Speaker Enable", SND_SOC_NOPM, 0, 0, &ak4535_spk_control), + SND_SOC_DAPM_SWITCH("Line Out Enable", SND_SOC_NOPM, 0, 0, &ak4535_line_control), + SND_SOC_DAPM_SWITCH("Left HP Enable", SND_SOC_NOPM, 0, 0, &ak4535_hpl_control), + SND_SOC_DAPM_SWITCH("Right HP Enable", SND_SOC_NOPM, 0, 0, &ak4535_hpr_control), + SND_SOC_DAPM_OUTPUT("LOUT"), + SND_SOC_DAPM_OUTPUT("HPL"), + SND_SOC_DAPM_OUTPUT("ROUT"), + SND_SOC_DAPM_OUTPUT("HPR"), + SND_SOC_DAPM_OUTPUT("SPP"), + SND_SOC_DAPM_OUTPUT("SPN"), + SND_SOC_DAPM_OUTPUT("MOUT1"), + SND_SOC_DAPM_OUTPUT("MOUT2"), + SND_SOC_DAPM_OUTPUT("MICOUT"), + SND_SOC_DAPM_ADC("ADC", "Capture", AK4535_PM1, 0, 1), + SND_SOC_DAPM_PGA("Spk Amp", AK4535_PM2, 3, 0, NULL, 0), + SND_SOC_DAPM_PGA("HP R Amp", AK4535_PM2, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("HP L Amp", AK4535_PM2, 2, 0, NULL, 0), + SND_SOC_DAPM_PGA("Mic", AK4535_PM1, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("Line Out", AK4535_PM1, 4, 0, NULL, 0), + SND_SOC_DAPM_PGA("Mono Out", AK4535_PM1, 3, 0, NULL, 0), + SND_SOC_DAPM_PGA("AUX In", AK4535_PM1, 2, 0, NULL, 0), + + SND_SOC_DAPM_MICBIAS("Mic Int Bias", AK4535_MIC, 3, 0), + SND_SOC_DAPM_MICBIAS("Mic Ext Bias", AK4535_MIC, 4, 0), + SND_SOC_DAPM_INPUT("MICIN"), + SND_SOC_DAPM_INPUT("MICEXT"), + SND_SOC_DAPM_INPUT("AUX"), + SND_SOC_DAPM_INPUT("MIN"), + SND_SOC_DAPM_INPUT("AIN"), +}; + +static const char *audio_map[][3] = { + /*stereo mixer */ + {"Stereo Mixer", "Playback Switch", "DAC"}, + {"Stereo Mixer", "Mic Sidetone Switch", "Mic"}, + {"Stereo Mixer", "Aux Bypass Switch", "AUX In"}, + + /* mono1 mixer */ + {"Mono1 Mixer", "Mic Sidetone Switch", "Mic"}, + {"Mono1 Mixer", "Mono Playback Switch", "DAC"}, + + /* mono2 mixer */ + {"Mono2 Mixer", "Mono Playback Switch", "Stereo Mixer"}, + + /* Mic */ + {"AIN", NULL, "Mic"}, + {"Input Mux", "Internal", "Mic Int Bias"}, + {"Input Mux", "External", "Mic Ext Bias"}, + {"Mic Int Bias", NULL, "MICIN"}, + {"Mic Ext Bias", NULL, "MICEXT"}, + {"MICOUT", NULL, "Input Mux"}, + + /* line out */ + {"LOUT", "Switch", "Line"}, + {"ROUT", "Switch", "Line Out Enable"}, + {"Line Out Enable", NULL, "Line Out"}, + {"Line Out", NULL, "Stereo Mixer"}, + + /* mono1 out */ + {"MOUT1", NULL, "Mono Out"}, + {"Mono Out", NULL, "Mono Mixer"}, + + /* left HP */ + {"HPL", "Switch", "Left HP Enable"}, + {"Left HP Enable", NULL, "HP L Amp"}, + {"HP L Amp", NULL, "Stereo Mixer"}, + + /* right HP */ + {"HPR", "Switch", "Right HP Enable"}, + {"Right HP Enable", NULL, "HP R Amp"}, + {"HP R Amp", NULL, "Stereo Mixer"}, + + /* speaker */ + {"SPP", "Switch", "Speaker Enable"}, + {"SPN", "Switch", "Speaker Enable"}, + {"Speaker Enable", NULL, "Spk Amp"}, + {"Spk Amp", NULL, "MIN"}, + + /* mono 2 */ + {"MOUT2", "Switch", "Mono 2 Enable"}, + {"Mono 2 Enable", NULL, "Stereo Mixer"}, + + /* Aux In */ + {"Aux In", NULL, "AUX"}, + + /* ADC */ + {"ADC", NULL, "Input Mixer"}, + {"Input Mixer", "Mic Capture Switch", "Mic"}, + {"Input Mixer", "Aux Capture Switch", "Aux In"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +static int ak4535_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(ak4535_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &ak4535_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +static int ak4535_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u8 mode = 0, mode2; + int bfs; + + mode2 = ak4535_read_reg_cache(codec, AK4535_MODE2); + bfs = SND_SOC_FSB_REAL(rtd->codec_dai->dai_runtime.bfs); + snd_assert(bfs, return -ENODEV); + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + mode = 0x0002; + break; + case SND_SOC_DAIFMT_LEFT_J: + mode = 0x0001; + break; + } + + /* set fs */ + switch(rtd->codec_dai->dai_runtime.fs) { + case 1024: + mode2 |= (0x3 << 5); + break; + case 512: + mode2 |= (0x2 << 5); + break; + case 256: + mode2 |= (0x1 << 5); + break; + } + + /* bfs */ + if (bfs == 64) + mode |= 0x4; + + /* set rate */ + ak4535_write(codec, AK4535_MODE1, mode); + ak4535_write(codec, AK4535_MODE2, mode2); + + return 0; +} + +static unsigned int ak4535_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + if(info->fs != 256) + return 0; + + /* we only support 256 FS atm */ + if(info->rate * info->fs == clk) { + dai->mclk = clk; + return clk; + } + + return 0; +} + +static int ak4535_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = ak4535_read_reg_cache(codec, AK4535_DAC) & 0xffdf; + if(mute) + ak4535_write(codec, AK4535_DAC, mute_reg); + else + ak4535_write(codec, AK4535_DAC, mute_reg | 0x20); + return 0; +} + +static int ak4535_dapm_event(struct snd_soc_codec *codec, int event) +{ + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* vref/mid, clk and osc on, dac unmute, active */ + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* everything off except vref/vmid, dac mute, inactive */ + ak4535_write(codec, AK4535_PM1, 0x80); + ak4535_write(codec, AK4535_PM2, 0x0); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* everything off, inactive */ + ak4535_write(codec, AK4535_PM1, 0x0); + ak4535_write(codec, AK4535_PM2, 0x80); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai ak4535_dai = { + .name = "AK4535", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = ak4535_config_sysclk, + .digital_mute = ak4535_mute, + .ops = { + .prepare = ak4535_pcm_prepare, + }, + .caps = { + .num_modes = ARRAY_SIZE(ak4535_modes), + .mode = ak4535_modes, + }, +}; +EXPORT_SYMBOL_GPL(ak4535_dai); + +static int ak4535_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + ak4535_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int ak4535_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(ak4535_reg); i++) { + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + ak4535_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + ak4535_dapm_event(codec, codec->suspend_dapm_state); + return 0; +} + +/* + * initialise the AK4535 driver + * register the mixer and dsp interfaces with the kernel + */ +static int ak4535_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int ret = 0; + + codec->name = "AK4535"; + codec->owner = THIS_MODULE; + codec->read = ak4535_read_reg_cache; + codec->write = ak4535_write; + codec->dapm_event = ak4535_dapm_event; + codec->dai = &ak4535_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(ak4535_reg); + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(ak4535_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, ak4535_reg, sizeof(u16) * ARRAY_SIZE(ak4535_reg)); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* power on device */ + ak4535_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + ak4535_add_controls(codec); + ak4535_add_widgets(codec); + snd_soc_register_card(socdev); + + return 0; +} + +static struct snd_soc_device *ak4535_socdev; + +#ifdef CONFIG_I2C + +#define I2C_DRIVERID_AK4535 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver ak4535_i2c_driver; +static struct i2c_client client_template; + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ +static int ak4535_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = ak4535_socdev; + struct ak4535_setup_data *setup = socdev->codec_data; + struct snd_soc_codec* codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + + i2c_set_clientdata(i2c, codec); + + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + printk(KERN_ERR "failed to attach codec at addr %x\n", addr); + kfree(i2c); + return ret; + } + + ak4535_init(socdev); + + return 0; +} + +static int ak4535_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec* codec = i2c_get_clientdata(client); + + i2c_detach_client(client); + + kfree(codec->reg_cache); + kfree(client); + + return 0; +} + +static int ak4535_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, ak4535_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver ak4535_i2c_driver = { + .driver = { + .name = "AK4535 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_AK4535, + .attach_adapter = ak4535_i2c_attach, + .detach_client = ak4535_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "AK4535", + .driver = &ak4535_i2c_driver, +}; +#endif + +static int ak4535_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct ak4535_setup_data *setup = socdev->codec_data; + struct snd_soc_codec* codec; + int ret = 0; + + printk(KERN_INFO "AK4535 Audio Codec %s", AK4535_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + ak4535_socdev = socdev; +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&ak4535_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + return ret; +} + +/* power down chip */ +static int ak4535_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec* codec = socdev->codec; + + if (codec->control_data) + ak4535_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&ak4535_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_ak4535 = { + .probe = ak4535_probe, + .remove = ak4535_remove, + .suspend = ak4535_suspend, + .resume = ak4535_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_ak4535); + +MODULE_DESCRIPTION("Soc AK4535 driver"); +MODULE_AUTHOR("Richard Purdie"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/ak4535.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/ak4535.h @@ -0,0 +1,46 @@ +/* + * ak4535.h -- AK4535 Soc Audio driver + * + * Copyright 2005 Openedhand Ltd. + * + * Author: Richard Purdie + * + * Based on wm8753.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _AK4535_H +#define _AK4535_H + +/* AK4535 register space */ + +#define AK4535_PM1 0x0 +#define AK4535_PM2 0x1 +#define AK4535_SIG1 0x2 +#define AK4535_SIG2 0x3 +#define AK4535_MODE1 0x4 +#define AK4535_MODE2 0x5 +#define AK4535_DAC 0x6 +#define AK4535_MIC 0x7 +#define AK4535_TIMER 0x8 +#define AK4535_ALC1 0x9 +#define AK4535_ALC2 0xa +#define AK4535_PGA 0xb +#define AK4535_LATT 0xc +#define AK4535_RATT 0xd +#define AK4535_VOL 0xe +#define AK4535_STATUS 0xf + +#define AK4535_CACHEREGNUM 0x10 + +struct ak4535_setup_data { + unsigned short i2c_address; +}; + +extern struct snd_soc_codec_dai ak4535_dai; +extern struct snd_soc_codec_device soc_codec_dev_ak4535; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/uda1380.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/uda1380.c @@ -0,0 +1,545 @@ +/* + * uda1380.c - Philips UDA1380 ALSA SoC audio driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Modified by Richard Purdie to fit into SoC + * codec model. + * + * Copyright (c) 2005 Giorgio Padrin + * Copyright 2005 Openedhand Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "uda1380.h" + +#define UDA1380_VERSION "0.4" + +/* + * uda1380 register cache + */ +static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = { + 0x0502, 0x0000, 0x0000, 0x3f3f, + 0x0202, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0xff00, 0x0000, 0x4800, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x8000, 0x0002, 0x0000, +}; + +#define UDA1380_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBS_CFS | \ + SND_SOC_DAIFMT_NB_NF) + +#define UDA1380_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define UDA1380_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +static struct snd_soc_dai_mode uda1380_modes[] = { + /* slave rates capture & playback */ + {UDA1380_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + UDA1380_RATES, UDA1380_DIR, 0, 256, SND_SOC_FSB(64)}, + + /* slave rates playback */ + {UDA1380_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, SND_SOC_DAIDIR_PLAYBACK, + 0, 256, SND_SOC_FSB(64)}, +}; + +/* + * read uda1380 register cache + */ +static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg == UDA1380_RESET) + return 0; + if (reg >= UDA1380_CACHEREGNUM) + return -1; + return cache[reg]; +} + +/* + * write uda1380 register cache + */ +static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec, + u16 reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg >= UDA1380_CACHEREGNUM) + return; + cache[reg] = value; +} + +/* + * write to the UDA1380 register space + */ +static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[3]; + + /* data is + * data[0] is register offset + * data[1] is MS byte + * data[2] is LS byte + */ + data[0] = reg; + data[1] = (value & 0xff00) >> 8; + data[2] = value & 0x00ff; + + uda1380_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 3) == 3) + return 0; + else + return -EIO; +} + +#define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0) + +/* declarations of ALSA reg_elem_REAL controls */ +static const char* uda1380_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz", "96kHz"}; +static const char* uda1380_input_sel[] = {"Line", "Mic"}; + +static const struct soc_enum uda1380_enum[] = { + SOC_ENUM_DOUBLE(UDA1380_DEEMP, 0, 8, 5, uda1380_deemp), + SOC_ENUM_SINGLE(UDA1380_ADC, 3, 2, uda1380_input_sel), +}; + +static const struct snd_kcontrol_new uda1380_snd_controls[] = { + SOC_DOUBLE("Playback Volume", UDA1380_MVOL, 0, 8, 127, 0), + SOC_DOUBLE("Treble Volume", UDA1380_MODE, 4, 12, 3, 0), + SOC_DOUBLE("Bass Volume", UDA1380_MODE, 0, 8, 15, 0), + SOC_ENUM("Playback De-emphasis", uda1380_enum[0]), + SOC_DOUBLE("Capture Volume", UDA1380_DEC, 0, 8, 127, 0), + SOC_DOUBLE("Line Capture Volume", UDA1380_PGA, 0, 8, 15, 0), + SOC_SINGLE("Mic Capture Volume", UDA1380_PGA, 8, 11, 0), + SOC_DOUBLE("Playback Switch", UDA1380_DEEMP, 3, 11, 1, 0), + SOC_SINGLE("Capture Switch", UDA1380_PGA, 15, 1, 0), + SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), + SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), + SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0), +}; + +/* add non dapm controls */ +static int uda1380_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(uda1380_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&uda1380_snd_controls[i],codec, NULL))) < 0) + return err; + } + + return 0; +} + +/* Input mux */ +static const struct snd_kcontrol_new uda1380_input_mux_control = + SOC_DAPM_ENUM("Input Select", uda1380_enum[1]); + +static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = { + SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, + &uda1380_input_mux_control), + SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0), + SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0), + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0), + SND_SOC_DAPM_INPUT("VINM"), + SND_SOC_DAPM_INPUT("VINL"), + SND_SOC_DAPM_INPUT("VINR"), + SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0), + SND_SOC_DAPM_OUTPUT("VOUTLHP"), + SND_SOC_DAPM_OUTPUT("VOUTRHP"), + SND_SOC_DAPM_OUTPUT("VOUTL"), + SND_SOC_DAPM_OUTPUT("VOUTR"), + SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0), + SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0), +}; + +static const char* audio_map[][3] = { + + /* analog mixer setup is different from diagram for dapm */ + {"HeadPhone Driver", NULL, "Analog Mixer"}, + {"VOUTR", NULL, "Analog Mixer"}, + {"VOUTL", NULL, "Analog Mixer"}, + {"Analog Mixer", NULL, "VINR"}, + {"Analog Mixer", NULL, "VINL"}, + {"Analog Mixer", NULL, "DAC"}, + + /* headphone driver */ + {"VOUTLHP", NULL, "HeadPhone Driver"}, + {"VOUTRHP", NULL, "HeadPhone Driver"}, + + /* input mux */ + {"Left ADC", NULL, "Input Mux"}, + {"Input Mux", "Mic", "Mic LNA"}, + {"Input Mux", "Line", "Left PGA"}, + + /* right input */ + {"Right ADC", NULL, "Right PGA"}, + + /* inputs */ + {"Mic LNA", NULL, "VINM"}, + {"Left PGA", NULL, "VINL"}, + {"Right PGA", NULL, "VINR"}, +}; + +static int uda1380_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(uda1380_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &uda1380_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +static int uda1380_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + uda1380_write(codec, UDA1380_CLK, R00_EN_DAC | R00_EN_INT | clk); + else + uda1380_write(codec, UDA1380_CLK, R00_EN_ADC | R00_EN_DEC | clk); + + return 0; +} + +static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + uda1380_write(codec, UDA1380_CLK, ~(R00_EN_DAC | R00_EN_INT) & clk); + else + uda1380_write(codec, UDA1380_CLK, ~(R00_EN_ADC | R00_EN_DEC) & clk); +} + +static unsigned int uda1380_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + if(info->fs != 256) + return 0; + + /* we only support 256 FS atm */ + if(info->rate * info->fs == clk) { + dai->mclk = clk; + return clk; + } + + return 0; +} + +static int uda1380_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & 0xbfff; + if(mute) + uda1380_write(codec, UDA1380_DEEMP, mute_reg | 0x4000); + else + uda1380_write(codec, UDA1380_DEEMP, mute_reg); + return 0; +} + +static int uda1380_dapm_event(struct snd_soc_codec *codec, int event) +{ + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* everything off except internal bias */ + uda1380_write(codec, UDA1380_PM, R02_PON_BIAS); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* everything off, inactive */ + uda1380_write(codec, UDA1380_PM, 0x0); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai uda1380_dai = { + .name = "UDA1380", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = uda1380_config_sysclk, + .digital_mute = uda1380_mute, + .ops = { + .prepare = uda1380_pcm_prepare, + .shutdown = uda1380_pcm_shutdown, + }, + .caps = { + .num_modes = ARRAY_SIZE(uda1380_modes), + .mode = uda1380_modes, + }, +}; +EXPORT_SYMBOL_GPL(uda1380_dai); + +static int uda1380_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + uda1380_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int uda1380_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) { + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + uda1380_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + uda1380_dapm_event(codec, codec->suspend_dapm_state); + return 0; +} + +/* + * initialise the UDA1380 driver + * register the mixer and dsp interfaces with the kernel + */ +static int uda1380_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int ret = 0; + + codec->name = "UDA1380"; + codec->owner = THIS_MODULE; + codec->read = uda1380_read_reg_cache; + codec->write = uda1380_write; + codec->dapm_event = uda1380_dapm_event; + codec->dai = &uda1380_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(uda1380_reg); + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(uda1380_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, uda1380_reg, sizeof(u16) * ARRAY_SIZE(uda1380_reg)); + + uda1380_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* power on device */ + uda1380_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + uda1380_write(codec, UDA1380_CLK, 0); + + /* uda1380 init */ + uda1380_add_controls(codec); + uda1380_add_widgets(codec); + snd_soc_register_card(socdev); + + return 0; +} + +static struct snd_soc_device *uda1380_socdev; + +#ifdef CONFIG_I2C + +#define I2C_DRIVERID_UDA1380 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver uda1380_i2c_driver; +static struct i2c_client client_template; + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ + +static int uda1380_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = uda1380_socdev; + struct uda1380_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + i2c_set_clientdata(i2c, codec); + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + printk(KERN_ERR "failed to attach codec at addr %x\n", addr); + kfree(i2c); + return ret; + } + + uda1380_init(socdev); + return 0; +} + +static int uda1380_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec* codec = i2c_get_clientdata(client); + + i2c_detach_client(client); + kfree(codec->reg_cache); + kfree(client); + + return 0; +} + +static int uda1380_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, uda1380_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver uda1380_i2c_driver = { + .driver = { + .name = "UDA1380 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_UDA1380, + .attach_adapter = uda1380_i2c_attach, + .detach_client = uda1380_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "UDA1380", + .driver = &uda1380_i2c_driver, +}; +#endif + +static int uda1380_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct uda1380_setup_data *setup = socdev->codec_data; + struct snd_soc_codec* codec; + int ret = 0; + + printk(KERN_INFO "UDA1380 Audio Codec %s", UDA1380_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + uda1380_socdev = socdev; +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&uda1380_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + return ret; +} + +/* power down chip */ +static int uda1380_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec* codec = socdev->codec; + + if (codec->control_data) + uda1380_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&uda1380_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_uda1380 = { + .probe = uda1380_probe, + .remove = uda1380_remove, + .suspend = uda1380_suspend, + .resume = uda1380_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380); + +MODULE_AUTHOR("Giorgio Padrin"); +MODULE_DESCRIPTION("Audio support for codec Philips UDA1380"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/uda1380.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/uda1380.h @@ -0,0 +1,56 @@ +/* + * Audio support for Philips UDA1380 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Copyright (c) 2005 Giorgio Padrin + */ + +#define UDA1380_CLK 0x00 +#define UDA1380_IFACE 0x01 +#define UDA1380_PM 0x02 +#define UDA1380_AMIX 0x03 +#define UDA1380_HP 0x04 +#define UDA1380_MVOL 0x10 +#define UDA1380_MIXVOL 0x11 +#define UDA1380_MODE 0x12 +#define UDA1380_DEEMP 0x13 +#define UDA1380_MIXER 0x14 +#define UDA1380_INTSTAT 0x18 +#define UDA1380_DEC 0x20 +#define UDA1380_PGA 0x21 +#define UDA1380_ADC 0x22 +#define UDA1380_AGC 0x23 +#define UDA1380_DECSTAT 0x28 +#define UDA1380_RESET 0x7f + +#define UDA1380_CACHEREGNUM 0x24 + +/* Register flags */ +#define R00_EN_ADC 0x0800 +#define R00_EN_DEC 0x0400 +#define R00_EN_DAC 0x0200 +#define R00_EN_INT 0x0100 +#define R02_PON_HP 0x2000 +#define R02_PON_DAC 0x0400 +#define R02_PON_BIAS 0x0100 +#define R02_PON_LNA 0x0010 +#define R02_PON_PGAL 0x0008 +#define R02_PON_ADCL 0x0004 +#define R02_PON_PGAR 0x0002 +#define R02_PON_ADCR 0x0001 +#define R13_MTM 0x4000 +#define R21_MT_ADC 0x8000 +#define R22_SEL_LNA 0x0008 +#define R22_SEL_MIC 0x0004 +#define R22_SKIP_DCFIL 0x0002 +#define R23_AGC_EN 0x0001 + +struct uda1380_setup_data { + unsigned short i2c_address; +}; + +extern struct snd_soc_codec_dai uda1380_dai; +extern struct snd_soc_codec_device soc_codec_dev_uda1380; Index: linux-2.6-pxa/sound/soc/codecs/wm8731.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8731.c @@ -0,0 +1,759 @@ +/* + * wm8731.c -- WM8731 ALSA Soc Audio driver + * + * Copyright 2005 Openedhand Ltd. + * + * Author: Richard Purdie + * + * Based on wm8753.c by Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wm8731.h" + +#define AUDIO_NAME "wm8731" +#define WM8731_VERSION "0.11" + +/* + * Debug + */ + +#define PFX AUDIO_NAME +#define WM8731_DEBUG 0 + +#ifdef WM8731_DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) + +struct snd_soc_codec_device soc_codec_dev_wm8731; + +/* + * wm8731 register cache + * We can't read the WM8731 register space when we are + * using 2 wire for device control, so we cache them instead. + * There is no point in caching the reset register + */ +static const u16 wm8731_reg[WM8731_CACHEREGNUM] = { + 0x0097, 0x0097, 0x0079, 0x0079, + 0x000a, 0x0008, 0x009f, 0x000a, + 0x0000, 0x0000 +}; + +#define WM8731_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \ + SND_SOC_DAIFMT_IB_IF) + +#define WM8731_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM8731_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + +#define WM8731_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) + +static struct snd_soc_dai_mode wm8731_modes[] = { + /* codec frame and clock master modes */ + /* 8k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0, + 1536, SND_SOC_FSB(64)}, + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0, + 2304, SND_SOC_FSB(64)}, + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0, + 1408, SND_SOC_FSB(64)}, + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_8000, WM8731_DIR, 0, + 2112, SND_SOC_FSB(64)}, + + /* 32k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_32000, WM8731_DIR, 0, + 384, SND_SOC_FSB(64)}, + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_32000, WM8731_DIR, 0, + 576, SND_SOC_FSB(64)}, + + /* 44.1k & 48k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, WM8731_DIR, + 0, 256, SND_SOC_FSB(64)}, + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, WM8731_DIR, + 0, 384, SND_SOC_FSB(64)}, + + /* 88.2 & 96k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, WM8731_DIR, + 0, 128, SND_SOC_FSB(64)}, + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000, WM8731_DIR, + 0, 192, SND_SOC_FSB(64)}, + + /* USB codec frame and clock master modes */ + /* 8k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_8000, WM8731_DIR, SND_SOC_DAI_BFS_DIV, + 1500, SND_SOC_FSBD(1)}, + + /* 44.1k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_44100, WM8731_DIR, + SND_SOC_DAI_BFS_DIV, 272, SND_SOC_FSBD(1)}, + + /* 48k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_48000, WM8731_DIR, + SND_SOC_DAI_BFS_DIV, 250, SND_SOC_FSBD(1)}, + + /* 88.2k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_88200, WM8731_DIR, + SND_SOC_DAI_BFS_DIV, 136, SND_SOC_FSBD(1)}, + + /* 96k */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8731_PCM_FORMATS, SNDRV_PCM_RATE_96000, WM8731_DIR, + SND_SOC_DAI_BFS_DIV, 125, SND_SOC_FSBD(1)}, + + /* codec frame and clock slave modes */ + {WM8731_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), WM8731_PCM_FORMATS, + WM8731_RATES, WM8731_DIR, SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSBD_ALL}, +}; + +/* + * read wm8731 register cache + */ +static inline unsigned int wm8731_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg == WM8731_RESET) + return 0; + if (reg >= WM8731_CACHEREGNUM) + return -1; + return cache[reg]; +} + +/* + * write wm8731 register cache + */ +static inline void wm8731_write_reg_cache(struct snd_soc_codec *codec, + u16 reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg >= WM8731_CACHEREGNUM) + return; + cache[reg] = value; +} + +/* + * write to the WM8731 register space + */ +static int wm8731_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8731 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8731_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +#define wm8731_reset(c) wm8731_write(c, WM8731_RESET, 0) + +static const char* wm8731_input_select[] = {"Line In", "Mic"}; +static const char* wm8731_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; + +static const struct soc_enum wm8731_enum[] = { + SOC_ENUM_SINGLE(WM8731_APANA, 2, 2, wm8731_input_select), + SOC_ENUM_SINGLE(WM8731_APDIGI, 1, 4, wm8731_deemph), +}; + +static const struct snd_kcontrol_new wm8731_snd_controls[] = { + +SOC_DOUBLE_R("Playback Volume", WM8731_LOUT1V, WM8731_ROUT1V, 0, 127, 0), +SOC_DOUBLE_R("Playback ZC Switch", WM8731_LOUT1V, WM8731_ROUT1V, 7, 1, 0), + +SOC_DOUBLE_R("Capture Volume", WM8731_LINVOL, WM8731_RINVOL, 0, 31, 0), +SOC_DOUBLE_R("Line Capture Switch", WM8731_LINVOL, WM8731_RINVOL, 7, 1, 1), + +SOC_SINGLE("Mic Boost (+20dB)", WM8731_APANA, 0, 1, 0), +SOC_SINGLE("Capture Mic Switch", WM8731_APANA, 1, 1, 1), + +SOC_SINGLE("Sidetone Playback Volume", WM8731_APANA, 6, 3, 1), + +SOC_SINGLE("ADC High Pass Filter Switch", WM8731_APDIGI, 0, 1, 1), +SOC_SINGLE("Store DC Offset Switch", WM8731_APDIGI, 4, 1, 0), + +SOC_ENUM("Playback De-emphasis", wm8731_enum[1]), +}; + +/* add non dapm controls */ +static int wm8731_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8731_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8731_snd_controls[i],codec, NULL))) < 0) + return err; + } + + return 0; +} + +/* Output Mixer */ +static const struct snd_kcontrol_new wm8731_output_mixer_controls[] = { +SOC_DAPM_SINGLE("Line Bypass Switch", WM8731_APANA, 3, 1, 0), +SOC_DAPM_SINGLE("Mic Sidetone Switch", WM8731_APANA, 5, 1, 0), +SOC_DAPM_SINGLE("HiFi Playback Switch", WM8731_APANA, 4, 1, 0), +}; + +/* Input mux */ +static const struct snd_kcontrol_new wm8731_input_mux_controls = +SOC_DAPM_ENUM("Input Select", wm8731_enum[0]); + +static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = { +SND_SOC_DAPM_MIXER("Output Mixer", WM8731_PWR, 4, 1, &wm8731_output_mixer_controls[0], + ARRAY_SIZE(wm8731_output_mixer_controls)), +SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8731_PWR, 3, 1), +SND_SOC_DAPM_OUTPUT("LOUT"), +SND_SOC_DAPM_OUTPUT("LHPOUT"), +SND_SOC_DAPM_OUTPUT("ROUT"), +SND_SOC_DAPM_OUTPUT("RHPOUT"), +SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8731_PWR, 2, 1), +SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &wm8731_input_mux_controls), +SND_SOC_DAPM_PGA("Line Input", WM8731_PWR, 0, 1, NULL, 0), +SND_SOC_DAPM_MICBIAS("Mic Bias", WM8731_PWR, 1, 1), +SND_SOC_DAPM_INPUT("MICIN"), +SND_SOC_DAPM_INPUT("RLINEIN"), +SND_SOC_DAPM_INPUT("LLINEIN"), +}; + +static const char *intercon[][3] = { + /* output mixer */ + {"Output Mixer", "Line Bypass Switch", "Line Input"}, + {"Output Mixer", "HiFi Playback Switch", "DAC"}, + {"Output Mixer", "Mic Sidetone Switch", "Mic Bias"}, + + /* outputs */ + {"RHPOUT", NULL, "Output Mixer"}, + {"ROUT", NULL, "Output Mixer"}, + {"LHPOUT", NULL, "Output Mixer"}, + {"LOUT", NULL, "Output Mixer"}, + + /* input mux */ + {"Input Mux", "Line In", "Line Input"}, + {"Input Mux", "Mic", "Mic Bias"}, + {"ADC", NULL, "Input Mux"}, + + /* inputs */ + {"Line Input", NULL, "LLINEIN"}, + {"Line Input", NULL, "RLINEIN"}, + {"Mic Bias", NULL, "MICIN"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +static int wm8731_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm8731_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8731_dapm_widgets[i]); + } + + /* set up audio path interconnects */ + for(i = 0; intercon[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, intercon[i][0], intercon[i][1], intercon[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +struct _coeff_div { + u32 mclk; + u32 rate; + u16 fs; + u8 sr:4; + u8 bosr:1; + u8 usb:1; +}; + +/* codec mclk clock divider coefficients */ +static const struct _coeff_div coeff_div[] = { + /* 48k */ + {12288000, 48000, 256, 0x0, 0x0, 0x0}, + {18432000, 48000, 384, 0x0, 0x1, 0x0}, + {12000000, 48000, 250, 0x0, 0x0, 0x1}, + + /* 32k */ + {12288000, 32000, 384, 0x6, 0x0, 0x0}, + {18432000, 32000, 576, 0x6, 0x1, 0x0}, + + /* 8k */ + {12288000, 8000, 1536, 0x3, 0x0, 0x0}, + {18432000, 8000, 2304, 0x3, 0x1, 0x0}, + {11289600, 8000, 1408, 0xb, 0x0, 0x0}, + {16934400, 8000, 2112, 0xb, 0x1, 0x0}, + {12000000, 8000, 1500, 0x3, 0x0, 0x1}, + + /* 96k */ + {12288000, 96000, 128, 0x7, 0x0, 0x0}, + {18432000, 96000, 192, 0x7, 0x1, 0x0}, + {12000000, 96000, 125, 0x7, 0x0, 0x1}, + + /* 44.1k */ + {11289600, 44100, 256, 0x8, 0x0, 0x0}, + {16934400, 44100, 384, 0x8, 0x1, 0x0}, + {12000000, 44100, 272, 0x8, 0x1, 0x1}, + + /* 88.2k */ + {11289600, 88200, 128, 0xf, 0x0, 0x0}, + {16934400, 88200, 192, 0xf, 0x1, 0x0}, + {12000000, 88200, 136, 0xf, 0x1, 0x1}, +}; + +static inline int get_coeff(int mclk, int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { + if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) + return i; + } + return 0; +} + +/* WM8731 supports numerous clocks per sample rate */ +static unsigned int wm8731_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + dai->mclk = 0; + + /* check that the calculated FS and rate actually match a clock from + * the machine driver */ + if(info->fs * info->rate == clk) + dai->mclk = clk; + + return dai->mclk; +} + +static int wm8731_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 iface = 0, bfs, srate; + int i = get_coeff(rtd->codec_dai->mclk, + snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate)); + + bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs); + + /* set master/slave audio interface */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + iface |= 0x0040; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + } + srate = (coeff_div[i].sr << 2) | (coeff_div[i].bosr << 1) | coeff_div[i].usb; + wm8731_write(codec, WM8731_SRATE, srate); + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + iface |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + iface |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + iface |= 0x0013; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + iface |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + case SNDRV_PCM_FORMAT_S24_LE: + iface |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + iface |= 0x000c; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface |= 0x0090; + break; + case SND_SOC_DAIFMT_IB_NF: + iface |= 0x0080; + break; + case SND_SOC_DAIFMT_NB_IF: + iface |= 0x0010; + break; + } + + /* set face */ + wm8731_write(codec, WM8731_IFACE, iface); + return 0; +} + +static int wm8731_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = wm8731_read_reg_cache(codec, WM8731_APDIGI) & 0xfff7; + if(mute) + wm8731_write(codec, WM8731_APDIGI, mute_reg | 0x8); + else + wm8731_write(codec, WM8731_APDIGI, mute_reg); + return 0; +} + +static int wm8731_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 reg = wm8731_read_reg_cache(codec, WM8731_PWR) & 0xff7f; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* vref/mid, osc on, dac unmute, active */ + wm8731_write(codec, WM8731_ACTIVE, 0x0001); + wm8731_write(codec, WM8731_PWR, reg); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* everything off except vref/vmid, */ + wm8731_write(codec, WM8731_ACTIVE, 0x0); + wm8731_write(codec, WM8731_PWR, reg | 0x0040); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* everything off, dac mute, inactive */ + wm8731_write(codec, WM8731_ACTIVE, 0x0); + wm8731_write(codec, WM8731_PWR, 0xffff); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai wm8731_dai = { + .name = "WM8731", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = wm8731_config_sysclk, + .digital_mute = wm8731_mute, + .ops = { + .prepare = wm8731_pcm_prepare, + }, + .caps = { + .num_modes = ARRAY_SIZE(wm8731_modes), + .mode = wm8731_modes, + }, +}; +EXPORT_SYMBOL_GPL(wm8731_dai); + +static int wm8731_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm8731_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(wm8731_reg); i++) { + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + wm8731_dapm_event(codec, codec->suspend_dapm_state); + return 0; +} + +/* + * initialise the WM8731 driver + * register the mixer and dsp interfaces with the kernel + */ +static int wm8731_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int reg, ret = 0; + + codec->name = "WM8731"; + codec->owner = THIS_MODULE; + codec->read = wm8731_read_reg_cache; + codec->write = wm8731_write; + codec->dapm_event = wm8731_dapm_event; + codec->dai = &wm8731_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(wm8731_reg); + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm8731_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, wm8731_reg, sizeof(u16) * ARRAY_SIZE(wm8731_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8731_reg); + + wm8731_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* power on device */ + wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* set the update bits */ + reg = wm8731_read_reg_cache(codec, WM8731_LOUT1V); + wm8731_write(codec, WM8731_LOUT1V, reg | 0x0100); + reg = wm8731_read_reg_cache(codec, WM8731_ROUT1V); + wm8731_write(codec, WM8731_ROUT1V, reg | 0x0100); + reg = wm8731_read_reg_cache(codec, WM8731_LINVOL); + wm8731_write(codec, WM8731_LINVOL, reg | 0x0100); + reg = wm8731_read_reg_cache(codec, WM8731_RINVOL); + wm8731_write(codec, WM8731_RINVOL, reg | 0x0100); + + wm8731_add_controls(codec); + wm8731_add_widgets(codec); + if((ret = snd_soc_register_card(socdev)) < 0) { + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + } + + return ret; +} + +static struct snd_soc_device *wm8731_socdev; + +#ifdef CONFIG_I2C + +/* + * WM8731 2 wire address is determined by GPIO5 + * state during powerup. + * low = 0x1a + * high = 0x1b + */ +#define I2C_DRIVERID_WM8731 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver wm8731_i2c_driver; +static struct i2c_client client_template; + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ + +static int wm8731_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = wm8731_socdev; + struct wm8731_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + i2c_set_clientdata(i2c, codec); + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + err("failed to attach codec at addr %x\n", addr); + goto err; + } + + if((ret = wm8731_init(socdev)) < 0) { + err("failed to initialise WM8731\n"); + goto err; + } + return ret; + +err: + kfree(codec); + kfree(i2c); + return ret; +} + +static int wm8731_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec* codec = i2c_get_clientdata(client); + i2c_detach_client(client); + kfree(codec->reg_cache); + kfree(client); + return 0; +} + +static int wm8731_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, wm8731_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver wm8731_i2c_driver = { + .driver = { + .name = "WM8731 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_WM8731, + .attach_adapter = wm8731_i2c_attach, + .detach_client = wm8731_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "WM8731", + .driver = &wm8731_i2c_driver, +}; +#endif + +static int wm8731_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct wm8731_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec; + int ret = 0; + + info("WM8731 Audio Codec %s", WM8731_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + wm8731_socdev = socdev; +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&wm8731_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + return ret; +} + +/* power down chip */ +static int wm8731_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if (codec->control_data) + wm8731_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&wm8731_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm8731 = { + .probe = wm8731_probe, + .remove = wm8731_remove, + .suspend = wm8731_suspend, + .resume = wm8731_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm8731); + +MODULE_DESCRIPTION("Soc WM8731 driver"); +MODULE_AUTHOR("Richard Purdie"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm8731.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8731.h @@ -0,0 +1,41 @@ +/* + * wm8731.h -- WM8731 Soc Audio driver + * + * Copyright 2005 Openedhand Ltd. + * + * Author: Richard Purdie + * + * Based on wm8753.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _WM8731_H +#define _WM8731_H + +/* WM8731 register space */ + +#define WM8731_LINVOL 0x00 +#define WM8731_RINVOL 0x01 +#define WM8731_LOUT1V 0x02 +#define WM8731_ROUT1V 0x03 +#define WM8731_APANA 0x04 +#define WM8731_APDIGI 0x05 +#define WM8731_PWR 0x06 +#define WM8731_IFACE 0x07 +#define WM8731_SRATE 0x08 +#define WM8731_ACTIVE 0x09 +#define WM8731_RESET 0x0f + +#define WM8731_CACHEREGNUM 10 + +struct wm8731_setup_data { + unsigned short i2c_address; +}; + +extern struct snd_soc_codec_dai wm8731_dai; +extern struct snd_soc_codec_device soc_codec_dev_wm8731; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm8750.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8750.c @@ -0,0 +1,1098 @@ +/* + * wm8750.c -- WM8750 ALSA SoC audio driver + * + * Copyright 2005 Openedhand Ltd. + * + * Author: Richard Purdie + * + * Based on WM8753.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wm8750.h" + +#define AUDIO_NAME "WM8750" +#define WM8750_VERSION "0.10" + +/* + * Debug + */ + +#define PFX AUDIO_NAME +#define WM8750_DEBUG 0 + +#ifdef WM8750_DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) + +static struct workqueue_struct *wm8750_workq = NULL; +static struct work_struct wm8750_dapm_work; + +/* + * wm8750 register cache + * We can't read the WM8750 register space when we + * are using 2 wire for device control, so we cache them instead. + */ +static const u16 wm8750_reg[] = { + 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ + 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ + 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ + 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ + 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ + 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ + 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ + 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ + 0x0079, 0x0079, 0x0079, /* 40 */ +}; + +#define WM8750_HIFI_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \ + SND_SOC_DAIFMT_IB_IF) + +#define WM8750_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM8750_HIFI_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + +#define WM8750_HIFI_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + +#define WM8750_HIFI_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) + +static struct snd_soc_dai_mode wm8750_modes[] = { + /* common codec frame and clock master modes */ + /* 8k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1536, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1408, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 2304, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 2112, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1500, WM8750_HIFI_FSB}, + + /* 11.025k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1024, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1536, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1088, WM8750_HIFI_FSB}, + + /* 16k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 768, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 1152, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 750, WM8750_HIFI_FSB}, + + /* 22.05k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 512, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 768, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 544, WM8750_HIFI_FSB}, + + /* 32k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 384, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 576, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 375, WM8750_HIFI_FSB}, + + /* 44.1k & 48k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, WM8750_DIR, SND_SOC_DAI_BFS_DIV, 256, + WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, WM8750_DIR, SND_SOC_DAI_BFS_DIV, 384, + WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 272, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_48000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 250, WM8750_HIFI_FSB}, + + /* 96k */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000, WM8750_DIR, SND_SOC_DAI_BFS_DIV, 128, + WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000, WM8750_DIR, SND_SOC_DAI_BFS_DIV, 192, + WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 136, WM8750_HIFI_FSB}, + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8750_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_96000, + WM8750_DIR, SND_SOC_DAI_BFS_DIV, 125, WM8750_HIFI_FSB}, + + /* codec frame and clock slave modes */ + {WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + WM8750_HIFI_PCM_FORMATS, WM8750_HIFI_RATES, WM8750_DIR, + SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSBD_ALL}, +}; + +/* + * read wm8750 register cache + */ +static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg > WM8750_CACHE_REGNUM) + return -1; + return cache[reg]; +} + +/* + * write wm8750 register cache + */ +static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg > WM8750_CACHE_REGNUM) + return; + cache[reg] = value; +} + +static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8753 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8750_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +#define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0) + +/* + * WM8750 Controls + */ +static const char* wm8750_bass[] = {"Linear Control", "Adaptive Boost"}; +static const char* wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; +static const char* wm8750_treble[] = {"8kHz", "4kHz"}; +static const char* wm8750_3d_lc[] = {"200Hz", "500Hz"}; +static const char* wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"}; +static const char* wm8750_3d_func[] = {"Capture", "Playback"}; +static const char* wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"}; +static const char* wm8750_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"}; +static const char* wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", "Differential"}; +static const char* wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3", "Differential"}; +static const char* wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", "ROUT1"}; +static const char* wm8750_diff_sel[] = {"Line 1", "Line 2"}; +static const char* wm8750_adcpol[] = {"Normal", "L Invert", "R Invert", "L + R Invert"}; +static const char* wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; +static const char* wm8750_mono_mux[] = {"Stereo", "Mono (Left)", "Mono (Right)", "Digital Mono"}; + +static const struct soc_enum wm8750_enum[] = { +SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass), +SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter), +SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble), +SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc), +SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc), +SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func), +SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func), +SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type), +SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux), +SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux), +SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */ +SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel), +SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3), +SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel), +SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol), +SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph), +SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */ + +}; + +static const struct snd_kcontrol_new wm8750_snd_controls[] = { + +SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0), +SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0), +SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1), + +SOC_DOUBLE_R("Out1 Playback ZC Switch", WM8750_LOUT1V, WM8750_ROUT1V, 7, 1, 0), +SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8750_LOUT2V, WM8750_ROUT2V, 7, 1, 0), + +SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), + +SOC_ENUM("Capture Polarity", wm8750_enum[14]), +SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0), +SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0), + +SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0), + +SOC_ENUM("Bass Boost", wm8750_enum[0]), +SOC_ENUM("Bass Filter", wm8750_enum[1]), +SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1), + +SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 0), +SOC_ENUM("Treble Cut-off", wm8750_enum[2]), + +SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0), +SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0), +SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), +SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), +SOC_ENUM("3D Mode", wm8750_enum[5]), + +SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0), +SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0), +SOC_ENUM("ALC Capture Function", wm8750_enum[6]), +SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0), +SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0), +SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0), +SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0), +SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0), +SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]), +SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0), + +SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0), +SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0), + +SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0), +SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0), + +SOC_SINGLE("Right Out2 Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0), + +/* Unimplemented */ +/* ADCDAC Bit 0 - ADCHPD */ +/* ADCDAC Bit 4 - HPOR */ +/* ADCTL1 Bit 2,3 - DATSEL */ +/* ADCTL1 Bit 4,5 - DMONOMIX */ +/* ADCTL1 Bit 6,7 - VSEL */ +/* ADCTL2 Bit 2 - LRCM */ +/* ADCTL2 Bit 3 - TRI */ +/* ADCTL3 Bit 5 - HPFLREN */ +/* ADCTL3 Bit 6 - VROI */ +/* ADCTL3 Bit 7,8 - ADCLRM */ +/* ADCIN Bit 4 - LDCM */ +/* ADCIN Bit 5 - RDCM */ + +SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0), + +SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1, WM8750_LOUTM2, 4, 7, 1), +SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1, WM8750_ROUTM2, 4, 7, 1), +SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1, WM8750_MOUTM2, 4, 7, 1), + +SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0), + +SOC_DOUBLE_R("Out1 Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V, 0, 127, 0), +SOC_DOUBLE_R("Out2 Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V, 0, 127, 0), + +SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0), + +}; + +/* add non dapm controls */ +static int wm8750_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL))) < 0) + return err; + } + return 0; +} + +/* + * DAPM Controls + */ + +/* Left Mixer */ +static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = { +SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0), +SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0), +}; + +/* Right Mixer */ +static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = { +SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0), +SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0), +}; + +/* Mono Mixer */ +static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = { +SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0), +SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0), +}; + +/* Left Line Mux */ +static const struct snd_kcontrol_new wm8750_left_line_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[8]); + +/* Right Line Mux */ +static const struct snd_kcontrol_new wm8750_right_line_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[9]); + +/* Left PGA Mux */ +static const struct snd_kcontrol_new wm8750_left_pga_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[10]); + +/* Right PGA Mux */ +static const struct snd_kcontrol_new wm8750_right_pga_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[11]); + +/* Out 3 Mux */ +static const struct snd_kcontrol_new wm8750_out3_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[12]); + +/* Differential Mux */ +static const struct snd_kcontrol_new wm8750_diffmux_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[13]); + +/* Mono ADC Mux */ +static const struct snd_kcontrol_new wm8750_monomux_controls = +SOC_DAPM_ENUM("Route", wm8750_enum[16]); + +static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = { + SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, + &wm8750_left_mixer_controls[0], ARRAY_SIZE(wm8750_left_mixer_controls)), + SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, + &wm8750_right_mixer_controls[0], ARRAY_SIZE(wm8750_right_mixer_controls)), + SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0, + &wm8750_mono_mixer_controls[0], ARRAY_SIZE(wm8750_mono_mixer_controls)), + + SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0), + SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0), + SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0), + SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0), + SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0), + SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0), + + SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0), + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0), + + SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0, &wm8750_left_pga_controls), + SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0, &wm8750_right_pga_controls), + SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, &wm8750_left_line_controls), + SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, &wm8750_right_line_controls), + + SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls), + SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0), + SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0), + + SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, &wm8750_diffmux_controls), + SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, &wm8750_monomux_controls), + SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, &wm8750_monomux_controls), + + SND_SOC_DAPM_OUTPUT("LOUT1"), + SND_SOC_DAPM_OUTPUT("ROUT1"), + SND_SOC_DAPM_OUTPUT("LOUT2"), + SND_SOC_DAPM_OUTPUT("ROUT2"), + SND_SOC_DAPM_OUTPUT("MONO"), + SND_SOC_DAPM_OUTPUT("OUT3"), + + SND_SOC_DAPM_INPUT("LINPUT1"), + SND_SOC_DAPM_INPUT("LINPUT2"), + SND_SOC_DAPM_INPUT("LINPUT3"), + SND_SOC_DAPM_INPUT("RINPUT1"), + SND_SOC_DAPM_INPUT("RINPUT2"), + SND_SOC_DAPM_INPUT("RINPUT3"), +}; + +static const char* audio_map[][3] = { + /* left mixer */ + {"Left Mixer", "Playback Switch", "Left DAC"}, + {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, + {"Left Mixer", "Right Playback Switch", "Right DAC"}, + {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, + + /* right mixer */ + {"Right Mixer", "Left Playback Switch", "Left DAC"}, + {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, + {"Right Mixer", "Playback Switch", "Right DAC"}, + {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, + + /* left out 1 */ + {"Left Out 1", NULL, "Left Mixer"}, + {"LOUT1", NULL, "Left Out 1"}, + + /* left out 2 */ + {"Left Out 2", NULL, "Left Mixer"}, + {"LOUT2", NULL, "Left Out 2"}, + + /* right out 1 */ + {"Right Out 1", NULL, "Right Mixer"}, + {"ROUT1", NULL, "Right Out 1"}, + + /* right out 2 */ + {"Right Out 2", NULL, "Right Mixer"}, + {"ROUT2", NULL, "Right Out 2"}, + + /* mono mixer */ + {"Mono Mixer", "Left Playback Switch", "Left DAC"}, + {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, + {"Mono Mixer", "Right Playback Switch", "Right DAC"}, + {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, + + /* mono out */ + {"Mono Out 1", NULL, "Mono Mixer"}, + {"MONO1", NULL, "Mono Out 1"}, + + /* out 3 */ + {"Out3 Mux", "VREF", "VREF"}, + {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, + {"Out3 Mux", "ROUT1", "Right Mixer"}, + {"Out3 Mux", "MonoOut", "MONO1"}, + {"Out 3", NULL, "Out3 Mux"}, + {"OUT3", NULL, "Out 3"}, + + /* Left Line Mux */ + {"Left Line Mux", "Line 1", "LINPUT1"}, + {"Left Line Mux", "Line 2", "LINPUT2"}, + {"Left Line Mux", "Line 3", "LINPUT3"}, + {"Left Line Mux", "PGA", "Left PGA Mux"}, + {"Left Line Mux", "Differential", "Differential Mux"}, + + /* Right Line Mux */ + {"Right Line Mux", "Line 1", "RINPUT1"}, + {"Right Line Mux", "Line 2", "RINPUT2"}, + {"Right Line Mux", "Line 3", "RINPUT3"}, + {"Right Line Mux", "PGA", "Right PGA Mux"}, + {"Right Line Mux", "Differential", "Differential Mux"}, + + /* Left PGA Mux */ + {"Left PGA Mux", "Line 1", "LINPUT1"}, + {"Left PGA Mux", "Line 2", "LINPUT2"}, + {"Left PGA Mux", "Line 3", "LINPUT3"}, + {"Left PGA Mux", "Differential", "Differential Mux"}, + + /* Right PGA Mux */ + {"Right PGA Mux", "Line 1", "RINPUT1"}, + {"Right PGA Mux", "Line 2", "RINPUT2"}, + {"Right PGA Mux", "Line 3", "RINPUT3"}, + {"Right PGA Mux", "Differential", "Differential Mux"}, + + /* Differential Mux */ + {"Differential Mux", "Line 1", "LINPUT1"}, + {"Differential Mux", "Line 1", "RINPUT1"}, + {"Differential Mux", "Line 2", "LINPUT2"}, + {"Differential Mux", "Line 2", "RINPUT2"}, + + /* Left ADC Mux */ + {"Left ADC Mux", "Stereo", "Left PGA Mux"}, + {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, + {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, + + /* Right ADC Mux */ + {"Right ADC Mux", "Stereo", "Right PGA Mux"}, + {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, + {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, + + /* ADC */ + {"Left ADC", NULL, "Left ADC Mux"}, + {"Right ADC", NULL, "Right ADC Mux"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +static int wm8750_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +struct _coeff_div { + u32 mclk; + u32 rate; + u16 fs; + u8 sr:5; + u8 usb:1; +}; + +/* codec hifi mclk clock divider coefficients */ +static const struct _coeff_div coeff_div[] = { + /* 8k */ + {12288000, 8000, 1536, 0x6, 0x0}, + {11289600, 8000, 1408, 0x16, 0x0}, + {18432000, 8000, 2304, 0x7, 0x0}, + {16934400, 8000, 2112, 0x17, 0x0}, + {12000000, 8000, 1500, 0x6, 0x1}, + + /* 11.025k */ + {11289600, 11025, 1024, 0x18, 0x0}, + {16934400, 11025, 1536, 0x19, 0x0}, + {12000000, 11025, 1088, 0x19, 0x1}, + + /* 16k */ + {12288000, 16000, 768, 0xa, 0x0}, + {18432000, 16000, 1152, 0xb, 0x0}, + {12000000, 16000, 750, 0xa, 0x1}, + + /* 22.05k */ + {11289600, 22050, 512, 0x1a, 0x0}, + {16934400, 22050, 768, 0x1b, 0x0}, + {12000000, 22050, 544, 0x1b, 0x1}, + + /* 32k */ + {12288000, 32000, 384, 0xc, 0x0}, + {18432000, 32000, 576, 0xd, 0x0}, + {12000000, 32000, 375, 0xa, 0x1}, + + /* 44.1k */ + {11289600, 44100, 256, 0x10, 0x0}, + {16934400, 44100, 384, 0x11, 0x0}, + {12000000, 44100, 272, 0x11, 0x1}, + + /* 48k */ + {12288000, 48000, 256, 0x0, 0x0}, + {18432000, 48000, 384, 0x1, 0x0}, + {12000000, 48000, 250, 0x0, 0x1}, + + /* 88.2k */ + {11289600, 88200, 128, 0x1e, 0x0}, + {16934400, 88200, 192, 0x1f, 0x0}, + {12000000, 88200, 136, 0x1f, 0x1}, + + /* 96k */ + {12288000, 96000, 128, 0xe, 0x0}, + {18432000, 96000, 192, 0xf, 0x0}, + {12000000, 96000, 125, 0xe, 0x1}, +}; + +static inline int get_coeff(int mclk, int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { + if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) + return i; + } + return -EINVAL; +} + +/* WM8750 supports numerous input clocks per sample rate */ +static unsigned int wm8750_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + dai->mclk = 0; + + /* check that the calculated FS and rate actually match a clock from + * the machine driver */ + if(info->fs * info->rate == clk) + dai->mclk = clk; + + return dai->mclk; +} + +static int wm8750_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 iface = 0, bfs, srate; + int i = get_coeff(rtd->codec_dai->mclk, + snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate)); + + /* is coefficient valid ? */ + if(i < 0) + return i; + + bfs = SND_SOC_FSB_REAL(rtd->codec_dai->dai_runtime.bfs); + + /* set master/slave audio interface */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + iface = 0x0040; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + } + + srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x01c0; + wm8750_write(codec, WM8750_SRATE, srate | (coeff_div[i].sr << 1) | coeff_div[i].usb); + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + iface |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + iface |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + iface |= 0x0013; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + iface |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + case SNDRV_PCM_FORMAT_S24_LE: + iface |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + iface |= 0x000c; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface |= 0x0090; + break; + case SND_SOC_DAIFMT_IB_NF: + iface |= 0x0080; + break; + case SND_SOC_DAIFMT_NB_IF: + iface |= 0x0010; + break; + } + + /* set bclk divisor rate */ + switch (bfs) { + case 1: + break; + case 4: + srate |= (0x1 << 7); + break; + case 8: + srate |= (0x2 << 7); + break; + case 16: + srate |= (0x3 << 7); + break; + } + + /* set rate */ + wm8750_write(codec, WM8750_SRATE, srate); + wm8750_write(codec, WM8750_IFACE, iface); + + return 0; +} + +static int wm8750_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7; + if(mute) + wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8); + else + wm8750_write(codec, WM8750_ADCDAC, mute_reg); + return 0; +} + +static int wm8750_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* set vmid to 50k and unmute dac */ + wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + /* set vmid to 5k for quick power up */ + wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* mute dac and set vmid to 500k, enable VREF */ + wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + wm8750_write(codec, WM8750_PWR1, 0x0001); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai wm8750_dai = { + .name = "WM8750", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = wm8750_config_sysclk, + .digital_mute = wm8750_mute, + .ops = { + .prepare = wm8750_pcm_prepare, + }, + .caps = { + .num_modes = ARRAY_SIZE(wm8750_modes), + .mode = wm8750_modes, + }, +}; +EXPORT_SYMBOL_GPL(wm8750_dai); + +static void wm8750_work(void *data) +{ + struct snd_soc_codec *codec = (struct snd_soc_codec *)data; + wm8750_dapm_event(codec, codec->dapm_state); +} + +static int wm8750_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm8750_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) { + if (i == WM8750_RESET) + continue; + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + + wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* charge wm8750 caps */ + if(codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) { + wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2); + codec->dapm_state = SNDRV_CTL_POWER_D0; + queue_delayed_work(wm8750_workq, &wm8750_dapm_work, msecs_to_jiffies(1000)); + } + + return 0; +} + +/* + * initialise the WM8750 driver + * register the mixer and dsp interfaces with the kernel + */ +static int wm8750_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int reg, ret = 0; + + codec->name = "WM8750"; + codec->owner = THIS_MODULE; + codec->read = wm8750_read_reg_cache; + codec->write = wm8750_write; + codec->dapm_event = wm8750_dapm_event; + codec->dai = &wm8750_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(wm8750_reg); + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm8750_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, wm8750_reg, sizeof(u16) * ARRAY_SIZE(wm8750_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8750_reg); + + wm8750_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* charge output caps */ + wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2); + codec->dapm_state = SNDRV_CTL_POWER_D3hot; + queue_delayed_work(wm8750_workq, &wm8750_dapm_work, msecs_to_jiffies(1000)); + + /* set the update bits */ + reg = wm8750_read_reg_cache(codec, WM8750_LDAC); + wm8750_write(codec, WM8750_LDAC, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_RDAC); + wm8750_write(codec, WM8750_RDAC, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V); + wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V); + wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V); + wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V); + wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_LINVOL); + wm8750_write(codec, WM8750_LINVOL, reg | 0x0100); + reg = wm8750_read_reg_cache(codec, WM8750_RINVOL); + wm8750_write(codec, WM8750_RINVOL, reg | 0x0100); + + wm8750_add_controls(codec); + wm8750_add_widgets(codec); + if((ret = snd_soc_register_card(socdev)) < 0) { + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + } + + return ret; +} + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ +static struct snd_soc_device *wm8750_socdev; + +#ifdef CONFIG_I2C + +/* + * WM8731 2 wire address is determined by GPIO5 + * state during powerup. + * low = 0x1a + * high = 0x1b + */ +#define I2C_DRIVERID_WM8750 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver wm8750_i2c_driver; +static struct i2c_client client_template; + +static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = wm8750_socdev; + struct wm8750_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + i2c_set_clientdata(i2c, codec); + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + err("failed to attach codec at addr %x\n", addr); + goto err; + } + + if((ret = wm8750_init(socdev)) < 0) { + err("failed to initialise WM8750\n"); + goto err; + } + return ret; + +err: + kfree(codec); + kfree(i2c); + return ret; +} + +static int wm8750_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec *codec = i2c_get_clientdata(client); + i2c_detach_client(client); + kfree(codec->reg_cache); + kfree(client); + return 0; +} + +static int wm8750_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, wm8750_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver wm8750_i2c_driver = { + .driver = { + .name = "WM8750 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_WM8750, + .attach_adapter = wm8750_i2c_attach, + .detach_client = wm8750_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "WM8750", + .driver = &wm8750_i2c_driver, +}; +#endif + +static int wm8750_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct wm8750_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec; + int ret = 0; + + info("WM8750 Audio Codec %s", WM8750_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + wm8750_socdev = socdev; + INIT_WORK(&wm8750_dapm_work, wm8750_work, codec); + if((wm8750_workq = create_workqueue("wm8750")) == NULL) { + kfree(codec); + return -ENOMEM; + } +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&wm8750_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + + return ret; +} + +/* power down chip */ +static int wm8750_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if (codec->control_data) + wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + if(wm8750_workq) + destroy_workqueue(wm8750_workq); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&wm8750_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm8750 = { + .probe = wm8750_probe, + .remove = wm8750_remove, + .suspend = wm8750_suspend, + .resume = wm8750_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750); + +MODULE_DESCRIPTION("Soc WM8750 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm8750.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8750.h @@ -0,0 +1,66 @@ +/* + * Copyright 2005 Openedhand Ltd. + * + * Author: Richard Purdie + * + * Based on WM8753.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _WM8750_H +#define _WM8750_H + +/* WM8750 register space */ + +#define WM8750_LINVOL 0x00 +#define WM8750_RINVOL 0x01 +#define WM8750_LOUT1V 0x02 +#define WM8750_ROUT1V 0x03 +#define WM8750_ADCDAC 0x05 +#define WM8750_IFACE 0x07 +#define WM8750_SRATE 0x08 +#define WM8750_LDAC 0x0a +#define WM8750_RDAC 0x0b +#define WM8750_BASS 0x0c +#define WM8750_TREBLE 0x0d +#define WM8750_RESET 0x0f +#define WM8750_3D 0x10 +#define WM8750_ALC1 0x11 +#define WM8750_ALC2 0x12 +#define WM8750_ALC3 0x13 +#define WM8750_NGATE 0x14 +#define WM8750_LADC 0x15 +#define WM8750_RADC 0x16 +#define WM8750_ADCTL1 0x17 +#define WM8750_ADCTL2 0x18 +#define WM8750_PWR1 0x19 +#define WM8750_PWR2 0x1a +#define WM8750_ADCTL3 0x1b +#define WM8750_ADCIN 0x1f +#define WM8750_LADCIN 0x20 +#define WM8750_RADCIN 0x21 +#define WM8750_LOUTM1 0x22 +#define WM8750_LOUTM2 0x23 +#define WM8750_ROUTM1 0x24 +#define WM8750_ROUTM2 0x25 +#define WM8750_MOUTM1 0x26 +#define WM8750_MOUTM2 0x27 +#define WM8750_LOUT2V 0x28 +#define WM8750_ROUT2V 0x29 +#define WM8750_MOUTV 0x2a + +#define WM8750_CACHE_REGNUM 0x2a + +struct wm8750_setup_data { + unsigned short i2c_address; + unsigned int mclk; +}; + +extern struct snd_soc_codec_dai wm8750_dai; +extern struct snd_soc_codec_device soc_codec_dev_wm8750; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm8753.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8753.c @@ -0,0 +1,1893 @@ +/* + * wm8753.c -- WM8753 ALSA Soc Audio driver + * + * Copyright 2003 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Notes: + * The WM8753 is a low power, high quality stereo codec with integrated PCM + * codec designed for portable digital telephony applications. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wm8753.h" + +#define AUDIO_NAME "wm8753" +#define WM8753_VERSION "0.14" + +/* + * Debug + */ + +#define PFX AUDIO_NAME +#define WM8753_DEBUG 0 + +#ifdef WM8753_DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) + +static int caps_charge = 2000; +module_param(caps_charge, int, 0); +MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)"); + +static struct workqueue_struct *wm8753_workq = NULL; +static struct work_struct wm8753_dapm_work; + +/* + * wm8753 register cache + * We can't read the WM8753 register space when we + * are using 2 wire for device control, so we cache them instead. + */ +static const u16 wm8753_reg[] = { + 0x0008, 0x0000, 0x000a, 0x000a, + 0x0033, 0x0000, 0x0007, 0x00ff, + 0x00ff, 0x000f, 0x000f, 0x007b, + 0x0000, 0x0032, 0x0000, 0x00c3, + 0x00c3, 0x00c0, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0055,//32 + 0x0005, 0x0050, 0x0055, 0x0050,//36 + 0x0055, 0x0050, 0x0055, 0x0079,//40 + 0x0079, 0x0079, 0x0079, 0x0079, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0097, 0x0097, 0x0000, 0x0004, + 0x0000, 0x0083, 0x0024, 0x01ba, + 0x0000, 0x0083, 0x0024, 0x01ba, + 0x0000, 0x0000 +}; + +#define WM8753_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF | \ + SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_IB_IF) + +#define WM8753_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM8753_HIFI_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + +#define WM8753_HIFI_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + +#define WM8753_HIFI_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) +/* + * HiFi modes + */ +static struct snd_soc_dai_mode wm8753_hifi_modes[] = { + /* codec frame and clock master modes */ + /* 8k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1536, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1408, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 2304, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 2112, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1500, WM8753_HIFI_FSB}, + + /* 11.025k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1024, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1536, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1088, WM8753_HIFI_FSB}, + + /* 16k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 768, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 1152, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 750, WM8753_HIFI_FSB}, + + /* 22.05k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 512, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 768, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 544, WM8753_HIFI_FSB}, + + /* 32k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_32000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 384, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_32000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 576, WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_32000, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 375, WM8753_HIFI_FSB}, + + /* 44.1k & 48k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, WM8753_DIR, SND_SOC_DAI_BFS_DIV, 256, + WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, WM8753_DIR, SND_SOC_DAI_BFS_DIV, 384, + WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, + SNDRV_PCM_RATE_48000, WM8753_DIR, SND_SOC_DAI_BFS_DIV, 250, + WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 272, + WM8753_HIFI_FSB}, + + /* 88.2k & 96k */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000, WM8753_DIR, SND_SOC_DAI_BFS_DIV, 128, + WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000, WM8753_DIR, SND_SOC_DAI_BFS_DIV, 192, + WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 136, + WM8753_HIFI_FSB}, + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_HIFI_PCM_FORMATS, + SNDRV_PCM_RATE_96000, WM8753_DIR, SND_SOC_DAI_BFS_DIV, 125, + WM8753_HIFI_FSB}, + + /* codec frame and clock slave modes */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + WM8753_HIFI_PCM_FORMATS, WM8753_HIFI_RATES, WM8753_DIR, + SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSBD_ALL}, + +}; + +#define WM8753_VOICE_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + +#define WM8753_VOICE_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +#define WM8753_VOICE_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | SNDRV_PCM_FORMAT_S24_3LE) + +/* + * Voice modes + */ +static struct snd_soc_dai_mode wm8753_voice_modes[] = { + + /* master modes */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_VOICE_PCM_FORMATS, WM8753_VOICE_RATES, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 256, WM8753_VOICE_FSB}, + + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM8753_VOICE_PCM_FORMATS, WM8753_VOICE_RATES, + WM8753_DIR, SND_SOC_DAI_BFS_DIV, 384, WM8753_VOICE_FSB}, + + /* slave modes */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + WM8753_VOICE_PCM_FORMATS, WM8753_VOICE_RATES, WM8753_DIR, + SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, +}; + + +/* + * Mode 4 + */ +static struct snd_soc_dai_mode wm8753_mixed_modes[] = { + /* slave modes */ + {WM8753_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + WM8753_HIFI_PCM_FORMATS, WM8753_HIFI_RATES, WM8753_DIR, + SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, +}; + +/* + * read wm8753 register cache + */ +static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if(reg < 1 || reg > (ARRAY_SIZE(wm8753_reg) + 1)) + return -1; + return cache[reg - 1]; +} + +/* + * write wm8753 register cache + */ +static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if(reg < 1 || reg > (ARRAY_SIZE(wm8753_reg) + 1)) + return; + cache[reg - 1] = value; +} + +/* + * write to the WM8753 register space + */ +static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8753 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8753_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0) + +/* + * WM8753 Controls + */ +static const char* wm8753_base[] = {"Linear Control", "Adaptive Boost"}; +static const char* wm8753_base_filter[] = + {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz", + "100Hz @ 8kHz", "200Hz @ 8kHz"}; +static const char* wm8753_treble[] = {"8kHz", "4kHz"}; +static const char* wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"}; +static const char* wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"}; +static const char* wm8753_3d_func[] = {"Capture", "Playback"}; +static const char* wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"}; +static const char* wm8753_3d_lc[] = {"200Hz", "500Hz"}; +static const char* wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"}; +static const char* wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"}; +static const char* wm8753_dac_phase[] = {"Non Inverted", "Inverted"}; +static const char* wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2", + "Line 1", "Line 2"}; +static const char* wm8753_mono_mux[] = {"Line Mix", "Rx Mix"}; +static const char* wm8753_right_mux[] = {"Line 2", "Rx Mix"}; +static const char* wm8753_left_mux[] = {"Line 1", "Rx Mix"}; +static const char* wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"}; +static const char* wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2", "Right PGA"}; +static const char* wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right", "Left + Right"}; +static const char* wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"}; +static const char* wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"}; +static const char* wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"}; +static const char* wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"}; +static const char* wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left", "Analogue Mix Right", + "Digital Mono Mix"}; +static const char* wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k", "82Hz @ 8kHz", "170Hz @ 8kHz"}; +static const char* wm8753_adc_filter[] = {"HiFi", "Voice"}; +static const char* wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"}; + +static const struct soc_enum wm8753_enum[] = { +SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base), // 0 +SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter), // 1 +SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble), // 2 +SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func), // 3 +SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type), // 4 +SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func), // 5 +SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc), // 6 +SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc), // 7 +SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp), // 8 +SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix), // 9 +SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase), // 10 +SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix), // 11 +SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux), // 12 +SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux), // 13 +SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux), // 14 +SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel), // 15 +SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),// 16 +SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src), // 17 +SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3), // 18 +SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4), // 19 +SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel), // 20 +SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel), // 21 +SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc), // 22 +SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp), // 23 +SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter), // 24 +SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel), // 25 +}; + +static const struct snd_kcontrol_new wm8753_snd_controls[] = { +SOC_DOUBLE_R("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0), + +SOC_DOUBLE_R("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 63, 0), +SOC_DOUBLE_R("ADC Capture Switch", WM8753_LADC, WM8753_RADC, 7, 1, 0), +SOC_DOUBLE_R("ADC Capture ZC Switch", WM8753_LADC, WM8753_RADC, 6, 1, 0), + +SOC_DOUBLE_R("Out1 Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V, 0, 127, 0), +SOC_DOUBLE_R("Out2 Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0, 127, 0), + +SOC_SINGLE("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0), + +SOC_DOUBLE_R("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7, 1), +SOC_DOUBLE_R("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4, 7, 1), +SOC_DOUBLE_R("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7, 1), + +SOC_DOUBLE_R("Out1 Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7, 1, 0), +SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7, 1, 0), + +SOC_SINGLE("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1), +SOC_SINGLE("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1), +SOC_SINGLE("Mono Voice Playback Volume", WM8753_MOUTM2, 4, 7, 1), +SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0), + +SOC_ENUM("Bass Boost", wm8753_enum[0]), +SOC_ENUM("Bass Filter", wm8753_enum[1]), +SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 7, 1), + +SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 7, 0), +SOC_ENUM("Treble Cut-off", wm8753_enum[2]), + +SOC_DOUBLE("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1), +SOC_SINGLE("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1), + +SOC_DOUBLE_R("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0), +SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0), +SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 0), + +SOC_ENUM("Capture Filter Select", wm8753_enum[23]), +SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]), +SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1), + +SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0), +SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0), +SOC_ENUM("ALC Capture Function", wm8753_enum[3]), +SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0), +SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1), +SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1), +SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0), +SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0), +SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]), +SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0), + +SOC_ENUM("3D Function", wm8753_enum[5]), +SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]), +SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]), +SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0), +SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0), + +SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0), +SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0), + +SOC_ENUM("De-emphasis", wm8753_enum[8]), +SOC_ENUM("Playback Mono Mix", wm8753_enum[9]), +SOC_ENUM("Playback Phase", wm8753_enum[10]), + +SOC_SINGLE("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0), +SOC_SINGLE("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0), +}; + +/* add non dapm controls */ +static int wm8753_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8753_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8753_snd_controls[i],codec, NULL))) < 0) + return err; + } + return 0; +} + +/* + * _DAPM_ Controls + */ + +/* Left Mixer */ +static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = { +SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0), +SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0), +}; + +/* Right mixer */ +static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = { +SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0), +SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0), +}; + +/* Mono mixer */ +static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = { +SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 4, 1, 0), +SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0), +SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0), +}; + +/* Mono 2 Mux */ +static const struct snd_kcontrol_new wm8753_mono2_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[17]); + +/* Out 3 Mux */ +static const struct snd_kcontrol_new wm8753_out3_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[18]); + +/* Out 4 Mux */ +static const struct snd_kcontrol_new wm8753_out4_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[19]); + +/* ADC Mono Mix */ +static const struct snd_kcontrol_new wm8753_adc_mono_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[22]); + +/* Record mixer */ +static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = { +SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0), +SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0), +SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0), +}; + +/* Left ADC mux */ +static const struct snd_kcontrol_new wm8753_adc_left_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[21]); + +/* Right ADC mux */ +static const struct snd_kcontrol_new wm8753_adc_right_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[20]); + +/* MIC mux */ +static const struct snd_kcontrol_new wm8753_mic_mux_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[16]); + +/* ALC mixer */ +static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = { +SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0), +SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0), +SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0), +SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0), +}; + +/* Left Line mux */ +static const struct snd_kcontrol_new wm8753_line_left_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[14]); + +/* Right Line mux */ +static const struct snd_kcontrol_new wm8753_line_right_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[13]); + +/* Mono Line mux */ +static const struct snd_kcontrol_new wm8753_line_mono_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[12]); + +/* Line mux and mixer */ +static const struct snd_kcontrol_new wm8753_line_mux_mix_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[11]); + +/* Rx mux and mixer */ +static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[15]); + +/* Mic Selector Mux */ +static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls = +SOC_DAPM_ENUM("Route", wm8753_enum[25]); + +static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = { +SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0), +SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0, &wm8753_left_mixer_controls[0], + ARRAY_SIZE(wm8753_left_mixer_controls)), +SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0), +SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0), +SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0), +SND_SOC_DAPM_OUTPUT("LOUT1"), +SND_SOC_DAPM_OUTPUT("LOUT2"), +SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0, &wm8753_right_mixer_controls[0], + ARRAY_SIZE(wm8753_right_mixer_controls)), +SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0), +SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0), +SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0), +SND_SOC_DAPM_OUTPUT("ROUT1"), +SND_SOC_DAPM_OUTPUT("ROUT2"), +SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0, &wm8753_mono_mixer_controls[0], + ARRAY_SIZE(wm8753_mono_mixer_controls)), +SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0), +SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0), +SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0), +SND_SOC_DAPM_OUTPUT("MONO1"), +SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls), +SND_SOC_DAPM_OUTPUT("MONO2"), +SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0), +SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls), +SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0), +SND_SOC_DAPM_OUTPUT("OUT3"), +SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls), +SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0), +SND_SOC_DAPM_OUTPUT("OUT4"), +SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0, &wm8753_record_mixer_controls[0], + ARRAY_SIZE(wm8753_record_mixer_controls)), +SND_SOC_DAPM_ADC("Left ADC", "Left Voice Capture", WM8753_PWR2, 3, 0), +SND_SOC_DAPM_ADC("Right ADC", "Right Voice Capture", WM8753_PWR2, 2, 0), +SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0, + &wm8753_adc_mono_controls), +SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0, + &wm8753_adc_mono_controls), +SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0, + &wm8753_adc_left_controls), +SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0, + &wm8753_adc_right_controls), +SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0, + &wm8753_mic_mux_controls), +SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0), +SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0), +SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0, &wm8753_alc_mixer_controls[0], + ARRAY_SIZE(wm8753_alc_mixer_controls)), +SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0, + &wm8753_line_left_controls), +SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0, + &wm8753_line_right_controls), +SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0, + &wm8753_line_mono_controls), +SND_SOC_DAPM_MUX("Line Mixer", SND_SOC_NOPM, 0, 0, + &wm8753_line_mux_mix_controls), +SND_SOC_DAPM_MUX("Rx Mixer", SND_SOC_NOPM, 0, 0, + &wm8753_rx_mux_mix_controls), +SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0), +SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0), +SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0, + &wm8753_mic_sel_mux_controls), +SND_SOC_DAPM_INPUT("LINE1"), +SND_SOC_DAPM_INPUT("LINE2"), +SND_SOC_DAPM_INPUT("RXP"), +SND_SOC_DAPM_INPUT("RXN"), +SND_SOC_DAPM_INPUT("ACIN"), +SND_SOC_DAPM_INPUT("ACOP"), +SND_SOC_DAPM_INPUT("MIC1N"), +SND_SOC_DAPM_INPUT("MIC1"), +SND_SOC_DAPM_INPUT("MIC2N"), +SND_SOC_DAPM_INPUT("MIC2"), +}; + +static const char* audio_map[][3] = { + /* left mixer */ + {"Left Mixer", "Left Playback Switch", "Left DAC"}, + {"Left Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, + {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"}, + + /* right mixer */ + {"Right Mixer", "Right Playback Switch", "Right DAC"}, + {"Right Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, + {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"}, + + /* mono mixer */ + {"Mono Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Mono Mixer", "Left Playback Switch", "Left DAC"}, + {"Mono Mixer", "Right Playback Switch", "Right DAC"}, + {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"}, + {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"}, + + /* left out */ + {"Left Out 1", NULL, "Left Mixer"}, + {"Left Out 2", NULL, "Left Mixer"}, + {"LOUT1", NULL, "Left Out 1"}, + {"LOUT2", NULL, "Left Out 2"}, + + /* right out */ + {"Right Out 1", NULL, "Right Mixer"}, + {"Right Out 2", NULL, "Right Mixer"}, + {"ROUT1", NULL, "Right Out 1"}, + {"ROUT2", NULL, "Right Out 2"}, + + /* mono 1 out */ + {"Mono Out 1", NULL, "Mono Mixer"}, + {"MONO1", NULL, "Mono Out 1"}, + + /* mono 2 out */ + {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"}, + {"Mono 2 Mux", "Inverted Mono 1", "MONO1"}, + {"Mono 2 Mux", "Left", "Left Mixer"}, + {"Mono 2 Mux", "Right", "Right Mixer"}, + {"Mono Out 2", NULL, "Mono 2 Mux"}, + {"MONO2", NULL, "Mono Out 2"}, + + /* out 3 */ + {"Out3 Left + Right", NULL, "Left Mixer"}, + {"Out3 Left + Right", NULL, "Right Mixer"}, + {"Out3 Mux", "VREF", "VREF"}, + {"Out3 Mux", "Left + Right", "Out3 Left + Right"}, + {"Out3 Mux", "ROUT2", "ROUT2"}, + {"Out 3", NULL, "Out3 Mux"}, + {"OUT3", NULL, "Out 3"}, + + /* out 4 */ + {"Out4 Mux", "VREF", "VREF"}, + {"Out4 Mux", "Capture ST", "Capture ST Mixer"}, + {"Out4 Mux", "LOUT2", "LOUT2"}, + {"Out 4", NULL, "Out4 Mux"}, + {"OUT4", NULL, "Out 4"}, + + /* record mixer */ + {"Playback Mixer", "Left Capture Switch", "Left Mixer"}, + {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"}, + {"Playback Mixer", "Right Capture Switch", "Right Mixer"}, + + /* Mic/SideTone Mux */ + {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"}, + {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"}, + {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"}, + {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"}, + + /* Capture Left Mux */ + {"Capture Left Mux", "PGA", "Left Capture Volume"}, + {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"}, + {"Capture Left Mux", "Line", "LINE1"}, + + /* Capture Right Mux */ + {"Capture Right Mux", "PGA", "Right Capture Volume"}, + {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"}, + {"Capture Right Mux", "Sidetone", "Capture ST Mixer"}, + + /* Mono Capture mixer-mux */ + {"Capture Right Mixer", "Stereo", "Capture Right Mux"}, + {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"}, + {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"}, + {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"}, + {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"}, + {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"}, + {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"}, + {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"}, + {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"}, + + /* ADC */ + {"Left ADC", NULL, "Capture Left Mixer"}, + {"Right ADC", NULL, "Capture Right Mixer"}, + + /* Left Capture Volume */ + {"Left Capture Volume", NULL, "ACIN"}, + + /* Right Capture Volume */ + {"Right Capture Volume", NULL, "Mic 2 Volume"}, + + /* ALC Mixer */ + {"ALC Mixer", "Line Capture Switch", "Line Mixer"}, + {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"}, + {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"}, + {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"}, + + /* Line Left Mux */ + {"Line Left Mux", "Line 1", "LINE1"}, + {"Line Left Mux", "Rx Mix", "Rx Mixer"}, + + /* Line Right Mux */ + {"Line Right Mux", "Line 2", "LINE2"}, + {"Line Right Mux", "Rx Mix", "Rx Mixer"}, + + /* Line Mono Mux */ + {"Line Mono Mux", "Line Mix", "Line Mixer"}, + {"Line Mono Mux", "Rx Mix", "Rx Mixer"}, + + /* Line Mixer/Mux */ + {"Line Mixer", "Line 1 + 2", "LINE1"}, + {"Line Mixer", "Line 1 - 2", "LINE1"}, + {"Line Mixer", "Line 1 + 2", "LINE2"}, + {"Line Mixer", "Line 1 - 2", "LINE2"}, + {"Line Mixer", "Line 1", "LINE1"}, + {"Line Mixer", "Line 2", "LINE2"}, + + /* Rx Mixer/Mux */ + {"Rx Mixer", "RXP - RXN", "RXP"}, + {"Rx Mixer", "RXP + RXN", "RXP"}, + {"Rx Mixer", "RXP - RXN", "RXN"}, + {"Rx Mixer", "RXP + RXN", "RXN"}, + {"Rx Mixer", "RXP", "RXP"}, + {"Rx Mixer", "RXN", "RXN"}, + + /* Mic 1 Volume */ + {"Mic 1 Volume", NULL, "MIC1N"}, + {"Mic 1 Volume", NULL, "Mic Selection Mux"}, + + /* Mic 2 Volume */ + {"Mic 2 Volume", NULL, "MIC2N"}, + {"Mic 2 Volume", NULL, "MIC2"}, + + /* Mic Selector Mux */ + {"Mic Selection Mux", "Mic 1", "MIC1"}, + {"Mic Selection Mux", "Mic 2", "MIC2N"}, + {"Mic Selection Mux", "Mic 3", "MIC2"}, + + /* ACOP */ + {"ACOP", NULL, "ALC Mixer"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +static int wm8753_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm8753_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8753_dapm_widgets[i]); + } + + /* set up the WM8753 audio map */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +/* PLL divisors */ +struct _pll_div { + u32 pll_in; /* ext clock input */ + u32 pll_out; /* pll out freq */ + u32 div2:1; + u32 n:4; + u32 k:24; +}; + +/* + * PLL divisors - + */ +static const struct _pll_div pll_div[] = { + {13000000, 12288000, 0, 0x7, 0x23F54A}, + {13000000, 11289600, 0, 0x6, 0x3CA2F5}, + {12000000, 12288000, 0, 0x8, 0x0C49BA}, + {12000000, 11289600, 0, 0x7, 0x21B08A}, + {24000000, 12288000, 1, 0x8, 0x0C49BA}, + {24000000, 11289600, 1, 0x7, 0x21B08A}, + {12288000, 11289600, 0, 0x7, 0x166667}, + {26000000, 11289600, 1, 0x6, 0x3CA2F5}, + {26000000, 12288000, 1, 0x7, 0x23F54A}, +}; + +static u32 wm8753_config_pll(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int pll) +{ + u16 reg; + int found = 0; + + if (pll == 1) { + reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef; + if (!dai->pll_in || !dai->mclk) { + /* disable PLL1 */ + wm8753_write(codec, WM8753_PLL1CTL1, 0x0026); + wm8753_write(codec, WM8753_CLOCK, reg); + return 0; + } else { + u16 value = 0; + int i = 0; + + /* if we cant match, then use good values for N and K */ + for (;i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].pll_out == dai->pll_out && + pll_div[i].pll_in == dai->pll_in) { + found = 1; + break; + } + } + + if(!found) + goto err; + + /* set up N and K PLL divisor ratios */ + /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ + value = (pll_div[i].n << 5) + ((pll_div[i].k & 0x3c0000) >> 18); + wm8753_write(codec, WM8753_PLL1CTL2, value); + + /* bits 8:0 = PLL_K[17:9] */ + value = (pll_div[i].k & 0x03fe00) >> 9; + wm8753_write(codec, WM8753_PLL1CTL3, value); + + /* bits 8:0 = PLL_K[8:0] */ + value = pll_div[i].k & 0x0001ff; + wm8753_write(codec, WM8753_PLL1CTL4, value); + + /* set PLL1 as input and enable */ + wm8753_write(codec, WM8753_PLL1CTL1, 0x0027 | + (pll_div[i].div2 << 3)); + wm8753_write(codec, WM8753_CLOCK, reg | 0x0010); + } + } else { + reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7; + if (!dai->pll_in || !dai->mclk) { + /* disable PLL2 */ + wm8753_write(codec, WM8753_PLL2CTL1, 0x0026); + wm8753_write(codec, WM8753_CLOCK, reg); + return 0; + } else { + u16 value = 0; + int i = 0; + + /* if we cant match, then use good values for N and K */ + for (;i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].pll_out == dai->pll_out && + pll_div[i].pll_in == dai->pll_in) { + found = 1; + break; + } + } + + if(!found) + goto err; + + /* set up N and K PLL divisor ratios */ + /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */ + value = (pll_div[i].n << 5) + ((pll_div[i].k & 0x3c0000) >> 18); + wm8753_write(codec, WM8753_PLL2CTL2, value); + + /* bits 8:0 = PLL_K[17:9] */ + value = (pll_div[i].k & 0x03fe00) >> 9; + wm8753_write(codec, WM8753_PLL2CTL3, value); + + /* bits 8:0 = PLL_K[8:0] */ + value = pll_div[i].k & 0x0001ff; + wm8753_write(codec, WM8753_PLL2CTL4, value); + + /* set PLL1 as input and enable */ + wm8753_write(codec, WM8753_PLL2CTL1, 0x0027 | + (pll_div[i].div2 << 3)); + wm8753_write(codec, WM8753_CLOCK, reg | 0x0008); + } + } + + return dai->pll_in; +err: + return 0; +} + +struct _coeff_div { + u32 mclk; + u32 rate; + u16 fs; + u8 sr:5; + u8 usb:1; +}; + +/* codec hifi mclk (after PLL) clock divider coefficients */ +static const struct _coeff_div coeff_div[] = { + /* 8k */ + {12288000, 8000, 1536, 0x6, 0x0}, + {11289600, 8000, 1408, 0x16, 0x0}, + {18432000, 8000, 2304, 0x7, 0x0}, + {16934400, 8000, 2112, 0x17, 0x0}, + {12000000, 8000, 1500, 0x6, 0x1}, + + /* 11.025k */ + {11289600, 11025, 1024, 0x18, 0x0}, + {16934400, 11025, 1536, 0x19, 0x0}, + {12000000, 11025, 1088, 0x19, 0x1}, + + /* 16k */ + {12288000, 16000, 768, 0xa, 0x0}, + {18432000, 16000, 1152, 0xb, 0x0}, + {12000000, 16000, 750, 0xa, 0x1}, + + /* 22.05k */ + {11289600, 22050, 512, 0x1a, 0x0}, + {16934400, 22050, 768, 0x1b, 0x0}, + {12000000, 22050, 544, 0x1b, 0x1}, + + /* 32k */ + {12288000, 32000, 384, 0xc, 0x0}, + {18432000, 32000, 576, 0xd, 0x0}, + {12000000, 32000, 375, 0xa, 0x1}, + + /* 44.1k */ + {11289600, 44100, 256, 0x10, 0x0}, + {16934400, 44100, 384, 0x11, 0x0}, + {12000000, 44100, 272, 0x11, 0x1}, + + /* 48k */ + {12288000, 48000, 256, 0x0, 0x0}, + {18432000, 48000, 384, 0x1, 0x0}, + {12000000, 48000, 250, 0x0, 0x1}, + + /* 88.2k */ + {11289600, 88200, 128, 0x1e, 0x0}, + {16934400, 88200, 192, 0x1f, 0x0}, + {12000000, 88200, 136, 0x1f, 0x1}, + + /* 96k */ + {12288000, 96000, 128, 0xe, 0x0}, + {18432000, 96000, 192, 0xf, 0x0}, + {12000000, 96000, 125, 0xe, 0x1}, +}; + +static int get_coeff(int mclk, int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { + if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) + return i; + } + return -EINVAL; +} + +/* supported HiFi input clocks (that don't use PLL) */ +const static int hifi_clks[] = {11289600, 12000000, 12288000, 16934400, 18432000}; + +/* The HiFi interface can be clocked in one of two ways:- + * o No PLL - MCLK is used directly. + * o PLL - PLL is used to generate audio MCLK from input clock. + * + * We use the direct method if we can as it saves power. + */ +static unsigned int wm8753_config_i2s_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + int i, pll_out; + + /* is clk supported without the PLL */ + for(i = 0; i < ARRAY_SIZE(hifi_clks); i++) { + if(clk == hifi_clks[i]) { + dai->mclk = clk; + dai->pll_in = dai->pll_out = 0; + dai->clk_div = 1; + return clk; + } + } + + /* determine best PLL output speed */ + if (info->bclk_master & + (SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS)) { + pll_out = info->fs * info->rate; + } else { + /* calc slave clock */ + switch(info->rate){ + case 11025: + case 22050: + case 44100: + case 88200: + pll_out = 11289600; + break; + default: + pll_out = 12288000; + break; + } + } + + /* are input & output clocks supported by PLL */ + for (i = 0;i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].pll_in == clk && pll_div[i].pll_out == pll_out) { + dai->pll_in = clk; + dai->pll_out = dai->mclk = pll_out; + return pll_out; + } + } + + /* this clk is not supported */ + return 0; +} + +/* valid PCM clock dividers * 2 */ +static int pcm_divs[] = {2, 6, 11, 4, 8, 12, 16}; + +/* The Voice interface can be clocked in one of four ways:- + * o No PLL - MCLK is used directly. + * o Div - MCLK is directly divided. + * o PLL - PLL is used to generate audio MCLK from input clock. + * o PLL & Div - PLL and post divider are used. + * + * We use the non PLL methods if we can, as it saves power. + */ + +static unsigned int wm8753_config_pcm_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + int i, j, best_clk = info->fs * info->rate; + + /* can we run at this clk without the PLL ? */ + for (i = 0; i < ARRAY_SIZE(pcm_divs); i++) { + if ((best_clk >> 1) * pcm_divs[i] == clk) { + dai->pll_in = 0; + dai->clk_div = pcm_divs[i]; + dai->mclk = best_clk; + return dai->mclk; + } + } + + /* now check for PLL support */ + for (i = 0; i < ARRAY_SIZE(pll_div); i++) { + if (pll_div[i].pll_in == clk) { + for (j = 0; j < ARRAY_SIZE(pcm_divs); j++) { + if (pll_div[i].pll_out == pcm_divs[j] * (best_clk >> 1)) { + dai->pll_in = clk; + dai->pll_out = pll_div[i].pll_out; + dai->clk_div = pcm_divs[j]; + dai->mclk = best_clk; + return dai->mclk; + } + } + } + } + + /* this clk is not supported */ + return 0; +} + +/* set the format and bit size for ADC and Voice DAC */ +static void wm8753_adc_vdac_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01e0; + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + voice |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + voice |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + voice |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + voice |= 0x0013; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + voice |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + voice |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + voice |= 0x000c; + break; + } + + wm8753_write(codec, WM8753_PCM, voice); +} + +/* configure PCM DAI */ +static int wm8753_pcm_dai_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 voice, ioctl, srate, srate2, fs, bfs, clock; + unsigned int rate; + + bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs); + fs = rtd->codec_dai->dai_runtime.fs; + rate = snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate); + voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x001f; + + /* set master/slave audio interface */ + ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x01f1; + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ioctl |= 0x0002; + case SND_SOC_DAIFMT_CBM_CFS: + voice |= 0x0040; + break; + } + + /* do we need to enable the PLL */ + if(rtd->codec_dai->pll_in) { + if(wm8753_config_pll(codec, rtd->codec_dai, 2) != rtd->codec_dai->pll_in) { + err("could not set pll to %d --> %d", + rtd->codec_dai->pll_in, rtd->codec_dai->pll_out); + return -ENODEV; + } + } + + /* set up PCM divider */ + clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f; + switch(rtd->codec_dai->clk_div) { + case 2: /* 1 */ + break; + case 6: /* 3 */ + clock |= (0x2 << 6); + break; + case 11: /* 5.5 */ + clock |= (0x3 << 6); + break; + case 4: /* 2 */ + clock |= (0x4 << 6); + break; + case 8: /* 4 */ + clock |= (0x5 << 6); + break; + case 12: /* 6 */ + clock |= (0x6 << 6); + break; + case 16: /* 8 */ + clock |= (0x7 << 6); + break; + default: + printk(KERN_ERR "wm8753: invalid PCM clk divider %d\n", + rtd->codec_dai->clk_div); + break; + } + wm8753_write(codec, WM8753_CLOCK, clock); + + /* set bclk divisor rate */ + srate2 = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f; + switch (bfs) { + case 1: + break; + case 2: + srate2 |= (0x1 << 6); + break; + case 4: + srate2 |= (0x2 << 6); + break; + case 8: + srate2 |= (0x3 << 6); + break; + case 16: + srate2 |= (0x4 << 6); + break; + } + wm8753_write(codec, WM8753_SRATE2, srate2); + + srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f; + if(rtd->codec_dai->dai_runtime.fs == 384) + srate |= 0x80; + wm8753_write(codec, WM8753_SRATE1, srate); + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + voice |= 0x0090; + break; + case SND_SOC_DAIFMT_IB_NF: + voice |= 0x0080; + break; + case SND_SOC_DAIFMT_NB_IF: + voice |= 0x0010; + break; + } +//printk("voice %x %x ioctl %x %x srate2 %x %x srate1 %x %x\n", +// WM8753_PCM, voice, WM8753_IOCTL, ioctl, WM8753_SRATE2, srate2, WM8753_SRATE1, srate); + wm8753_write(codec, WM8753_IOCTL, ioctl); + wm8753_write(codec, WM8753_PCM, voice); + return 0; +} + +/* configure hifi DAC wordlength and format */ +static void wm8753_hdac_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0; + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + hifi |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + hifi |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + hifi |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + hifi |= 0x0013; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + hifi |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + hifi |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + hifi |= 0x000c; + break; + } + + wm8753_write(codec, WM8753_HIFI, hifi); +} + +/* configure i2s (hifi) DAI clocking */ +static int wm8753_i2s_dai_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 srate, bfs, hifi, ioctl; + unsigned int rate; + int i = 0; + + bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs); + rate = snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate); + hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x001f; + + /* is coefficient valid ? */ + if((i = get_coeff(rtd->codec_dai->mclk, rate)) < 0) + return i; + + srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0; + wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[i].sr << 1) | coeff_div[i].usb); + + /* do we need to enable the PLL */ + if(rtd->codec_dai->pll_in) { + if(wm8753_config_pll(codec, rtd->codec_dai, 1) != rtd->codec_dai->pll_in) { + err("could not set pll to %d --> %d", + rtd->codec_dai->pll_in, rtd->codec_dai->pll_out); + return -ENODEV; + } + } + + /* set bclk divisor rate */ + srate = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7; + switch (bfs) { + case 1: + break; + case 2: + srate |= (0x1 << 3); + break; + case 4: + srate |= (0x2 << 3); + break; + case 8: + srate |= (0x3 << 3); + break; + case 16: + srate |= (0x4 << 3); + break; + } + wm8753_write(codec, WM8753_SRATE2, srate); + + /* set master/slave audio interface */ + ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00f2; + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + ioctl |= 0x0001; + case SND_SOC_DAIFMT_CBM_CFS: + hifi |= 0x0040; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + hifi |= 0x0090; + break; + case SND_SOC_DAIFMT_IB_NF: + hifi |= 0x0080; + break; + case SND_SOC_DAIFMT_NB_IF: + hifi |= 0x0010; + break; + } + wm8753_write(codec, WM8753_IOCTL, ioctl | 0x0008); + wm8753_write(codec, WM8753_HIFI, hifi); + return 0; +} + +static int wm8753_mode1v_prepare (struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 mode, clock; + + /* set clk source as pcmclk */ + clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; + wm8753_write(codec, WM8753_CLOCK, clock); + mode = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00f3; + wm8753_write(codec, WM8753_IOCTL, mode); + wm8753_adc_vdac_prepare(substream); + return wm8753_pcm_dai_prepare(substream); +} + +static int wm8753_mode1h_prepare (struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 mode; + + mode = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00f3; + wm8753_write(codec, WM8753_IOCTL, mode); + wm8753_hdac_prepare(substream); + return wm8753_i2s_dai_prepare(substream); +} + +static int wm8753_mode2_prepare (struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 mode, clock; + + /* set clk source as pcmclk */ + clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; + wm8753_write(codec, WM8753_CLOCK, clock); + + mode = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00f3; + wm8753_write(codec, WM8753_IOCTL, mode | (0x1 << 2)); + + wm8753_adc_vdac_prepare(substream); + return wm8753_i2s_dai_prepare(substream); +} + +static int wm8753_mode3_prepare (struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 mode, clock; + + /* set clk source as mclk */ + clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; + wm8753_write(codec, WM8753_CLOCK, clock | 0x4); + + mode = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00f3; + wm8753_write(codec, WM8753_IOCTL, mode | (0x2 << 2)); + + wm8753_hdac_prepare(substream); + wm8753_adc_vdac_prepare(substream); + return wm8753_i2s_dai_prepare(substream); +} + +static int wm8753_mode4_prepare (struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 mode, clock; + + /* set clk source as mclk */ + clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb; + wm8753_write(codec, WM8753_CLOCK, clock | 0x4); + + mode = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00f3; + wm8753_write(codec, WM8753_IOCTL, mode | (0x3 << 2)); + + wm8753_hdac_prepare(substream); + wm8753_adc_vdac_prepare(substream); + return wm8753_i2s_dai_prepare(substream); +} + +static int wm8753_mode_startup (struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + int i; + + /* most of the DAI modes are mutually exclusive */ + if (codec->active) { + + /* find active dai and check whether it matches current id */ + for(i = 0; i < ARRAY_SIZE(wm8753_dai); i++) { + if(wm8753_dai[i].active && + rtd->codec_dai->id != wm8753_dai[i].id) { + return -EBUSY; + } + } + } + + return 0; +} + +static int wm8753_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7; + + /* the digital mute covers the HiFi and Voice DAC's on the WM8753. + * make sure we check if they are not both active when we mute */ + if(mute && dai->id == 1) { + if(!wm8753_dai[WM8753_DAI_MODE1_VOICE].playback.active || + !wm8753_dai[WM8753_DAI_MODE1_HIFI].playback.active) + wm8753_write(codec, WM8753_DAC, mute_reg | 0x8); + } else { + if (mute) + wm8753_write(codec, WM8753_DAC, mute_reg | 0x8); + else + wm8753_write(codec, WM8753_DAC, mute_reg); + } + + return 0; +} + +static int wm8753_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* set vmid to 50k and unmute dac */ + wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + /* set vmid to 5k for quick power up */ + wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1); + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* mute dac and set vmid to 500k, enable VREF */ + wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + wm8753_write(codec, WM8753_PWR1, 0x0001); + break; + } + codec->dapm_state = event; + return 0; +} + +/* + * The WM8753 supports upto 4 different and mutually exclusive DAI + * configurations. This gives 5 PCM's available for use. + * + * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI + * 2. Voice over HIFI DAI - HIFI disabled + * 3. Voice disabled - HIFI over HIFI + * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture + */ +struct snd_soc_codec_dai wm8753_dai[] = { +/* DAI mode 1 */ +{ .name = "WM8753 Voice (1)", + .id = 1, + .playback = { + .stream_name = "Voice Playback", + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .stream_name = "Voice Capture", + .channels_min = 1, + .channels_max = 2,}, + .config_sysclk = wm8753_config_pcm_sysclk, + .digital_mute = wm8753_mute, + .ops = { + .prepare = wm8753_mode1v_prepare, + .startup = wm8753_mode_startup,}, + .caps = { + .num_modes = ARRAY_SIZE(wm8753_voice_modes), + .mode = wm8753_voice_modes,}, +}, +{ .name = "WM8753 HiFi (1)", + .id = 1, + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2,}, + .config_sysclk = wm8753_config_i2s_sysclk, + .digital_mute = wm8753_mute, + .ops = { + .prepare = wm8753_mode1h_prepare, + .startup = wm8753_mode_startup,}, + .caps = { + .num_modes = ARRAY_SIZE(wm8753_hifi_modes), + .mode = wm8753_hifi_modes,}, +}, +/* DAI mode 2 */ +{ .name = "WM8753 Voice (2)", + .id = 2, + .playback = { + .stream_name = "Voice Playback", + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .stream_name = "Voice Capture", + .channels_min = 1, + .channels_max = 2,}, + .config_sysclk = wm8753_config_i2s_sysclk, + .digital_mute = wm8753_mute, + .ops = { + .prepare = wm8753_mode2_prepare, + .startup = wm8753_mode_startup,}, + .caps = { + .num_modes = ARRAY_SIZE(wm8753_voice_modes), + .mode = wm8753_voice_modes,}, +}, +/* DAI mode 3 */ +{ .name = "WM8753 HiFi (3)", + .id = 3, + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2,}, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2,}, + .config_sysclk = wm8753_config_i2s_sysclk, + .digital_mute = wm8753_mute, + .ops = { + .prepare = wm8753_mode3_prepare, + .startup = wm8753_mode_startup,}, + .caps = { + .num_modes = ARRAY_SIZE(wm8753_hifi_modes), + .mode = wm8753_hifi_modes,}, +}, +/* DAI mode 4 */ +{ .name = "WM8753 HiFi (4)", + .id = 4, + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2,}, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2,}, + .config_sysclk = wm8753_config_i2s_sysclk, + .digital_mute = wm8753_mute, + .ops = { + .prepare = wm8753_mode4_prepare, + .startup = wm8753_mode_startup,}, + .caps = { + .num_modes = ARRAY_SIZE(wm8753_mixed_modes), + .mode = wm8753_mixed_modes,}, +}, +}; +EXPORT_SYMBOL_GPL(wm8753_dai); + +static void wm8753_work(void *data) +{ + struct snd_soc_codec *codec = (struct snd_soc_codec *)data; + wm8753_dapm_event(codec, codec->dapm_state); +} + +static int wm8753_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm8753_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm8753_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) { + if (i + 1 == WM8753_RESET) + continue; + data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + + wm8753_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* charge wm8753 caps */ + if(codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) { + wm8753_dapm_event(codec, SNDRV_CTL_POWER_D2); + codec->dapm_state = SNDRV_CTL_POWER_D0; + queue_delayed_work(wm8753_workq, &wm8753_dapm_work, + msecs_to_jiffies(caps_charge)); + } + + return 0; +} + +/* + * initialise the WM8753 driver + * register the mixer and dsp interfaces with the kernel + */ +static int wm8753_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int reg, ret = 0; + + codec->name = "WM8753"; + codec->owner = THIS_MODULE; + codec->read = wm8753_read_reg_cache; + codec->write = wm8753_write; + codec->dapm_event = wm8753_dapm_event; + codec->dai = wm8753_dai; + codec->num_dai = ARRAY_SIZE(wm8753_dai); + codec->reg_cache_size = ARRAY_SIZE(wm8753_reg); + + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm8753_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, wm8753_reg, sizeof(u16) * ARRAY_SIZE(wm8753_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8753_reg); + + wm8753_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* charge output caps */ + wm8753_dapm_event(codec, SNDRV_CTL_POWER_D2); + codec->dapm_state = SNDRV_CTL_POWER_D3hot; + queue_delayed_work(wm8753_workq, + &wm8753_dapm_work, msecs_to_jiffies(caps_charge)); + + /* set the update bits */ + reg = wm8753_read_reg_cache(codec, WM8753_LDAC); + wm8753_write(codec, WM8753_LDAC, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_RDAC); + wm8753_write(codec, WM8753_RDAC, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V); + wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V); + wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V); + wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V); + wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_LINVOL); + wm8753_write(codec, WM8753_LINVOL, reg | 0x0100); + reg = wm8753_read_reg_cache(codec, WM8753_RINVOL); + wm8753_write(codec, WM8753_RINVOL, reg | 0x0100); + + wm8753_add_controls(codec); + wm8753_add_widgets(codec); + if((ret = snd_soc_register_card(socdev)) < 0) { + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + } + + return ret; +} + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ +static struct snd_soc_device *wm8753_socdev; + +#ifdef CONFIG_I2C + +/* + * WM8753 2 wire address is determined by GPIO5 + * state during powerup. + * low = 0x1a + * high = 0x1b + */ +#define I2C_DRIVERID_WM8753 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver wm8753_i2c_driver; +static struct i2c_client client_template; + +static int wm8753_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = wm8753_socdev; + struct wm8753_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + i2c_set_clientdata(i2c, codec); + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + err("failed to attach codec at addr %x\n", addr); + goto err; + } + + if((ret = wm8753_init(socdev)) < 0) { + err("failed to initialise WM8753\n"); + goto err; + } + + return ret; + +err: + kfree(codec); + kfree(i2c); + return ret; +} + +static int wm8753_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec *codec = i2c_get_clientdata(client); + i2c_detach_client(client); + kfree(codec->reg_cache); + kfree(client); + return 0; +} + +static int wm8753_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, wm8753_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver wm8753_i2c_driver = { + .driver = { + .name = "WM8753 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_WM8753, + .attach_adapter = wm8753_i2c_attach, + .detach_client = wm8753_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "WM8753", + .driver = &wm8753_i2c_driver, +}; +#endif + +static int wm8753_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct wm8753_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec; + int ret = 0; + + info("WM8753 Audio Codec %s", WM8753_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + wm8753_socdev = socdev; + INIT_WORK(&wm8753_dapm_work, wm8753_work, codec); + if((wm8753_workq = create_workqueue("wm8753")) == NULL) { + kfree(codec); + return -ENOMEM; + } +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&wm8753_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + return ret; +} + +/* power down chip */ +static int wm8753_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if (codec->control_data) + wm8753_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + if(wm8753_workq) + destroy_workqueue(wm8753_workq); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&wm8753_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm8753 = { + .probe = wm8753_probe, + .remove = wm8753_remove, + .suspend = wm8753_suspend, + .resume = wm8753_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm8753); + +MODULE_DESCRIPTION("Soc WM8753 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm8753.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8753.h @@ -0,0 +1,99 @@ +/* + * wm8753.h -- audio driver for WM8753 + * + * Copyright 2003 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef _WM8753_H +#define _WM8753_H + +/* WM8753 register space */ + +#define WM8753_DAC 0x01 +#define WM8753_ADC 0x02 +#define WM8753_PCM 0x03 +#define WM8753_HIFI 0x04 +#define WM8753_IOCTL 0x05 +#define WM8753_SRATE1 0x06 +#define WM8753_SRATE2 0x07 +#define WM8753_LDAC 0x08 +#define WM8753_RDAC 0x09 +#define WM8753_BASS 0x0a +#define WM8753_TREBLE 0x0b +#define WM8753_ALC1 0x0c +#define WM8753_ALC2 0x0d +#define WM8753_ALC3 0x0e +#define WM8753_NGATE 0x0f +#define WM8753_LADC 0x10 +#define WM8753_RADC 0x11 +#define WM8753_ADCTL1 0x12 +#define WM8753_3D 0x13 +#define WM8753_PWR1 0x14 +#define WM8753_PWR2 0x15 +#define WM8753_PWR3 0x16 +#define WM8753_PWR4 0x17 +#define WM8753_ID 0x18 +#define WM8753_INTPOL 0x19 +#define WM8753_INTEN 0x1a +#define WM8753_GPIO1 0x1b +#define WM8753_GPIO2 0x1c +#define WM8753_RESET 0x1f +#define WM8753_RECMIX1 0x20 +#define WM8753_RECMIX2 0x21 +#define WM8753_LOUTM1 0x22 +#define WM8753_LOUTM2 0x23 +#define WM8753_ROUTM1 0x24 +#define WM8753_ROUTM2 0x25 +#define WM8753_MOUTM1 0x26 +#define WM8753_MOUTM2 0x27 +#define WM8753_LOUT1V 0x28 +#define WM8753_ROUT1V 0x29 +#define WM8753_LOUT2V 0x2a +#define WM8753_ROUT2V 0x2b +#define WM8753_MOUTV 0x2c +#define WM8753_OUTCTL 0x2d +#define WM8753_ADCIN 0x2e +#define WM8753_INCTL1 0x2f +#define WM8753_INCTL2 0x30 +#define WM8753_LINVOL 0x31 +#define WM8753_RINVOL 0x32 +#define WM8753_MICBIAS 0x33 +#define WM8753_CLOCK 0x34 +#define WM8753_PLL1CTL1 0x35 +#define WM8753_PLL1CTL2 0x36 +#define WM8753_PLL1CTL3 0x37 +#define WM8753_PLL1CTL4 0x38 +#define WM8753_PLL2CTL1 0x39 +#define WM8753_PLL2CTL2 0x3a +#define WM8753_PLL2CTL3 0x3b +#define WM8753_PLL2CTL4 0x3c +#define WM8753_BIASCTL 0x3d +#define WM8753_ADCTL2 0x3f + +struct wm8753_setup_data { + unsigned short i2c_address; +}; + +/* DAI ifmodes */ +/* mode 1 IFMODE = 00 */ +#define WM8753_DAI_MODE1_VOICE 0 +#define WM8753_DAI_MODE1_HIFI 1 +/* mode 2 IFMODE = 01 */ +#define WM8753_DAI_MODE2_VOICE 2 +/* mode 3 IFMODE = 10 */ +#define WM8753_DAI_MODE3_HIFI 3 +/* mode 4 IFMODE = 11 */ +#define WM8753_DAI_MODE4_HIFI 4 + +extern struct snd_soc_codec_dai wm8753_dai[5]; +extern struct snd_soc_codec_device soc_codec_dev_wm8753; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm8772.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8772.c @@ -0,0 +1,640 @@ +/* + * wm8772.c -- WM8772 ALSA Soc Audio driver + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "wm8772.h" + +#define AUDIO_NAME "WM8772" +#define WM8772_VERSION "0.3" + +/* + * wm8772 register cache + * We can't read the WM8772 register space when we + * are using 2 wire for device control, so we cache them instead. + */ +static const u16 wm8772_reg[] = { + 0x00ff, 0x00ff, 0x0120, 0x0000, /* 0 */ + 0x00ff, 0x00ff, 0x00ff, 0x00ff, /* 4 */ + 0x00ff, 0x0000, 0x0080, 0x0040, /* 8 */ + 0x0000 +}; + +#define WM8772_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_IB_NF) + +#define WM8772_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM8772_PRATES \ + (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000) + +#define WM8772_CRATES \ + (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000) + +static struct snd_soc_dai_mode wm8772_modes[] = { + /* common codec frame and clock master modes */ + /* 32k */ + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_32000, WM8772_DIR, + 0, 768, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_32000, WM8772_DIR, + 0, 512, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_32000, WM8772_DIR, + 0, 384, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_32000, WM8772_DIR, + 0, 256, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_32000, WM8772_DIR, + 0, 192, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_32000, WM8772_DIR, + 0, 128, SND_SOC_FSB(64)}, + + /* 44.1k */ + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, WM8772_DIR, + 0, 768, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, WM8772_DIR, + 0, 512, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, WM8772_DIR, + 0, 384, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, WM8772_DIR, + 0, 256, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, WM8772_DIR, + 0, 192, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_44100, WM8772_DIR, + 0, 128, SND_SOC_FSB(64)}, + + /* 48k */ + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, WM8772_DIR, + 0, 768, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, WM8772_DIR, + 0, 512, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, WM8772_DIR, + 0, 384, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, WM8772_DIR, + 0, 256, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, WM8772_DIR, + 0, 192, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_48000, WM8772_DIR, + 0, 128, SND_SOC_FSB(64)}, + + /* 96k */ + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_96000, WM8772_DIR, + 0, 384, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_96000, WM8772_DIR, + 0, 256, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_96000, WM8772_DIR, + 0, 192, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_96000, WM8772_DIR, + 0, 128, SND_SOC_FSB(64)}, + + /* 192k */ + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_192000, SND_SOC_DAIDIR_PLAYBACK, + 0, 192, SND_SOC_FSB(64)}, + {WM8772_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + SNDRV_PCM_FORMAT_S16_LE, SNDRV_PCM_RATE_192000, SND_SOC_DAIDIR_PLAYBACK, + 0, 128, SND_SOC_FSB(64)}, + + /* slave mode */ + {WM8772_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + WM8772_PRATES, SND_SOC_DAIDIR_PLAYBACK, 0, SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, + {WM8772_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + WM8772_CRATES, SND_SOC_DAIDIR_CAPTURE, 0, SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, +}; + +/* + * read wm8772 register cache + */ +static inline unsigned int wm8772_read_reg_cache(struct snd_soc_codec * codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg > WM8772_CACHE_REGNUM) + return -1; + return cache[reg]; +} + +/* + * write wm8772 register cache + */ +static inline void wm8772_write_reg_cache(struct snd_soc_codec * codec, + unsigned int reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg > WM8772_CACHE_REGNUM) + return; + cache[reg] = value; +} + +static int wm8772_write(struct snd_soc_codec * codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8772 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8772_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -1; +} + +#define wm8772_reset(c) wm8772_write(c, WM8772_RESET, 0) + +/* + * WM8772 Controls + */ +static const char* wm8772_zero_flag[] = {"All Ch", "Ch 1", "Ch 2", "Ch3"}; + +static const struct soc_enum wm8772_enum[] = { +SOC_ENUM_SINGLE(WM8772_DACCTRL, 0, 4, wm8772_zero_flag), +}; + +static const struct snd_kcontrol_new wm8772_snd_controls[] = { + +SOC_SINGLE("Left1 Playback Volume", WM8772_LDAC1VOL, 0, 255, 0), +SOC_SINGLE("Left2 Playback Volume", WM8772_LDAC2VOL, 0, 255, 0), +SOC_SINGLE("Left3 Playback Volume", WM8772_LDAC3VOL, 0, 255, 0), +SOC_SINGLE("Right1 Playback Volume", WM8772_RDAC1VOL, 0, 255, 0), +SOC_SINGLE("Right1 Playback Volume", WM8772_RDAC2VOL, 0, 255, 0), +SOC_SINGLE("Right1 Playback Volume", WM8772_RDAC3VOL, 0, 255, 0), +SOC_SINGLE("Master Playback Volume", WM8772_MDACVOL, 0, 255, 0), + +SOC_SINGLE("Playback Switch", WM8772_DACCH, 0, 1, 0), +SOC_SINGLE("Capture Switch", WM8772_ADCCTRL, 2, 1, 0), + +SOC_SINGLE("Demp1 Playback Switch", WM8772_DACCTRL, 6, 1, 0), +SOC_SINGLE("Demp2 Playback Switch", WM8772_DACCTRL, 7, 1, 0), +SOC_SINGLE("Demp3 Playback Switch", WM8772_DACCTRL, 8, 1, 0), + +SOC_SINGLE("Phase Invert 1 Switch", WM8772_IFACE, 6, 1, 0), +SOC_SINGLE("Phase Invert 2 Switch", WM8772_IFACE, 7, 1, 0), +SOC_SINGLE("Phase Invert 3 Switch", WM8772_IFACE, 8, 1, 0), + +SOC_SINGLE("Playback ZC Switch", WM8772_DACCTRL, 0, 1, 0), + +SOC_SINGLE("Capture High Pass Switch", WM8772_ADCCTRL, 3, 1, 0), +}; + +/* add non dapm controls */ +static int wm8772_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8772_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8772_snd_controls[i],codec, NULL))) < 0) + return err; + } + return 0; +} + +/* valid wm8772 mclk frequencies */ +static const int freq_table[5][6] = { + {4096000, 6144000, 8192000, 12288000, 16384000, 24576000}, + {5644800, 8467000, 11289600, 16934000, 22579200, 33868800}, + {6144000, 9216000, 12288000, 18432000, 24576000, 36864000}, + {12288000, 18432000, 24576000, 36864000, 0, 0}, + {24576000, 36864000, 0, 0, 0}, +}; + +static unsigned int check_freq(int rate, unsigned int freq) +{ + int i; + + for(i = 0; i < 6; i++) { + if(freq == freq_table[i][rate]) + return freq; + } + return 0; +} + +static unsigned int wm8772_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + switch(info->rate){ + case 32000: + dai->mclk = check_freq(0, clk); + break; + case 44100: + dai->mclk = check_freq(1, clk); + break; + case 48000: + dai->mclk = check_freq(2, clk); + break; + case 96000: + dai->mclk = check_freq(3, clk); + break; + case 192000: + dai->mclk = check_freq(4, clk); + break; + default: + dai->mclk = 0; + } + return dai->mclk; +} + +static int wm8772_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 diface = wm8772_read_reg_cache(codec, WM8772_IFACE) & 0xffc0; + u16 diface_ctrl = wm8772_read_reg_cache(codec, WM8772_DACRATE) & 0xfe1f; + u16 aiface = 0; + u16 aiface_ctrl = wm8772_read_reg_cache(codec, WM8772_ADCCTRL) & 0xfcff; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + + /* set master/slave audio interface */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + diface_ctrl |= 0x0010; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + } + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + diface |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + diface |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + diface |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + diface |= 0x0007; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + diface |= 0x0010; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + diface |= 0x0020; + break; + case SNDRV_PCM_FORMAT_S32_LE: + diface |= 0x0030; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + diface |= 0x0008; + break; + } + + /* set rate */ + switch(rtd->codec_dai->dai_runtime.fs) { + case 768: + diface_ctrl |= (0x5 << 6); + break; + case 512: + diface_ctrl |= (0x4 << 6); + break; + case 384: + diface_ctrl |= (0x3 << 6); + break; + case 256: + diface_ctrl |= (0x2 << 6); + break; + case 192: + diface_ctrl |= (0x1 << 6); + break; + } + + wm8772_write(codec, WM8772_DACRATE, diface_ctrl); + wm8772_write(codec, WM8772_IFACE, diface); + + } else { + + /* set master/slave audio interface */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + aiface |= 0x0010; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + } + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + aiface |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + aiface |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + aiface |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + aiface |= 0x0003; + aiface_ctrl |= 0x0010; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + aiface |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + aiface |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + aiface |= 0x000c; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_NF: + aiface_ctrl |= 0x0020; + break; + } + + /* set rate */ + switch(rtd->codec_dai->dai_runtime.fs) { + case 768: + aiface |= (0x5 << 5); + break; + case 512: + aiface |= (0x4 << 5); + break; + case 384: + aiface |= (0x3 << 5); + break; + case 256: + aiface |= (0x2 << 5); + break; + } + + wm8772_write(codec, WM8772_ADCCTRL, aiface_ctrl); + wm8772_write(codec, WM8772_ADCRATE, aiface); + } + + return 0; +} + +static int wm8772_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 master = wm8772_read_reg_cache(codec, WM8772_DACRATE) & 0xffe0; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* vref/mid, clk and osc on, dac unmute, active */ + wm8772_write(codec, WM8772_DACRATE, master); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* everything off except vref/vmid, dac mute, inactive */ + wm8772_write(codec, WM8772_DACRATE, master | 0x0f); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* everything off, dac mute, inactive */ + wm8772_write(codec, WM8772_DACRATE, master | 0x1f); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai wm8772_dai = { + .name = "WM8772", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 6, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = wm8772_config_sysclk, + .ops = { + .prepare = wm8772_pcm_prepare, + }, + .caps = { + .num_modes = ARRAY_SIZE(wm8772_modes), + .mode = wm8772_modes, + }, +}; +EXPORT_SYMBOL_GPL(wm8772_dai); + +static int wm8772_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm8772_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm8772_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(wm8772_reg); i++) { + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + wm8772_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + wm8772_dapm_event(codec, codec->suspend_dapm_state); + return 0; +} + +/* + * initialise the WM8772 driver + * register the mixer and dsp interfaces with the kernel + */ +static int wm8772_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int reg, ret = 0; + + codec->name = "WM8772"; + codec->owner = THIS_MODULE; + codec->read = wm8772_read_reg_cache; + codec->write = wm8772_write; + codec->dapm_event = wm8772_dapm_event; + codec->dai = &wm8772_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(wm8772_reg); + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm8772_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, wm8772_reg, sizeof(u16) * ARRAY_SIZE(wm8772_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8772_reg); + + wm8772_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* power on device */ + wm8772_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* set the update bits */ + reg = wm8772_read_reg_cache(codec, WM8772_MDACVOL); + wm8772_write(codec, WM8772_MDACVOL, reg | 0x0100); + reg = wm8772_read_reg_cache(codec, WM8772_LDAC1VOL); + wm8772_write(codec, WM8772_LDAC1VOL, reg | 0x0100); + reg = wm8772_read_reg_cache(codec, WM8772_LDAC2VOL); + wm8772_write(codec, WM8772_LDAC2VOL, reg | 0x0100); + reg = wm8772_read_reg_cache(codec, WM8772_LDAC3VOL); + wm8772_write(codec, WM8772_LDAC3VOL, reg | 0x0100); + reg = wm8772_read_reg_cache(codec, WM8772_RDAC1VOL); + wm8772_write(codec, WM8772_RDAC1VOL, reg | 0x0100); + reg = wm8772_read_reg_cache(codec, WM8772_RDAC2VOL); + wm8772_write(codec, WM8772_RDAC2VOL, reg | 0x0100); + reg = wm8772_read_reg_cache(codec, WM8772_RDAC3VOL); + wm8772_write(codec, WM8772_RDAC3VOL, reg | 0x0100); + + wm8772_add_controls(codec); + snd_soc_register_card(socdev); + + return 0; +} + +static struct snd_soc_device *wm8772_socdev; + +static int wm8772_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct wm8772_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec; + int ret = 0; + + printk(KERN_INFO "WM8772 Audio Codec %s", WM8772_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + wm8772_socdev = socdev; + + /* Add other interfaces here */ +#warning do 3 wire device probe here and then call wm8772_init() + + return ret; +} + +/* power down chip */ +static int wm8772_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if (codec->control_data) + wm8772_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + + snd_soc_free_pcms(socdev); + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm8772 = { + .probe = wm8772_probe, + .remove = wm8772_remove, + .suspend = wm8772_suspend, + .resume = wm8772_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm8772); + +MODULE_DESCRIPTION("Soc WM8772 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm8772.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8772.h @@ -0,0 +1,40 @@ +/* + * wm8772.h -- audio driver for WM8772 + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef _WM8772_H +#define _WM8772_H + +/* WM8772 register space */ + +#define WM8772_LDAC1VOL 0x00 +#define WM8772_RDAC1VOL 0x01 +#define WM8772_DACCH 0x02 +#define WM8772_IFACE 0x03 +#define WM8772_LDAC2VOL 0x04 +#define WM8772_RDAC2VOL 0x05 +#define WM8772_LDAC3VOL 0x06 +#define WM8772_RDAC3VOL 0x07 +#define WM8772_MDACVOL 0x08 +#define WM8772_DACCTRL 0x09 +#define WM8772_DACRATE 0x0a +#define WM8772_ADCRATE 0x0b +#define WM8772_ADCCTRL 0x0c +#define WM8772_RESET 0x1f + +#define WM8772_CACHE_REGNUM 10 + +extern struct snd_soc_codec_dai wm8772_dai; +extern struct snd_soc_codec_device soc_codec_dev_wm8772; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm8971.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8971.c @@ -0,0 +1,1032 @@ +/* + * wm8971.c -- WM8971 ALSA SoC Audio driver + * + * Copyright 2005 Lab126, Inc. + * + * Author: Kenneth Kiraly + * + * Based on wm8753.c by Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wm8971.h" + +#define AUDIO_NAME "wm8971" +#define WM8971_VERSION "0.7" + +#define PFX AUDIO_NAME +#undef WM8971_DEBUG + +#ifdef WM8971_DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) + +#define WM8971_REG_COUNT 43 + +static struct workqueue_struct *wm8971_workq = NULL; +static struct work_struct wm8971_dapm_work; + +/* + * wm8971 register cache + * We can't read the WM8971 register space when we + * are using 2 wire for device control, so we cache them instead. + */ +static const u16 wm8971_reg[] = { + 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ + 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ + 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ + 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ + 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ + 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ + 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ + 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ + 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ + 0x0079, 0x0079, 0x0079, /* 40 */ +}; + +#define WM8971_HIFI_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \ + SND_SOC_DAIFMT_IB_IF) + +#define WM8971_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM8971_HIFI_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + +#define WM8971_HIFI_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + +#define WM8971_HIFI_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) + +static struct snd_soc_dai_mode wm8971_modes[] = { + /* common codec frame and clock master modes */ + /* 8k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1536, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1408, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 2304, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 2112, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_8000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1500, WM8971_HIFI_FSB}, + + /* 11.025k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1024, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1536, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_11025, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1088, WM8971_HIFI_FSB}, + + /* 16k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 768, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 1152, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 750, WM8971_HIFI_FSB}, + + /* 22.05k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 512, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 768, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_22050, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 544, WM8971_HIFI_FSB}, + + /* 32k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 384, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 576, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_16000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 375, WM8971_HIFI_FSB}, + + /* 44.1k & 48k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, WM8971_DIR, SND_SOC_DAI_BFS_DIV, 256, + WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100 | + SNDRV_PCM_RATE_48000, WM8971_DIR, SND_SOC_DAI_BFS_DIV, 384, + WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_44100, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 272, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_48000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 250, WM8971_HIFI_FSB}, + + /* 96k */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000, WM8971_DIR, SND_SOC_DAI_BFS_DIV, 128, + WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200 | + SNDRV_PCM_RATE_96000, WM8971_DIR, SND_SOC_DAI_BFS_DIV, 192, + WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_88200, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 136, WM8971_HIFI_FSB}, + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAITDM_LRDW(0,0), WM8971_HIFI_PCM_FORMATS, SNDRV_PCM_RATE_96000, + WM8971_DIR, SND_SOC_DAI_BFS_DIV, 125, WM8971_HIFI_FSB}, + + /* codec frame and clock slave modes */ + {WM8971_HIFI_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + WM8971_HIFI_PCM_FORMATS, WM8971_HIFI_RATES, WM8971_DIR, + SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSBD_ALL}, +}; + +static inline unsigned int wm8971_read_reg_cache(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg < WM8971_REG_COUNT) + return cache[reg]; + + return -1; +} + +static inline void wm8971_write_reg_cache(struct snd_soc_codec *codec, + unsigned int reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg < WM8971_REG_COUNT) + cache[reg] = value; +} + +static int wm8971_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8753 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8971_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +#define wm8971_reset(c) wm8971_write(c, WM8971_RESET, 0) + +/* WM8971 Controls */ +static const char *wm8971_bass[] = { "Linear Control", "Adaptive Boost" }; +static const char *wm8971_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; +static const char *wm8971_treble[] = { "8kHz", "4kHz" }; +static const char *wm8971_alc_func[] = { "Off", "Right", "Left", "Stereo" }; +static const char *wm8971_ng_type[] = { "Constant PGA Gain", "Mute ADC Output" }; +static const char *wm8971_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" }; +static const char* wm8971_mono_mux[] = {"Stereo", "Mono (Left)", "Mono (Right)", "Digital Mono"}; +static const char *wm8971_dac_phase[] = { "Non Inverted", "Inverted" }; +static const char* wm8971_lline_mux[] = {"Line", "NC", "NC", "PGA", "Differential"}; +static const char* wm8971_rline_mux[] = {"Line", "Mic", "NC", "PGA", "Differential"}; +static const char* wm8971_lpga_sel[] = {"Line", "NC", "NC", "Differential"}; +static const char* wm8971_rpga_sel[] = {"Line", "Mic", "NC", "Differential"}; +static const char* wm8971_adcpol[] = {"Normal", "L Invert", "R Invert", "L + R Invert"}; + +static const struct soc_enum wm8971_enum[] = { + SOC_ENUM_SINGLE(WM8971_BASS, 7, 2, wm8971_bass), /* 0 */ + SOC_ENUM_SINGLE(WM8971_BASS, 6, 2, wm8971_bass_filter), + SOC_ENUM_SINGLE(WM8971_TREBLE, 6, 2, wm8971_treble), + SOC_ENUM_SINGLE(WM8971_ALC1, 7, 4, wm8971_alc_func), + SOC_ENUM_SINGLE(WM8971_NGATE, 1, 2, wm8971_ng_type), /* 4 */ + SOC_ENUM_SINGLE(WM8971_ADCDAC, 1, 4, wm8971_deemp), + SOC_ENUM_SINGLE(WM8971_ADCTL1, 4, 4, wm8971_mono_mux), + SOC_ENUM_SINGLE(WM8971_ADCTL1, 1, 2, wm8971_dac_phase), + SOC_ENUM_SINGLE(WM8971_LOUTM1, 0, 5, wm8971_lline_mux), /* 8 */ + SOC_ENUM_SINGLE(WM8971_ROUTM1, 0, 5, wm8971_rline_mux), + SOC_ENUM_SINGLE(WM8971_LADCIN, 6, 4, wm8971_lpga_sel), + SOC_ENUM_SINGLE(WM8971_RADCIN, 6, 4, wm8971_rpga_sel), + SOC_ENUM_SINGLE(WM8971_ADCDAC, 5, 4, wm8971_adcpol), /* 12 */ + SOC_ENUM_SINGLE(WM8971_ADCIN, 6, 4, wm8971_mono_mux), +}; + +static const struct snd_kcontrol_new wm8971_snd_controls[] = { + SOC_DOUBLE_R("Capture Volume", WM8971_LINVOL, WM8971_RINVOL, 0, 63, 0), + SOC_DOUBLE_R("Capture ZC Switch", WM8971_LINVOL, WM8971_RINVOL, 6, 1, 0), + SOC_DOUBLE_R("Capture Switch", WM8971_LINVOL, WM8971_RINVOL, 7, 1, 1), + + SOC_DOUBLE_R("Out1 Playback ZC Switch", WM8971_LOUT1V, WM8971_ROUT1V, 7, 1, 0), + SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8971_LOUT2V, WM8971_ROUT2V, 7, 1, 0), + SOC_SINGLE("Mono Playback ZC Switch", WM8971_MOUTV, 7, 1, 0), + + SOC_DOUBLE_R("PCM Volume", WM8971_LDAC, WM8971_RDAC, 0, 255, 0), + + SOC_DOUBLE_R("Bypass Left Playback Volume", WM8971_LOUTM1, WM8971_LOUTM2, 4, 7, 1), + SOC_DOUBLE_R("Bypass Right Playback Volume", WM8971_ROUTM1, WM8971_ROUTM2, 4, 7, 1), + SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8971_MOUTM1, WM8971_MOUTM2, 4, 7, 1), + + SOC_DOUBLE_R("Out1 Playback Volume", WM8971_LOUT1V, WM8971_ROUT1V, 0, 127, 0), + SOC_DOUBLE_R("Out2 Playback Volume", WM8971_LOUT2V, WM8971_ROUT2V, 0, 127, 0), + + SOC_ENUM("Bass Boost", wm8971_enum[0]), + SOC_ENUM("Bass Filter", wm8971_enum[1]), + SOC_SINGLE("Bass Volume", WM8971_BASS, 0, 7, 1), + + SOC_SINGLE("Treble Volume", WM8971_TREBLE, 0, 7, 0), + SOC_ENUM("Treble Cut-off", wm8971_enum[2]), + + SOC_SINGLE("Capture Filter Switch", WM8971_ADCDAC, 0, 1, 1), + + SOC_SINGLE("ALC Target Volume", WM8971_ALC1, 0, 7, 0), + SOC_SINGLE("ALC Max Volume", WM8971_ALC1, 4, 7, 0), + + SOC_SINGLE("ALC Capture Target Volume", WM8971_ALC1, 0, 7, 0), + SOC_SINGLE("ALC Capture Max Volume", WM8971_ALC1, 4, 7, 0), + SOC_ENUM("ALC Capture Function", wm8971_enum[3]), + SOC_SINGLE("ALC Capture ZC Switch", WM8971_ALC2, 7, 1, 0), + SOC_SINGLE("ALC Capture Hold Time", WM8971_ALC2, 0, 15, 0), + SOC_SINGLE("ALC Capture Decay Time", WM8971_ALC3, 4, 15, 0), + SOC_SINGLE("ALC Capture Attack Time", WM8971_ALC3, 0, 15, 0), + SOC_SINGLE("ALC Capture NG Threshold", WM8971_NGATE, 3, 31, 0), + SOC_ENUM("ALC Capture NG Type", wm8971_enum[4]), + SOC_SINGLE("ALC Capture NG Switch", WM8971_NGATE, 0, 1, 0), + + SOC_SINGLE("Capture 6dB Attenuate", WM8971_ADCDAC, 8, 1, 0), + SOC_SINGLE("Playback 6dB Attenuate", WM8971_ADCDAC, 7, 1, 0), + + SOC_ENUM("Playback De-emphasis", wm8971_enum[5]), + SOC_ENUM("Playback Function", wm8971_enum[6]), + SOC_ENUM("Playback Phase", wm8971_enum[7]), + + SOC_DOUBLE_R("Mic Boost", WM8971_LADCIN, WM8971_RADCIN, 4, 3, 0), +}; + +/* add non-DAPM controls */ +static int wm8971_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8971_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8971_snd_controls[i],codec, NULL))) < 0) { + return err; + } + } + + return 0; +} + +/* + * DAPM Controls + */ + +/* Left Mixer */ +static const struct snd_kcontrol_new wm8971_left_mixer_controls[] = { +SOC_DAPM_SINGLE("Playback Switch", WM8971_LOUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_LOUTM1, 7, 1, 0), +SOC_DAPM_SINGLE("Right Playback Switch", WM8971_LOUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_LOUTM2, 7, 1, 0), +}; + +/* Right Mixer */ +static const struct snd_kcontrol_new wm8971_right_mixer_controls[] = { +SOC_DAPM_SINGLE("Left Playback Switch", WM8971_ROUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_ROUTM1, 7, 1, 0), +SOC_DAPM_SINGLE("Playback Switch", WM8971_ROUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_ROUTM2, 7, 1, 0), +}; + +/* Mono Mixer */ +static const struct snd_kcontrol_new wm8971_mono_mixer_controls[] = { +SOC_DAPM_SINGLE("Left Playback Switch", WM8971_MOUTM1, 8, 1, 0), +SOC_DAPM_SINGLE("Left Bypass Switch", WM8971_MOUTM1, 7, 1, 0), +SOC_DAPM_SINGLE("Right Playback Switch", WM8971_MOUTM2, 8, 1, 0), +SOC_DAPM_SINGLE("Right Bypass Switch", WM8971_MOUTM2, 7, 1, 0), +}; + +/* Left Line Mux */ +static const struct snd_kcontrol_new wm8971_left_line_controls = +SOC_DAPM_ENUM("Route", wm8971_enum[8]); + +/* Right Line Mux */ +static const struct snd_kcontrol_new wm8971_right_line_controls = +SOC_DAPM_ENUM("Route", wm8971_enum[9]); + +/* Left PGA Mux */ +static const struct snd_kcontrol_new wm8971_left_pga_controls = +SOC_DAPM_ENUM("Route", wm8971_enum[10]); + +/* Right PGA Mux */ +static const struct snd_kcontrol_new wm8971_right_pga_controls = +SOC_DAPM_ENUM("Route", wm8971_enum[11]); + +/* Mono ADC Mux */ +static const struct snd_kcontrol_new wm8971_monomux_controls = +SOC_DAPM_ENUM("Route", wm8971_enum[13]); + +static const struct snd_soc_dapm_widget wm8971_dapm_widgets[] = { + SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, + &wm8971_left_mixer_controls[0], ARRAY_SIZE(wm8971_left_mixer_controls)), + SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, + &wm8971_right_mixer_controls[0], ARRAY_SIZE(wm8971_right_mixer_controls)), + SND_SOC_DAPM_MIXER("Mono Mixer", WM8971_PWR2, 2, 0, + &wm8971_mono_mixer_controls[0], ARRAY_SIZE(wm8971_mono_mixer_controls)), + + SND_SOC_DAPM_PGA("Right Out 2", WM8971_PWR2, 3, 0, NULL, 0), + SND_SOC_DAPM_PGA("Left Out 2", WM8971_PWR2, 4, 0, NULL, 0), + SND_SOC_DAPM_PGA("Right Out 1", WM8971_PWR2, 5, 0, NULL, 0), + SND_SOC_DAPM_PGA("Left Out 1", WM8971_PWR2, 6, 0, NULL, 0), + SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8971_PWR2, 7, 0), + SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8971_PWR2, 8, 0), + SND_SOC_DAPM_PGA("Mono Out 1", WM8971_PWR2, 2, 0, NULL, 0), + + SND_SOC_DAPM_MICBIAS("Mic Bias", WM8971_PWR1, 1, 0), + SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8971_PWR1, 2, 0), + SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8971_PWR1, 3, 0), + + SND_SOC_DAPM_MUX("Left PGA Mux", WM8971_PWR1, 5, 0, + &wm8971_left_pga_controls), + SND_SOC_DAPM_MUX("Right PGA Mux", WM8971_PWR1, 4, 0, + &wm8971_right_pga_controls), + SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, + &wm8971_left_line_controls), + SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, + &wm8971_right_line_controls), + + SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, + &wm8971_monomux_controls), + SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, + &wm8971_monomux_controls), + + SND_SOC_DAPM_OUTPUT("LOUT1"), + SND_SOC_DAPM_OUTPUT("ROUT1"), + SND_SOC_DAPM_OUTPUT("LOUT2"), + SND_SOC_DAPM_OUTPUT("ROUT2"), + SND_SOC_DAPM_OUTPUT("MONO"), + + SND_SOC_DAPM_INPUT("LINPUT1"), + SND_SOC_DAPM_INPUT("RINPUT1"), + SND_SOC_DAPM_INPUT("MIC"), +}; + +static const char* audio_map[][3] = { + /* left mixer */ + {"Left Mixer", "Playback Switch", "Left DAC"}, + {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, + {"Left Mixer", "Right Playback Switch", "Right DAC"}, + {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, + + /* right mixer */ + {"Right Mixer", "Left Playback Switch", "Left DAC"}, + {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, + {"Right Mixer", "Playback Switch", "Right DAC"}, + {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, + + /* left out 1 */ + {"Left Out 1", NULL, "Left Mixer"}, + {"LOUT1", NULL, "Left Out 1"}, + + /* left out 2 */ + {"Left Out 2", NULL, "Left Mixer"}, + {"LOUT2", NULL, "Left Out 2"}, + + /* right out 1 */ + {"Right Out 1", NULL, "Right Mixer"}, + {"ROUT1", NULL, "Right Out 1"}, + + /* right out 2 */ + {"Right Out 2", NULL, "Right Mixer"}, + {"ROUT2", NULL, "Right Out 2"}, + + /* mono mixer */ + {"Mono Mixer", "Left Playback Switch", "Left DAC"}, + {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, + {"Mono Mixer", "Right Playback Switch", "Right DAC"}, + {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, + + /* mono out */ + {"Mono Out", NULL, "Mono Mixer"}, + {"MONO1", NULL, "Mono Out"}, + + /* Left Line Mux */ + {"Left Line Mux", "Line", "LINPUT1"}, + {"Left Line Mux", "PGA", "Left PGA Mux"}, + {"Left Line Mux", "Differential", "Differential Mux"}, + + /* Right Line Mux */ + {"Right Line Mux", "Line", "RINPUT1"}, + {"Right Line Mux", "Mic", "MIC"}, + {"Right Line Mux", "PGA", "Right PGA Mux"}, + {"Right Line Mux", "Differential", "Differential Mux"}, + + /* Left PGA Mux */ + {"Left PGA Mux", "Line", "LINPUT1"}, + {"Left PGA Mux", "Differential", "Differential Mux"}, + + /* Right PGA Mux */ + {"Right PGA Mux", "Line", "RINPUT1"}, + {"Right PGA Mux", "Differential", "Differential Mux"}, + + /* Differential Mux */ + {"Differential Mux", "Line", "LINPUT1"}, + {"Differential Mux", "Line", "RINPUT1"}, + + /* Left ADC Mux */ + {"Left ADC Mux", "Stereo", "Left PGA Mux"}, + {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, + {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, + + /* Right ADC Mux */ + {"Right ADC Mux", "Stereo", "Right PGA Mux"}, + {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, + {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, + + /* ADC */ + {"Left ADC", NULL, "Left ADC Mux"}, + {"Right ADC", NULL, "Right ADC Mux"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +static int wm8971_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm8971_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8971_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +struct _coeff_div { + u32 mclk; + u32 rate; + u16 fs; + u8 sr:5; + u8 usb:1; +}; + +/* codec hifi mclk clock divider coefficients */ +static const struct _coeff_div coeff_div[] = { + /* 8k */ + {12288000, 8000, 1536, 0x6, 0x0}, + {11289600, 8000, 1408, 0x16, 0x0}, + {18432000, 8000, 2304, 0x7, 0x0}, + {16934400, 8000, 2112, 0x17, 0x0}, + {12000000, 8000, 1500, 0x6, 0x1}, + + /* 11.025k */ + {11289600, 11025, 1024, 0x18, 0x0}, + {16934400, 11025, 1536, 0x19, 0x0}, + {12000000, 11025, 1088, 0x19, 0x1}, + + /* 16k */ + {12288000, 16000, 768, 0xa, 0x0}, + {18432000, 16000, 1152, 0xb, 0x0}, + {12000000, 16000, 750, 0xa, 0x1}, + + /* 22.05k */ + {11289600, 22050, 512, 0x1a, 0x0}, + {16934400, 22050, 768, 0x1b, 0x0}, + {12000000, 22050, 544, 0x1b, 0x1}, + + /* 32k */ + {12288000, 32000, 384, 0xc, 0x0}, + {18432000, 32000, 576, 0xd, 0x0}, + {12000000, 32000, 375, 0xa, 0x1}, + + /* 44.1k */ + {11289600, 44100, 256, 0x10, 0x0}, + {16934400, 44100, 384, 0x11, 0x0}, + {12000000, 44100, 272, 0x11, 0x1}, + + /* 48k */ + {12288000, 48000, 256, 0x0, 0x0}, + {18432000, 48000, 384, 0x1, 0x0}, + {12000000, 48000, 250, 0x0, 0x1}, + + /* 88.2k */ + {11289600, 88200, 128, 0x1e, 0x0}, + {16934400, 88200, 192, 0x1f, 0x0}, + {12000000, 88200, 136, 0x1f, 0x1}, + + /* 96k */ + {12288000, 96000, 128, 0xe, 0x0}, + {18432000, 96000, 192, 0xf, 0x0}, + {12000000, 96000, 125, 0xe, 0x1}, +}; + +static int get_coeff(int mclk, int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { + if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) + return i; + } + return -EINVAL; +} + +/* WM8971 supports numerous input clocks per sample rate */ +static unsigned int wm8971_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + dai->mclk = 0; + + /* check that the calculated FS and rate actually match a clock from + * the machine driver */ + if(info->fs * info->rate == clk) + dai->mclk = clk; + + return dai->mclk; +} + +static int wm8971_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 iface = 0, bfs, srate; + int i = get_coeff(rtd->codec_dai->mclk, + snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate)); + + /* is coefficient valid ? */ + if(i < 0) + return i; + + bfs = SND_SOC_FSB_REAL(rtd->codec_dai->dai_runtime.bfs); + + /* set master/slave audio interface */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + iface |= 0x0040; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + } + + srate = wm8971_read_reg_cache(codec, WM8971_SRATE) & 0x01c0; + wm8971_write(codec, WM8971_SRATE, srate | (coeff_div[i].sr << 1) | coeff_div[i].usb); + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + iface |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + iface |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + iface |= 0x0013; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + iface |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + case SNDRV_PCM_FORMAT_S24_LE: + iface |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + iface |= 0x000c; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface |= 0x0090; + break; + case SND_SOC_DAIFMT_IB_NF: + iface |= 0x0080; + break; + case SND_SOC_DAIFMT_NB_IF: + iface |= 0x0010; + break; + } + + /* set bclk divisor rate */ + switch (bfs) { + case 1: + break; + case 4: + srate |= (0x1 << 7); + break; + case 8: + srate |= (0x2 << 7); + break; + case 16: + srate |= (0x3 << 7); + break; + } + + /* set iface */ + wm8971_write(codec, WM8971_AUDIO, iface); + + return 0; +} + +static int wm8971_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = wm8971_read_reg_cache(codec, WM8971_ADCDAC) & 0xfff7; + if(mute) + wm8971_write(codec, WM8971_ADCDAC, mute_reg | 0x8); + else + wm8971_write(codec, WM8971_ADCDAC, mute_reg); + return 0; +} + +static int wm8971_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 pwr_reg = wm8971_read_reg_cache(codec, WM8971_PWR1) & 0xfe3e; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* set vmid to 50k and unmute dac */ + wm8971_write(codec, WM8971_PWR1, pwr_reg | 0x00c1); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + /* set vmid to 5k for quick power up */ + wm8971_write(codec, WM8971_PWR1, pwr_reg | 0x01c0); + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* mute dac and set vmid to 500k, enable VREF */ + wm8971_write(codec, WM8971_PWR1, pwr_reg | 0x0140); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + wm8971_write(codec, WM8971_PWR1, 0x0001); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai wm8971_dai = { + .name = "WM8971", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 2, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 2, + }, + .config_sysclk = wm8971_config_sysclk, + .digital_mute = wm8971_mute, + .ops = { + .prepare = wm8971_pcm_prepare, + }, + .caps = { + .num_modes = ARRAY_SIZE(wm8971_modes), + .mode = wm8971_modes, + }, +}; +EXPORT_SYMBOL_GPL(wm8971_dai); + +static void wm8971_work(void *data) +{ + struct snd_soc_codec *codec = (struct snd_soc_codec *)data; + wm8971_dapm_event(codec, codec->dapm_state); +} + +static int wm8971_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm8971_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm8971_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(wm8971_reg); i++) { + if (i + 1 == WM8971_RESET) + continue; + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + + wm8971_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* charge wm8971 caps */ + if(codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) { + wm8971_dapm_event(codec, SNDRV_CTL_POWER_D2); + codec->dapm_state = SNDRV_CTL_POWER_D0; + queue_delayed_work(wm8971_workq, &wm8971_dapm_work, msecs_to_jiffies(1000)); + } + + return 0; +} + +static int wm8971_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int reg, ret = 0; + + codec->name = "WM8971"; + codec->owner = THIS_MODULE; + codec->read = wm8971_read_reg_cache; + codec->write = wm8971_write; + codec->dapm_event = wm8971_dapm_event; + codec->dai = &wm8971_dai; + codec->reg_cache_size = ARRAY_SIZE(wm8971_reg); + codec->num_dai = 1; + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm8971_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, wm8971_reg, sizeof(u16) * ARRAY_SIZE(wm8971_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8971_reg); + + wm8971_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* charge output caps */ + wm8971_dapm_event(codec, SNDRV_CTL_POWER_D2); + codec->dapm_state = SNDRV_CTL_POWER_D3hot; + queue_delayed_work(wm8971_workq, &wm8971_dapm_work, msecs_to_jiffies(1000)); + + /* set the update bits */ + reg = wm8971_read_reg_cache(codec, WM8971_LDAC); + wm8971_write(codec, WM8971_LDAC, reg | 0x0100); + reg = wm8971_read_reg_cache(codec, WM8971_RDAC); + wm8971_write(codec, WM8971_RDAC, reg | 0x0100); + + reg = wm8971_read_reg_cache(codec, WM8971_LOUT1V); + wm8971_write(codec, WM8971_LOUT1V, reg | 0x0100); + reg = wm8971_read_reg_cache(codec, WM8971_ROUT1V); + wm8971_write(codec, WM8971_ROUT1V, reg | 0x0100); + + reg = wm8971_read_reg_cache(codec, WM8971_LOUT2V); + wm8971_write(codec, WM8971_LOUT2V, reg | 0x0100); + reg = wm8971_read_reg_cache(codec, WM8971_ROUT2V); + wm8971_write(codec, WM8971_ROUT2V, reg | 0x0100); + + reg = wm8971_read_reg_cache(codec, WM8971_LINVOL); + wm8971_write(codec, WM8971_LINVOL, reg | 0x0100); + reg = wm8971_read_reg_cache(codec, WM8971_RINVOL); + wm8971_write(codec, WM8971_RINVOL, reg | 0x0100); + + wm8971_add_controls(codec); + wm8971_add_widgets(codec); + if((ret = snd_soc_register_card(socdev)) < 0) { + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + } + + return ret; +} + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ +static struct snd_soc_device *wm8971_socdev; + +#ifdef CONFIG_I2C + +/* + * WM8731 2 wire address is determined by GPIO5 + * state during powerup. + * low = 0x1a + * high = 0x1b + */ +#define I2C_DRIVERID_WM8971 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver wm8971_i2c_driver; +static struct i2c_client client_template; + +static int wm8971_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = wm8971_socdev; + struct wm8971_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + + i2c_set_clientdata(i2c, codec); + + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + err("failed to attach codec at addr %x\n", addr); + goto err; + } + + if((ret = wm8971_init(socdev)) < 0) { + err("failed to initialise WM8971\n"); + goto err; + } + return ret; + +err: + kfree(codec); + kfree(i2c); + return ret; +} + +static int wm8971_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec* codec = i2c_get_clientdata(client); + i2c_detach_client(client); + kfree(codec->reg_cache); + kfree(client); + return 0; +} + +static int wm8971_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, wm8971_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver wm8971_i2c_driver = { + .driver = { + .name = "WM8971 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_WM8971, + .attach_adapter = wm8971_i2c_attach, + .detach_client = wm8971_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "WM8971", + .driver = &wm8971_i2c_driver, +}; +#endif + +static int wm8971_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct wm8971_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec; + int ret = 0; + + info("WM8971 Audio Codec %s", WM8971_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + wm8971_socdev = socdev; + + INIT_WORK(&wm8971_dapm_work, wm8971_work, codec); + if((wm8971_workq = create_workqueue("wm8971")) == NULL) { + kfree(codec); + return -ENOMEM; + } +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&wm8971_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + + return ret; +} + +/* power down chip */ +static int wm8971_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if (codec->control_data) + wm8971_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + if(wm8971_workq) + destroy_workqueue(wm8971_workq); + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&wm8971_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm8971 = { + .probe = wm8971_probe, + .remove = wm8971_remove, + .suspend = wm8971_suspend, + .resume = wm8971_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm8971); + +MODULE_DESCRIPTION("SoC WM8971 driver"); +MODULE_AUTHOR("Lab126"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm8971.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8971.h @@ -0,0 +1,61 @@ +/* + * wm8971.h -- audio driver for WM8971 + * + * Copyright 2005 Lab126, Inc. + * + * Author: Kenneth Kiraly + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef _WM8971_H +#define _WM8971_H + +#define WM8971_LINVOL 0x00 +#define WM8971_RINVOL 0x01 +#define WM8971_LOUT1V 0x02 +#define WM8971_ROUT1V 0x03 +#define WM8971_ADCDAC 0x05 +#define WM8971_AUDIO 0x07 +#define WM8971_SRATE 0x08 +#define WM8971_LDAC 0x0a +#define WM8971_RDAC 0x0b +#define WM8971_BASS 0x0c +#define WM8971_TREBLE 0x0d +#define WM8971_RESET 0x0f +#define WM8971_ALC1 0x11 +#define WM8971_ALC2 0x12 +#define WM8971_ALC3 0x13 +#define WM8971_NGATE 0x14 +#define WM8971_LADC 0x15 +#define WM8971_RADC 0x16 +#define WM8971_ADCTL1 0x17 +#define WM8971_ADCTL2 0x18 +#define WM8971_PWR1 0x19 +#define WM8971_PWR2 0x1a +#define WM8971_ADCTL3 0x1b +#define WM8971_ADCIN 0x1f +#define WM8971_LADCIN 0x20 +#define WM8971_RADCIN 0x21 +#define WM8971_LOUTM1 0x22 +#define WM8971_LOUTM2 0x23 +#define WM8971_ROUTM1 0x24 +#define WM8971_ROUTM2 0x25 +#define WM8971_MOUTM1 0x26 +#define WM8971_MOUTM2 0x27 +#define WM8971_LOUT2V 0x28 +#define WM8971_ROUT2V 0x29 +#define WM8971_MOUTV 0x2A + +struct wm8971_setup_data { + unsigned short i2c_address; +}; + +extern struct snd_soc_codec_dai wm8971_dai; +extern struct snd_soc_codec_device soc_codec_dev_wm8971; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm8974.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8974.c @@ -0,0 +1,902 @@ +/* + * wm8974.c -- WM8974 ALSA Soc Audio driver + * + * Copyright 2006 Wolfson Microelectronics PLC. + * + * Author: Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "wm8974.h" + +#define AUDIO_NAME "wm8974" +#define WM8974_VERSION "0.4" + +/* + * Debug + */ + +#define PFX AUDIO_NAME +#define WM8974_DEBUG 0 + +#ifdef WM8974_DEBUG +#define dbg(format, arg...) printk(KERN_DEBUG PFX ": " format "\n" , ## arg) +#else +#define dbg(format, arg...) do {} while (0) +#endif +#define err(format, arg...) printk(KERN_ERR PFX ": " format "\n" , ## arg) +#define info(format, arg...) printk(KERN_INFO PFX ": " format "\n" , ## arg) +#define warn(format, arg...) printk(KERN_WARNING PFX ": " format "\n" , ## arg) + +struct snd_soc_codec_device soc_codec_dev_wm8974; + +/* + * wm8974 register cache + * We can't read the WM8974 register space when we are + * using 2 wire for device control, so we cache them instead. + */ +static const u16 wm8974_reg[WM8974_CACHEREGNUM] = { + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0050, 0x0000, 0x0140, 0x0000, + 0x0000, 0x0000, 0x0000, 0x00ff, + 0x0000, 0x0000, 0x0100, 0x00ff, + 0x0000, 0x0000, 0x012c, 0x002c, + 0x002c, 0x002c, 0x002c, 0x0000, + 0x0032, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0038, 0x000b, 0x0032, 0x0000, + 0x0008, 0x000c, 0x0093, 0x00e9, + 0x0000, 0x0000, 0x0000, 0x0000, + 0x0003, 0x0010, 0x0000, 0x0000, + 0x0000, 0x0002, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0039, 0x0000, + 0x0000, +}; + +#define WM8974_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \ + SND_SOC_DAIFMT_IB_IF) + +#define WM8974_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM8974_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +#define WM8974_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) + +#define WM8794_BCLK \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | SND_SOC_FSBD(8) |\ + SND_SOC_FSBD(16) | SND_SOC_FSBD(32)) + +static struct snd_soc_dai_mode wm8974_modes[] = { + /* codec frame and clock master modes */ + {WM8974_DAIFMT | SND_SOC_DAIFMT_CBM_CFM, SND_SOC_DAITDM_LRDW(0,0), + WM8974_PCM_FORMATS, WM8974_RATES, WM8974_DIR, 0, 256, WM8794_BCLK}, + + /* codec frame and clock slave modes */ + {WM8974_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), WM8974_PCM_FORMATS, + WM8974_RATES, WM8974_DIR, SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSBD_ALL}, +}; + +/* + * read wm8974 register cache + */ +static inline unsigned int wm8974_read_reg_cache(struct snd_soc_codec * codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + if (reg == WM8974_RESET) + return 0; + if (reg >= WM8974_CACHEREGNUM) + return -1; + return cache[reg]; +} + +/* + * write wm8974 register cache + */ +static inline void wm8974_write_reg_cache(struct snd_soc_codec *codec, + u16 reg, unsigned int value) +{ + u16 *cache = codec->reg_cache; + if (reg >= WM8974_CACHEREGNUM) + return; + cache[reg] = value; +} + +/* + * write to the WM8974 register space + */ +static int wm8974_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int value) +{ + u8 data[2]; + + /* data is + * D15..D9 WM8974 register offset + * D8...D0 register data + */ + data[0] = (reg << 1) | ((value >> 8) & 0x0001); + data[1] = value & 0x00ff; + + wm8974_write_reg_cache (codec, reg, value); + if (codec->hw_write(codec->control_data, data, 2) == 2) + return 0; + else + return -EIO; +} + +#define wm8974_reset(c) wm8974_write(c, WM8974_RESET, 0) + +static const char* wm8974_companding[] = {"Off", "NC", "u-law", "A-law" }; +static const char* wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" }; +static const char* wm8974_eqmode[] = {"Capture", "Playback" }; +static const char* wm8974_bw[] = {"Narrow", "Wide" }; +static const char* wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" }; +static const char* wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" }; +static const char* wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" }; +static const char* wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" }; +static const char* wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" }; +static const char* wm8974_alc[] = {"ALC", "Limiter" }; + +static const struct soc_enum wm8974_enum[] = { + SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */ + SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */ + SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp), + SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode), + + SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1), + SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw), + SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2), + SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw), + + SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3), + SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw), + SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4), + SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw), + + SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5), + SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc), +}; + +static const struct snd_kcontrol_new wm8974_snd_controls[] = { + +SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0), + +SOC_ENUM("DAC Companding", wm8974_enum[1]), +SOC_ENUM("ADC Companding", wm8974_enum[0]), + +SOC_ENUM("Playback De-emphasis", wm8974_enum[2]), +SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0), + +SOC_SINGLE("Playback Volume", WM8974_DACVOL, 0, 127, 0), + +SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0), +SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0), +SOC_SINGLE("ADC Inversion Switch", WM8974_COMP, 0, 1, 0), + +SOC_SINGLE("Capture Volume", WM8974_ADCVOL, 0, 127, 0), + +SOC_ENUM("Equaliser Function", wm8974_enum[3]), +SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]), +SOC_SINGLE("EQ1 Volume", WM8974_EQ1, 0, 31, 1), + +SOC_ENUM("Equaliser EQ2 Bandwith", wm8974_enum[5]), +SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]), +SOC_SINGLE("EQ2 Volume", WM8974_EQ2, 0, 31, 1), + +SOC_ENUM("Equaliser EQ3 Bandwith", wm8974_enum[7]), +SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]), +SOC_SINGLE("EQ3 Volume", WM8974_EQ3, 0, 31, 1), + +SOC_ENUM("Equaliser EQ4 Bandwith", wm8974_enum[9]), +SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]), +SOC_SINGLE("EQ4 Volume", WM8974_EQ4, 0, 31, 1), + +SOC_ENUM("Equaliser EQ5 Bandwith", wm8974_enum[11]), +SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]), +SOC_SINGLE("EQ5 Volume", WM8974_EQ5, 0, 31, 1), + +SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0), +SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0), +SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0), + +SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0), +SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0), + +SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0), +SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0), +SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0), + +SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0), +SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0), +SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0), + +SOC_ENUM("ALC Capture Mode", wm8974_enum[13]), +SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0), +SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0), + +SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0), +SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0), + +SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0), +SOC_SINGLE("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0), + +SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0), +SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1), +SOC_SINGLE("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0), + +SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0), +SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 0), +}; + +/* add non dapm controls */ +static int wm8974_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm8974_snd_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8974_snd_controls[i],codec, NULL))) < 0) + return err; + } + + return 0; +} + +/* Speaker Output Mixer */ +static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = { +SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0), +SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0), +SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 1), +}; + +/* Mono Output Mixer */ +static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = { +SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0), +SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0), +SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 1), +}; + +/* AUX Input boost vol */ +static const struct snd_kcontrol_new wm8974_aux_boost_controls = +SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0); + +/* Mic Input boost vol */ +static const struct snd_kcontrol_new wm8974_mic_boost_controls = +SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0); + +/* Capture boost switch */ +static const struct snd_kcontrol_new wm8974_capture_boost_controls = +SOC_DAPM_SINGLE("Capture Boost Switch", WM8974_INPPGA, 6, 1, 0); + +/* Aux In to PGA */ +static const struct snd_kcontrol_new wm8974_aux_capture_boost_controls = +SOC_DAPM_SINGLE("Aux Capture Boost Switch", WM8974_INPPGA, 2, 1, 0); + +/* Mic P In to PGA */ +static const struct snd_kcontrol_new wm8974_micp_capture_boost_controls = +SOC_DAPM_SINGLE("Mic P Capture Boost Switch", WM8974_INPPGA, 0, 1, 0); + +/* Mic N In to PGA */ +static const struct snd_kcontrol_new wm8974_micn_capture_boost_controls = +SOC_DAPM_SINGLE("Mic N Capture Boost Switch", WM8974_INPPGA, 1, 1, 0); + +static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = { +SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0, &wm8974_speaker_mixer_controls[0], + ARRAY_SIZE(wm8974_speaker_mixer_controls)), +SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0, &wm8974_mono_mixer_controls[0], + ARRAY_SIZE(wm8974_mono_mixer_controls)), +SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0), +SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER3, 0, 0), +SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0), +SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0), +SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0), +SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0), +SND_SOC_DAPM_PGA("Mic PGA", WM8974_POWER2, 2, 0, NULL, 0), + +SND_SOC_DAPM_PGA("Aux Boost", SND_SOC_NOPM, 0, 0, &wm8974_aux_boost_controls, 1), +SND_SOC_DAPM_PGA("Mic Boost", SND_SOC_NOPM, 0, 0, &wm8974_mic_boost_controls, 1), +SND_SOC_DAPM_SWITCH("Capture Boost", SND_SOC_NOPM, 0, 0, &wm8974_capture_boost_controls), + +SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0, NULL, 0), + +SND_SOC_DAPM_MICBIAS("Mic Bias", WM8974_POWER1, 4, 0), + +SND_SOC_DAPM_INPUT("MICN"), +SND_SOC_DAPM_INPUT("MICP"), +SND_SOC_DAPM_INPUT("AUX"), +SND_SOC_DAPM_OUTPUT("MONOOUT"), +SND_SOC_DAPM_OUTPUT("SPKOUTP"), +SND_SOC_DAPM_OUTPUT("SPKOUTN"), +}; + +static const char* audio_map[][3] = { + /* Mono output mixer */ + {"Mono Mixer", "PCM Playback Switch", "DAC"}, + {"Mono Mixer", "Aux Playback Switch", "Aux Input"}, + {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"}, + + /* Speaker output mixer */ + {"Speaker Mixer", "PCM Playback Switch", "DAC"}, + {"Speaker Mixer", "Aux Playback Switch", "Aux Input"}, + {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"}, + + /* Outputs */ + {"Mono Out", NULL, "Mono Mixer"}, + {"MONOOUT", NULL, "Mono Out"}, + {"SpkN Out", NULL, "Speaker Mixer"}, + {"SpkP Out", NULL, "Speaker Mixer"}, + {"SPKOUTN", NULL, "SpkN Out"}, + {"SPKOUTP", NULL, "SpkP Out"}, + + /* Boost Mixer */ + {"Boost Mixer", NULL, "ADC"}, + {"Capture Boost Switch", "Aux Capture Boost Switch", "AUX"}, + {"Aux Boost", "Aux Volume", "Boost Mixer"}, + {"Capture Boost", "Capture Switch", "Boost Mixer"}, + {"Mic Boost", "Mic Volume", "Boost Mixer"}, + + /* Inputs */ + {"MICP", NULL, "Mic Boost"}, + {"MICN", NULL, "Mic PGA"}, + {"Mic PGA", NULL, "Capture Boost"}, + {"AUX", NULL, "Aux Input"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +static int wm8974_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm8974_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8974_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +struct pll_ { + unsigned int in_hz, out_hz; + unsigned int pre:4; /* prescale - 1 */ + unsigned int n:4; + unsigned int k; +}; + +struct pll_ pll[] = { + {12000000, 11289600, 0, 7, 0x86c220}, + {12000000, 12288000, 0, 8, 0x3126e8}, + {13000000, 11289600, 0, 6, 0xf28bd4}, + {13000000, 12288000, 0, 7, 0x8fd525}, + {12288000, 11289600, 0, 7, 0x59999a}, + {11289600, 12288000, 0, 8, 0x80dee9}, + /* liam - add more entries */ +}; + +static int set_pll(struct snd_soc_codec *codec, unsigned int in, unsigned int out) +{ + int i; + u16 reg; + + if(out == 0) { + reg = wm8974_read_reg_cache(codec, WM8974_POWER1); + wm8974_write(codec, WM8974_POWER1, reg & 0x1df); + return 0; + } + + for(i = 0; i < ARRAY_SIZE(pll); i++) { + if (in == pll[i].in_hz && out == pll[i].out_hz) { + wm8974_write(codec, WM8974_PLLN, (pll[i].pre << 4) | pll[i].n); + wm8974_write(codec, WM8974_PLLK1, pll[i].k >> 18); + wm8974_write(codec, WM8974_PLLK1, (pll[i].k >> 9) && 0x1ff); + wm8974_write(codec, WM8974_PLLK1, pll[i].k && 0x1ff); + reg = wm8974_read_reg_cache(codec, WM8974_POWER1); + wm8974_write(codec, WM8974_POWER1, reg | 0x020); + return 0; + } + } + return -EINVAL; +} + +/* mclk dividers * 2 */ +static unsigned char mclk_div[] = {2, 3, 4, 6, 8, 12, 16, 24}; + +/* we need 256FS to drive the DAC's and ADC's */ +static unsigned int wm8974_config_sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + int i, j, best_clk = info->fs * info->rate; + + /* can we run at this clk without the PLL ? */ + for (i = 0; i < ARRAY_SIZE(mclk_div); i++) { + if ((best_clk >> 1) * mclk_div[i] == clk) { + dai->pll_in = 0; + dai->clk_div = mclk_div[i]; + dai->mclk = best_clk; + return dai->mclk; + } + } + + /* now check for PLL support */ + for (i = 0; i < ARRAY_SIZE(pll); i++) { + if (pll[i].in_hz == clk) { + for (j = 0; j < ARRAY_SIZE(mclk_div); j++) { + if (pll[i].out_hz == mclk_div[j] * (best_clk >> 1)) { + dai->pll_in = clk; + dai->pll_out = pll[i].out_hz; + dai->clk_div = mclk_div[j]; + dai->mclk = best_clk; + return dai->mclk; + } + } + } + } + + /* this clk is not supported */ + return 0; +} + +static int wm8974_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + struct snd_soc_codec_dai *dai = rtd->codec_dai; + u16 iface = 0, bfs, clk = 0, adn; + int fs = 48000 << 7, i; + + bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs); + switch(bfs) { + case 2: + clk |= 0x1 << 2; + break; + case 4: + clk |= 0x2 << 2; + break; + case 8: + clk |= 0x3 << 2; + break; + case 16: + clk |= 0x4 << 2; + break; + case 32: + clk |= 0x5 << 2; + break; + } + + /* set master/slave audio interface */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) { + case SND_SOC_DAIFMT_CBM_CFM: + clk |= 0x0001; + break; + case SND_SOC_DAIFMT_CBS_CFS: + break; + } + + /* interface format */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + iface |= 0x0010; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + iface |= 0x0008; + break; + case SND_SOC_DAIFMT_DSP_A: + iface |= 0x00018; + break; + } + + /* bit size */ + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + iface |= 0x0020; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + case SNDRV_PCM_FORMAT_S24_LE: + iface |= 0x0040; + break; + case SNDRV_PCM_FORMAT_S32_LE: + iface |= 0x0060; + break; + } + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface |= 0x0180; + break; + case SND_SOC_DAIFMT_IB_NF: + iface |= 0x0100; + break; + case SND_SOC_DAIFMT_NB_IF: + iface |= 0x0080; + break; + } + + /* filter coefficient */ + adn = wm8974_read_reg_cache(codec, WM8974_ADD) & 0x1f1; + switch(rtd->codec_dai->dai_runtime.pcmrate) { + case SNDRV_PCM_RATE_8000: + adn |= 0x5 << 1; + fs = 8000 << 7; + break; + case SNDRV_PCM_RATE_11025: + adn |= 0x4 << 1; + fs = 11025 << 7; + break; + case SNDRV_PCM_RATE_16000: + adn |= 0x3 << 1; + fs = 16000 << 7; + break; + case SNDRV_PCM_RATE_22050: + adn |= 0x2 << 1; + fs = 22050 << 7; + break; + case SNDRV_PCM_RATE_32000: + adn |= 0x1 << 1; + fs = 32000 << 7; + break; + case SNDRV_PCM_RATE_44100: + fs = 44100 << 7; + break; + } + + /* do we need to enable the PLL */ + if(dai->pll_in) + set_pll(codec, dai->pll_in, dai->pll_out); + + /* divide the clock to 256 fs */ + for(i = 0; i < ARRAY_SIZE(mclk_div); i++) { + if (dai->clk_div == mclk_div[i]) { + clk |= i << 5; + clk &= 0xff; + goto set; + } + } + +set: + /* set iface */ + wm8974_write(codec, WM8974_IFACE, iface); + wm8974_write(codec, WM8974_CLOCK, clk); + + return 0; +} + +static int wm8974_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + set_pll(codec, 0, 0); + return 0; +} + +static int wm8974_mute(struct snd_soc_codec *codec, + struct snd_soc_codec_dai *dai, int mute) +{ + u16 mute_reg = wm8974_read_reg_cache(codec, WM8974_DAC) & 0xffbf; + if(mute) + wm8974_write(codec, WM8974_DAC, mute_reg | 0x40); + else + wm8974_write(codec, WM8974_DAC, mute_reg); + return 0; +} + +/* liam need to make this lower power with dapm */ +static int wm8974_dapm_event(struct snd_soc_codec *codec, int event) +{ + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* vref/mid, clk and osc on, dac unmute, active */ + wm8974_write(codec, WM8974_POWER1, 0x1ff); + wm8974_write(codec, WM8974_POWER2, 0x1ff); + wm8974_write(codec, WM8974_POWER3, 0x1ff); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* everything off except vref/vmid, dac mute, inactive */ + + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* everything off, dac mute, inactive */ + wm8974_write(codec, WM8974_POWER1, 0x0); + wm8974_write(codec, WM8974_POWER2, 0x0); + wm8974_write(codec, WM8974_POWER3, 0x0); + break; + } + codec->dapm_state = event; + return 0; +} + +struct snd_soc_codec_dai wm8974_dai = { + .name = "WM8974 HiFi", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = 1, + }, + .capture = { + .stream_name = "Capture", + .channels_min = 1, + .channels_max = 1, + }, + .config_sysclk = wm8974_config_sysclk, + .digital_mute = wm8974_mute, + .ops = { + .prepare = wm8974_pcm_prepare, + .hw_free = wm8974_hw_free, + }, + .caps = { + .num_modes = ARRAY_SIZE(wm8974_modes), + .mode = wm8974_modes, + }, +}; +EXPORT_SYMBOL_GPL(wm8974_dai); + +static int wm8974_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm8974_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm8974_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i; + u8 data[2]; + u16 *cache = codec->reg_cache; + + /* Sync reg_cache with the hardware */ + for (i = 0; i < ARRAY_SIZE(wm8974_reg); i++) { + data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); + data[1] = cache[i] & 0x00ff; + codec->hw_write(codec->control_data, data, 2); + } + wm8974_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + wm8974_dapm_event(codec, codec->suspend_dapm_state); + return 0; +} + +/* + * initialise the WM8974 driver + * register the mixer and dsp interfaces with the kernel + */ +static int wm8974_init(struct snd_soc_device *socdev) +{ + struct snd_soc_codec *codec = socdev->codec; + int ret = 0; + + codec->name = "WM8974"; + codec->owner = THIS_MODULE; + codec->read = wm8974_read_reg_cache; + codec->write = wm8974_write; + codec->dapm_event = wm8974_dapm_event; + codec->dai = &wm8974_dai; + codec->num_dai = 1; + codec->reg_cache_size = ARRAY_SIZE(wm8974_reg); + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm8974_reg), GFP_KERNEL)) == NULL) + return -ENOMEM; + memcpy(codec->reg_cache, wm8974_reg, sizeof(u16) * ARRAY_SIZE(wm8974_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8974_reg); + + wm8974_reset(codec); + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) { + kfree(codec->reg_cache); + return ret; + } + + /* power on device */ + wm8974_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + wm8974_add_controls(codec); + wm8974_add_widgets(codec); + if((ret = snd_soc_register_card(socdev)) < 0) { + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); + } + + return ret; +} + +static struct snd_soc_device *wm8974_socdev; + +#ifdef CONFIG_I2C + +/* + * WM8974 2 wire address is 0x1a + */ +#define I2C_DRIVERID_WM8974 0xfefe /* liam - need a proper id */ + +static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; + +/* Magic definition of all other variables and things */ +I2C_CLIENT_INSMOD; + +static struct i2c_driver wm8974_i2c_driver; +static struct i2c_client client_template; + +/* If the i2c layer weren't so broken, we could pass this kind of data + around */ + +static int wm8974_codec_probe(struct i2c_adapter *adap, int addr, int kind) +{ + struct snd_soc_device *socdev = wm8974_socdev; + struct wm8974_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec = socdev->codec; + struct i2c_client *i2c; + int ret; + + if (addr != setup->i2c_address) + return -ENODEV; + + client_template.adapter = adap; + client_template.addr = addr; + + if ((i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL)) == NULL){ + kfree(codec); + return -ENOMEM; + } + memcpy(i2c, &client_template, sizeof(struct i2c_client)); + i2c_set_clientdata(i2c, codec); + codec->control_data = i2c; + + if((ret = i2c_attach_client(i2c)) < 0) { + err("failed to attach codec at addr %x\n", addr); + goto err; + } + + if((ret = wm8974_init(socdev)) < 0) { + err("failed to initialise WM8974\n"); + goto err; + } + return ret; + +err: + kfree(codec); + kfree(i2c); + return ret; +} + +static int wm8974_i2c_detach(struct i2c_client *client) +{ + struct snd_soc_codec *codec = i2c_get_clientdata(client); + i2c_detach_client(client); + kfree(codec->reg_cache); + kfree(client); + return 0; +} + +static int wm8974_i2c_attach(struct i2c_adapter *adap) +{ + return i2c_probe(adap, &addr_data, wm8974_codec_probe); +} + +/* corgi i2c codec control layer */ +static struct i2c_driver wm8974_i2c_driver = { + .driver = { + .name = "WM8974 I2C Codec", + .owner = THIS_MODULE, + }, + .id = I2C_DRIVERID_WM8974, + .attach_adapter = wm8974_i2c_attach, + .detach_client = wm8974_i2c_detach, + .command = NULL, +}; + +static struct i2c_client client_template = { + .name = "WM8974", + .driver = &wm8974_i2c_driver, +}; +#endif + +static int wm8974_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct wm8974_setup_data *setup = socdev->codec_data; + struct snd_soc_codec *codec; + int ret = 0; + + info("WM8974 Audio Codec %s", WM8974_VERSION); + + if ((codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + + socdev->codec = codec; + mutex_init(&codec->mutex); + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + wm8974_socdev = socdev; +#ifdef CONFIG_I2C + if (setup->i2c_address) { + normal_i2c[0] = setup->i2c_address; + codec->hw_write = (hw_write_t)i2c_master_send; + if ((ret = i2c_add_driver(&wm8974_i2c_driver)) != 0) + printk(KERN_ERR "can't add i2c driver"); + } +#else + /* Add other interfaces here */ +#endif + return ret; +} + +/* power down chip */ +static int wm8974_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if (codec->control_data) + wm8974_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + + snd_soc_free_pcms(socdev); + snd_soc_dapm_free(socdev); +#ifdef CONFIG_I2C + i2c_del_driver(&wm8974_i2c_driver); +#endif + kfree(codec); + + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm8974 = { + .probe = wm8974_probe, + .remove = wm8974_remove, + .suspend = wm8974_suspend, + .resume = wm8974_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm8974); + +MODULE_DESCRIPTION("Soc WM8974 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm8974.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm8974.h @@ -0,0 +1,64 @@ +/* + * wm8974.h -- WM8974 Soc Audio driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _WM8974_H +#define _WM8974_H + +/* WM8974 register space */ + +#define WM8974_RESET 0x0 +#define WM8974_POWER1 0x1 +#define WM8974_POWER2 0x2 +#define WM8974_POWER3 0x3 +#define WM8974_IFACE 0x4 +#define WM8974_COMP 0x5 +#define WM8974_CLOCK 0x6 +#define WM8974_ADD 0x7 +#define WM8974_GPIO 0x8 +#define WM8974_DAC 0xa +#define WM8974_DACVOL 0xb +#define WM8974_ADC 0xe +#define WM8974_ADCVOL 0xf +#define WM8974_EQ1 0x12 +#define WM8974_EQ2 0x13 +#define WM8974_EQ3 0x14 +#define WM8974_EQ4 0x15 +#define WM8974_EQ5 0x16 +#define WM8974_DACLIM1 0x18 +#define WM8974_DACLIM2 0x19 +#define WM8974_NOTCH1 0x1b +#define WM8974_NOTCH2 0x1c +#define WM8974_NOTCH3 0x1d +#define WM8974_NOTCH4 0x1e +#define WM8974_ALC1 0x20 +#define WM8974_ALC2 0x21 +#define WM8974_ALC3 0x22 +#define WM8974_NGATE 0x23 +#define WM8974_PLLN 0x24 +#define WM8974_PLLK1 0x25 +#define WM8974_PLLK2 0x26 +#define WM8974_PLLK3 0x27 +#define WM8974_ATTEN 0x28 +#define WM8974_INPUT 0x2c +#define WM8974_INPPGA 0x2d +#define WM8974_ADCBOOST 0x2f +#define WM8974_OUTPUT 0x31 +#define WM8974_SPKMIX 0x32 +#define WM8974_SPKVOL 0x36 +#define WM8974_MONOMIX 0x38 + +#define WM8974_CACHEREGNUM 57 + +struct wm8974_setup_data { + unsigned short i2c_address; +}; + +extern struct snd_soc_codec_dai wm8974_dai; +extern struct snd_soc_codec_device soc_codec_dev_wm8974; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm9712.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm9712.c @@ -0,0 +1,767 @@ +/* + * wm9712.c -- ALSA Soc WM9712 codec support + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 4th Feb 2006 Initial version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WM9712_VERSION "0.3" + +static unsigned int ac97_read(struct snd_soc_codec *codec, + unsigned int reg); +static int ac97_write(struct snd_soc_codec *codec, + unsigned int reg, unsigned int val); + +#define AC97_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define AC97_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000) + +#define AC97_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S18_3LE | SNDRV_PCM_FORMAT_S20_3LE) + +/* may need to expand this */ +static struct snd_soc_dai_mode ac97_modes[] = { + {0, 0, AC97_PCM_FORMATS, AC97_RATES}, +}; + +/* + * WM9712 register cache + */ +static const u16 wm9712_reg[] = { + 0x6174, 0x8000, 0x8000, 0x8000, // 6 + 0xf0f0, 0xaaa0, 0xc008, 0x6808, // e + 0xe808, 0xaaa0, 0xad00, 0x8000, // 16 + 0xe808, 0x3000, 0x8000, 0x0000, // 1e + 0x0000, 0x0000, 0x0000, 0x000f, // 26 + 0x0405, 0x0410, 0xbb80, 0xbb80, // 2e + 0x0000, 0xbb80, 0x0000, 0x0000, // 36 + 0x0000, 0x2000, 0x0000, 0x0000, // 3e + 0x0000, 0x0000, 0x0000, 0x0000, // 46 + 0x0000, 0x0000, 0xf83e, 0xffff, // 4e + 0x0000, 0x0000, 0x0000, 0xf83e, // 56 + 0x0008, 0x0000, 0x0000, 0x0000, // 5e + 0xb032, 0x3e00, 0x0000, 0x0000, // 66 + 0x0000, 0x0000, 0x0000, 0x0000, // 6e + 0x0000, 0x0000, 0x0000, 0x0006, // 76 + 0x0001, 0x0000, 0x574d, 0x4c12, // 7e + 0x0000, 0x0000 // fake hp mixers +}; + +/* faked HP mixers regs */ +#define HPL_MIXER 0x80 +#define HPR_MIXER 0x82 + +static const char* wm9712_alc_select[] = {"None", "Left", "Right", "Stereo"}; +static const char* wm9712_alc_mux[] = {"Stereo", "Left", "Right", "None"}; +static const char* wm9712_out3_src[] = {"Left", "VREF", "Left + Right", "Mono"}; +static const char* wm9712_spk_src[] = {"Speaker Mix", "Headphone Mix"}; +static const char* wm9712_rec_adc[] = {"Stereo", "Left", "Right", "Mute"}; +static const char* wm9712_base[] = {"Linear Control", "Adaptive Boost"}; +static const char* wm9712_rec_gain[] = {"+1.5dB Steps", "+0.75dB Steps"}; +static const char* wm9712_mic[] = {"Mic 1", "Differential", "Mic 2", "Stereo"}; +static const char* wm9712_rec_sel[] = + {"Mic", "NC", "NC", "Speaker Mixer", "Line", "Headphone Mixer", "Phone Mixer", "Phone"}; +static const char* wm9712_ng_type[] = {"Constant Gain", "Mute"}; +static const char* wm9712_diff_sel[] = {"Mic", "Line"}; + +static const struct soc_enum wm9712_enum[] = { +SOC_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9712_alc_select), +SOC_ENUM_SINGLE(AC97_VIDEO, 12, 4, wm9712_alc_mux), +SOC_ENUM_SINGLE(AC97_AUX, 9, 4, wm9712_out3_src), +SOC_ENUM_SINGLE(AC97_AUX, 8, 2, wm9712_spk_src), +SOC_ENUM_SINGLE(AC97_REC_SEL, 12, 4, wm9712_rec_adc), +SOC_ENUM_SINGLE(AC97_MASTER_TONE, 15, 2, wm9712_base), +SOC_ENUM_DOUBLE(AC97_REC_GAIN, 14, 6, 2, wm9712_rec_gain), +SOC_ENUM_SINGLE(AC97_MIC, 5, 4, wm9712_mic), +SOC_ENUM_SINGLE(AC97_REC_SEL, 8, 8, wm9712_rec_sel), +SOC_ENUM_SINGLE(AC97_REC_SEL, 0, 8, wm9712_rec_sel), +SOC_ENUM_SINGLE(AC97_PCI_SVID, 5, 2, wm9712_ng_type), +SOC_ENUM_SINGLE(0x5c, 8, 2, wm9712_diff_sel), +}; + +static const struct snd_kcontrol_new wm9712_snd_ac97_controls[] = { +SOC_DOUBLE("Speaker Playback Volume", AC97_MASTER, 8, 0, 31, 1), +SOC_SINGLE("Speaker Playback Switch", AC97_MASTER, 15, 1, 1), +SOC_DOUBLE("Headphone Playback Volume", AC97_HEADPHONE, 8, 0, 31, 1), +SOC_SINGLE("Headphone Playback Switch", AC97_HEADPHONE,15, 1, 1), + +SOC_SINGLE("Speaker Playback ZC Switch", AC97_MASTER, 7, 1, 0), +SOC_SINGLE("Speaker Playback Invert Switch", AC97_MASTER, 6, 1, 0), +SOC_SINGLE("Headphone Playback ZC Switch", AC97_HEADPHONE, 7, 1, 0), +SOC_SINGLE("Mono Playback ZC Switch", AC97_MASTER_MONO, 7, 1, 0), +SOC_SINGLE("Mono Playback Volume", AC97_MASTER_MONO, 0, 31, 0), + +SOC_SINGLE("ALC Target Volume", AC97_CODEC_CLASS_REV, 12, 15, 0), +SOC_SINGLE("ALC Hold Time", AC97_CODEC_CLASS_REV, 8, 15, 0), +SOC_SINGLE("ALC Decay Time", AC97_CODEC_CLASS_REV, 4, 15, 0), +SOC_SINGLE("ALC Attack Time", AC97_CODEC_CLASS_REV, 0, 15, 0), +SOC_ENUM("ALC Function", wm9712_enum[0]), +SOC_SINGLE("ALC Max Volume", AC97_PCI_SVID, 11, 7, 0), +SOC_SINGLE("ALC ZC Timeout", AC97_PCI_SVID, 9, 3, 1), +SOC_SINGLE("ALC ZC Switch", AC97_PCI_SVID, 8, 1, 0), +SOC_SINGLE("ALC NG Switch", AC97_PCI_SVID, 7, 1, 0), +SOC_ENUM("ALC NG Type", wm9712_enum[10]), +SOC_SINGLE("ALC NG Threshold", AC97_PCI_SVID, 0, 31, 1), + +SOC_SINGLE("Mic Headphone Volume", AC97_VIDEO, 12, 7, 1), +SOC_SINGLE("ALC Headphone Volume", AC97_VIDEO, 7, 7, 1), + +SOC_SINGLE("Out3 Switch", AC97_AUX, 15, 1, 1), +SOC_SINGLE("Out3 ZC Switch", AC97_AUX, 7, 1, 1), +SOC_SINGLE("Out3 Volume", AC97_AUX, 0, 31, 1), + +SOC_SINGLE("PCBeep Bypass Headphone Volume", AC97_PC_BEEP, 12, 7, 1), +SOC_SINGLE("PCBeep Bypass Speaker Volume", AC97_PC_BEEP, 8, 7, 1), +SOC_SINGLE("PCBeep Bypass Phone Volume", AC97_PC_BEEP, 4, 7, 1), + +SOC_SINGLE("Aux Playback Headphone Volume", AC97_CD, 12, 7, 1), +SOC_SINGLE("Aux Playback Speaker Volume", AC97_CD, 8, 7, 1), +SOC_SINGLE("Aux Playback Phone Volume", AC97_CD, 4, 7, 1), + +SOC_SINGLE("Phone Volume", AC97_PHONE, 0, 15, 0), +SOC_DOUBLE("Line Capture Volume", AC97_LINE, 8, 0, 31, 1), + +SOC_SINGLE("Capture 20dB Boost Switch", AC97_REC_SEL, 14, 1, 0), +SOC_SINGLE("Capture to Phone 20dB Boost Switch", AC97_REC_SEL, 11, 1, 1), + +SOC_SINGLE("3D Upper Cut-off Switch", AC97_3D_CONTROL, 5, 1, 1), +SOC_SINGLE("3D Lower Cut-off Switch", AC97_3D_CONTROL, 4, 1, 1), +SOC_SINGLE("3D Playback Volume", AC97_3D_CONTROL, 0, 15, 0), + +SOC_ENUM("Bass Control", wm9712_enum[5]), +SOC_SINGLE("Bass Cut-off Switch", AC97_MASTER_TONE, 12, 1, 1), +SOC_SINGLE("Tone Cut-off Switch", AC97_MASTER_TONE, 4, 1, 1), +SOC_SINGLE("Playback Attenuate (-6dB) Switch", AC97_MASTER_TONE, 6, 1, 0), +SOC_SINGLE("Bass Volume", AC97_MASTER_TONE, 8, 15, 0), +SOC_SINGLE("Treble Volume", AC97_MASTER_TONE, 0, 15, 0), + +SOC_SINGLE("Capture ADC Switch", AC97_REC_GAIN, 15, 1, 1), +SOC_ENUM("Capture Volume Steps", wm9712_enum[6]), +SOC_DOUBLE("Capture Volume", AC97_REC_GAIN, 8, 0, 63, 1), +SOC_SINGLE("Capture ZC Switch", AC97_REC_GAIN, 7, 1, 0), + +SOC_SINGLE("Mic 1 Volume", AC97_MIC, 8, 31, 1), +SOC_SINGLE("Mic 2 Volume", AC97_MIC, 0, 31, 1), +SOC_SINGLE("Mic 20dB Boost Switch", AC97_MIC, 7, 1, 0), +}; + +/* add non dapm controls */ +static int wm9712_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm9712_snd_ac97_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm9712_snd_ac97_controls[i],codec, NULL))) < 0) + return err; + } + return 0; +} + +/* We have to create a fake left and right HP mixers because + * the codec only has a single control that is shared by both channels. + * This makes it impossible to determine the audio path. + */ +static int mixer_event (struct snd_soc_dapm_widget *w, int event) +{ + u16 l, r, beep, line, phone, mic, pcm, aux; + + l = ac97_read(w->codec, HPL_MIXER); + r = ac97_read(w->codec, HPR_MIXER); + beep = ac97_read(w->codec, AC97_PC_BEEP); + mic = ac97_read(w->codec, AC97_VIDEO); + phone = ac97_read(w->codec, AC97_PHONE); + line = ac97_read(w->codec, AC97_LINE); + pcm = ac97_read(w->codec, AC97_PCM); + aux = ac97_read(w->codec, AC97_CD); + + if(l & 0x1 || r & 0x1) + ac97_write(w->codec, AC97_VIDEO, mic & 0x7fff); + else + ac97_write(w->codec, AC97_VIDEO, mic | 0x8000); + + if(l & 0x2 || r & 0x2) + ac97_write(w->codec, AC97_PCM, pcm & 0x7fff); + else + ac97_write(w->codec, AC97_PCM, pcm | 0x8000); + + if(l & 0x4 || r & 0x4) + ac97_write(w->codec, AC97_LINE, line & 0x7fff); + else + ac97_write(w->codec, AC97_LINE, line | 0x8000); + + if(l & 0x8 || r & 0x8) + ac97_write(w->codec, AC97_PHONE, phone & 0x7fff); + else + ac97_write(w->codec, AC97_PHONE, phone | 0x8000); + + if(l & 0x10 || r & 0x10) + ac97_write(w->codec, AC97_CD, aux & 0x7fff); + else + ac97_write(w->codec, AC97_CD, aux | 0x8000); + + if(l & 0x20 || r & 0x20) + ac97_write(w->codec, AC97_PC_BEEP, beep & 0x7fff); + else + ac97_write(w->codec, AC97_PC_BEEP, beep | 0x8000); + + return 0; +} + +/* Left Headphone Mixers */ +static const struct snd_kcontrol_new wm9712_hpl_mixer_controls[] = { + SOC_DAPM_SINGLE("PCBeep Bypass Switch", HPL_MIXER, 5, 1, 0), + SOC_DAPM_SINGLE("Aux Playback Switch", HPL_MIXER, 4, 1, 0), + SOC_DAPM_SINGLE("Phone Bypass Switch", HPL_MIXER, 3, 1, 0), + SOC_DAPM_SINGLE("Line Bypass Switch", HPL_MIXER, 2, 1, 0), + SOC_DAPM_SINGLE("PCM Playback Switch", HPL_MIXER, 1, 1, 0), + SOC_DAPM_SINGLE("Mic Sidetone Switch", HPL_MIXER, 0, 1, 0), +}; + +/* Right Headphone Mixers */ +static const struct snd_kcontrol_new wm9712_hpr_mixer_controls[] = { + SOC_DAPM_SINGLE("PCBeep Bypass Switch", HPR_MIXER, 5, 1, 0), + SOC_DAPM_SINGLE("Aux Playback Switch", HPR_MIXER, 4, 1, 0), + SOC_DAPM_SINGLE("Phone Bypass Switch", HPR_MIXER, 3, 1, 0), + SOC_DAPM_SINGLE("Line Bypass Switch", HPR_MIXER, 2, 1, 0), + SOC_DAPM_SINGLE("PCM Playback Switch", HPR_MIXER, 1, 1, 0), + SOC_DAPM_SINGLE("Mic Sidetone Switch", HPR_MIXER, 0, 1, 0), +}; + +/* Speaker Mixer */ +static const struct snd_kcontrol_new wm9712_speaker_mixer_controls[] = { + SOC_DAPM_SINGLE("PCBeep Bypass Switch", AC97_PC_BEEP, 11, 1, 1), + SOC_DAPM_SINGLE("Aux Playback Switch", AC97_CD, 11, 1, 1), + SOC_DAPM_SINGLE("Phone Bypass Switch", AC97_PHONE, 14, 1, 1), + SOC_DAPM_SINGLE("Line Bypass Switch", AC97_LINE, 14, 1, 1), + SOC_DAPM_SINGLE("PCM Playback Switch", AC97_PCM, 14, 1, 1), +}; + +/* Phone Mixer */ +static const struct snd_kcontrol_new wm9712_phone_mixer_controls[] = { + SOC_DAPM_SINGLE("PCBeep Bypass Switch", AC97_PC_BEEP, 7, 1, 1), + SOC_DAPM_SINGLE("Aux Playback Switch", AC97_CD, 7, 1, 1), + SOC_DAPM_SINGLE("Line Bypass Switch", AC97_LINE, 13, 1, 1), + SOC_DAPM_SINGLE("PCM Playback Switch", AC97_PCM, 13, 1, 1), + SOC_DAPM_SINGLE("Mic 1 Sidetone Switch", AC97_MIC, 14, 1, 1), + SOC_DAPM_SINGLE("Mic 2 Sidetone Switch", AC97_MIC, 13, 1, 1), +}; + +/* ALC headphone mux */ +static const struct snd_kcontrol_new wm9712_alc_mux_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[1]); + +/* out 3 mux */ +static const struct snd_kcontrol_new wm9712_out3_mux_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[2]); + +/* spk mux */ +static const struct snd_kcontrol_new wm9712_spk_mux_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[3]); + +/* Capture to Phone mux */ +static const struct snd_kcontrol_new wm9712_capture_phone_mux_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[4]); + +/* Capture left select */ +static const struct snd_kcontrol_new wm9712_capture_selectl_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[8]); + +/* Capture right select */ +static const struct snd_kcontrol_new wm9712_capture_selectr_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[9]); + +/* Mic select */ +static const struct snd_kcontrol_new wm9712_mic_src_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[7]); + +/* diff select */ +static const struct snd_kcontrol_new wm9712_diff_sel_controls = +SOC_DAPM_ENUM("Route", wm9712_enum[11]); + +static const struct snd_soc_dapm_widget wm9712_dapm_widgets[] = { +SND_SOC_DAPM_MUX("ALC Sidetone Mux", SND_SOC_NOPM, 0, 0, + &wm9712_alc_mux_controls), +SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, + &wm9712_out3_mux_controls), +SND_SOC_DAPM_MUX("Speaker Mux", SND_SOC_NOPM, 0, 0, + &wm9712_spk_mux_controls), +SND_SOC_DAPM_MUX("Capture Phone Mux", SND_SOC_NOPM, 0, 0, + &wm9712_capture_phone_mux_controls), +SND_SOC_DAPM_MUX("Left Capture Select", SND_SOC_NOPM, 0, 0, + &wm9712_capture_selectl_controls), +SND_SOC_DAPM_MUX("Right Capture Select", SND_SOC_NOPM, 0, 0, + &wm9712_capture_selectr_controls), +SND_SOC_DAPM_MUX("Mic Select Source", SND_SOC_NOPM, 0, 0, + &wm9712_mic_src_controls), +SND_SOC_DAPM_MUX("Differential Source", SND_SOC_NOPM, 0, 0, + &wm9712_diff_sel_controls), +SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_MIXER_E("Left HP Mixer", AC97_INT_PAGING, 9, 1, &wm9712_hpl_mixer_controls[0], + ARRAY_SIZE(wm9712_hpl_mixer_controls), mixer_event, SND_SOC_DAPM_POST_REG), +SND_SOC_DAPM_MIXER_E("Right HP Mixer", AC97_INT_PAGING, 8, 1, &wm9712_hpr_mixer_controls[0], + ARRAY_SIZE(wm9712_hpr_mixer_controls), mixer_event, SND_SOC_DAPM_POST_REG), +SND_SOC_DAPM_MIXER("Phone Mixer", AC97_INT_PAGING, 6, 1, &wm9712_phone_mixer_controls[0], + ARRAY_SIZE(wm9712_phone_mixer_controls)), +SND_SOC_DAPM_MIXER("Speaker Mixer", AC97_INT_PAGING, 7, 1, &wm9712_speaker_mixer_controls[0], + ARRAY_SIZE(wm9712_speaker_mixer_controls)), +SND_SOC_DAPM_MIXER("Mono Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", AC97_INT_PAGING, 14, 1), +SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", AC97_INT_PAGING, 13, 1), +SND_SOC_DAPM_DAC("Aux DAC", "Aux Playback", SND_SOC_NOPM, 0, 0), +SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture", AC97_INT_PAGING, 12, 1), +SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture", AC97_INT_PAGING, 11, 1), +SND_SOC_DAPM_PGA("Headphone PGA", AC97_INT_PAGING, 4, 1, NULL, 0), +SND_SOC_DAPM_PGA("Speaker PGA", AC97_INT_PAGING, 3, 1, NULL, 0), +SND_SOC_DAPM_PGA("Out 3 PGA", AC97_INT_PAGING, 5, 1, NULL, 0), +SND_SOC_DAPM_PGA("Line PGA", AC97_INT_PAGING, 2, 1, NULL, 0), +SND_SOC_DAPM_PGA("Phone PGA", AC97_INT_PAGING, 1, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mic PGA", AC97_INT_PAGING, 0, 1, NULL, 0), +SND_SOC_DAPM_MICBIAS("Mic Bias", AC97_INT_PAGING, 10, 1), +SND_SOC_DAPM_OUTPUT("MONOOUT"), +SND_SOC_DAPM_OUTPUT("HPOUTL"), +SND_SOC_DAPM_OUTPUT("HPOUTR"), +SND_SOC_DAPM_OUTPUT("LOUT2"), +SND_SOC_DAPM_OUTPUT("ROUT2"), +SND_SOC_DAPM_OUTPUT("OUT3"), +SND_SOC_DAPM_INPUT("LINEINL"), +SND_SOC_DAPM_INPUT("LINEINR"), +SND_SOC_DAPM_INPUT("PHONE"), +SND_SOC_DAPM_INPUT("PCBEEP"), +SND_SOC_DAPM_INPUT("MIC1"), +SND_SOC_DAPM_INPUT("MIC2"), +}; + +static const char* audio_map[][3] = { + /* virtual mixer - mixes left & right channels for spk and mono */ + {"AC97 Mixer", NULL, "Left DAC"}, + {"AC97 Mixer", NULL, "Right DAC"}, + + /* Left HP mixer */ + {"Left HP Mixer", "PCBeep Bypass Switch", "PCBEEP"}, + {"Left HP Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Left HP Mixer", "Phone Bypass Switch", "Phone PGA"}, + {"Left HP Mixer", "Line Bypass Switch", "Line PGA"}, + {"Left HP Mixer", "PCM Playback Switch", "Left DAC"}, + {"Left HP Mixer", "Mic Sidetone Switch", "Mic PGA"}, + {"Left HP Mixer", NULL, "ALC Sidetone Mux"}, + //{"Right HP Mixer", NULL, "HP Mixer"}, + + /* Right HP mixer */ + {"Right HP Mixer", "PCBeep Bypass Switch", "PCBEEP"}, + {"Right HP Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Right HP Mixer", "Phone Bypass Switch", "Phone PGA"}, + {"Right HP Mixer", "Line Bypass Switch", "Line PGA"}, + {"Right HP Mixer", "PCM Playback Switch", "Right DAC"}, + {"Right HP Mixer", "Mic Sidetone Switch", "Mic PGA"}, + {"Right HP Mixer", NULL, "ALC Sidetone Mux"}, + + /* speaker mixer */ + {"Speaker Mixer", "PCBeep Bypass Switch", "PCBEEP"}, + {"Speaker Mixer", "Line Bypass Switch", "Line PGA"}, + {"Speaker Mixer", "PCM Playback Switch", "AC97 Mixer"}, + {"Speaker Mixer", "Phone Bypass Switch", "Phone PGA"}, + {"Speaker Mixer", "Aux Playback Switch", "Aux DAC"}, + + /* Phone mixer */ + {"Phone Mixer", "PCBeep Bypass Switch", "PCBEEP"}, + {"Phone Mixer", "Line Bypass Switch", "Line PGA"}, + {"Phone Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Phone Mixer", "PCM Playback Switch", "AC97 Mixer"}, + {"Phone Mixer", "Mic 1 Sidetone Switch", "Mic PGA"}, + {"Phone Mixer", "Mic 2 Sidetone Switch", "Mic PGA"}, + + /* inputs */ + {"Line PGA", NULL, "LINEINL"}, + {"Line PGA", NULL, "LINEINR"}, + {"Phone PGA", NULL, "PHONE"}, + {"Mic PGA", NULL, "MIC1"}, + {"Mic PGA", NULL, "MIC2"}, + + /* left capture selector */ + {"Left Capture Select", "Mic", "MIC1"}, + {"Left Capture Select", "Speaker Mixer", "Speaker Mixer"}, + {"Left Capture Select", "Line", "LINEINL"}, + {"Left Capture Select", "Headphone Mixer", "Left HP Mixer"}, + {"Left Capture Select", "Phone Mixer", "Phone Mixer"}, + {"Left Capture Select", "Phone", "PHONE"}, + + /* right capture selector */ + {"Right Capture Select", "Mic", "MIC2"}, + {"Right Capture Select", "Speaker Mixer", "Speaker Mixer"}, + {"Right Capture Select", "Line", "LINEINR"}, + {"Right Capture Select", "Headphone Mixer", "Right HP Mixer"}, + {"Right Capture Select", "Phone Mixer", "Phone Mixer"}, + {"Right Capture Select", "Phone", "PHONE"}, + + /* ALC Sidetone */ + {"ALC Sidetone Mux", "Stereo", "Left Capture Select"}, + {"ALC Sidetone Mux", "Stereo", "Right Capture Select"}, + {"ALC Sidetone Mux", "Left", "Left Capture Select"}, + {"ALC Sidetone Mux", "Right", "Right Capture Select"}, + + /* ADC's */ + {"Left ADC", NULL, "Left Capture Select"}, + {"Right ADC", NULL, "Right Capture Select"}, + + /* outputs */ + {"MONOOUT", NULL, "Phone Mixer"}, + {"HPOUTL", NULL, "Headphone PGA"}, + {"Headphone PGA", NULL, "Left HP Mixer"}, + {"HPOUTR", NULL, "Headphone PGA"}, + {"Headphone PGA", NULL, "Right HP Mixer"}, + + /* mono hp mixer */ + {"Mono HP Mixer", NULL, "Left HP Mixer"}, + {"Mono HP Mixer", NULL, "Right HP Mixer"}, + + /* Out3 Mux */ + {"Out3 Mux", "Left", "Left HP Mixer"}, + {"Out3 Mux", "Mono", "Phone Mixer"}, + {"Out3 Mux", "Left + Right", "Mono HP Mixer"}, + {"Out 3 PGA", NULL, "Out3 Mux"}, + {"OUT3", NULL, "Out 3 PGA"}, + + /* speaker Mux */ + {"Speaker Mux", "Speaker Mix", "Speaker Mixer"}, + {"Speaker Mux", "Headphone Mix", "Mono HP Mixer"}, + {"Speaker PGA", NULL, "Speaker Mux"}, + {"LOUT2", NULL, "Speaker PGA"}, + {"ROUT2", NULL, "Speaker PGA"}, + + {NULL, NULL, NULL}, +}; + +static int wm9712_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm9712_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm9712_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +static unsigned int ac97_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + + if (reg == AC97_RESET || reg == AC97_GPIO_STATUS || + reg == AC97_VENDOR_ID1 || reg == AC97_VENDOR_ID2 || + reg == AC97_REC_GAIN) + return soc_ac97_ops.read(codec->ac97, reg); + else { + reg = reg >> 1; + + if(reg > (ARRAY_SIZE(wm9712_reg))) + return -EIO; + + return cache[reg]; + } +} + +static int ac97_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int val) +{ + u16 *cache = codec->reg_cache; + + soc_ac97_ops.write(codec->ac97, reg, val); + reg = reg >> 1; + if(reg <= (ARRAY_SIZE(wm9712_reg))) + cache[reg] = val; + + return 0; +} + +static int ac97_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + int reg; + u16 vra; + + vra = ac97_read(codec, AC97_EXTENDED_STATUS); + ac97_write(codec, AC97_EXTENDED_STATUS, vra | 0x1); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + reg = AC97_PCM_FRONT_DAC_RATE; + else + reg = AC97_PCM_LR_ADC_RATE; + + return ac97_write(codec, reg, runtime->rate); +} + +static int ac97_aux_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 vra, xsle; + + vra = ac97_read(codec, AC97_EXTENDED_STATUS); + ac97_write(codec, AC97_EXTENDED_STATUS, vra | 0x1); + xsle = ac97_read(codec, AC97_PCI_SID); + ac97_write(codec, AC97_PCI_SID, xsle | 0x8000); + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + return -ENODEV; + + return ac97_write(codec, AC97_PCM_SURR_DAC_RATE, runtime->rate); +} + +struct snd_soc_codec_dai wm9712_dai[] = { +{ + .name = "AC97 HiFi", + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2,}, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2,}, + .ops = { + .prepare = ac97_prepare,}, + .caps = { + .num_modes = ARRAY_SIZE(ac97_modes), + .mode = ac97_modes,}, + }, + { + .name = "AC97 Aux", + .playback = { + .stream_name = "Aux Playback", + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .prepare = ac97_aux_prepare,}, + .caps = { + .num_modes = ARRAY_SIZE(ac97_modes), + .mode = ac97_modes,}, + }, +}; +EXPORT_SYMBOL_GPL(wm9712_dai); + +static int wm9712_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 reg; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* liam - maybe enable thermal shutdown */ + reg = ac97_read(codec, AC97_EXTENDED_MID) & 0xdfff; + ac97_write(codec, AC97_EXTENDED_MID, reg); + //reg = ac97_read(codec, AC97_POWERDOWN) & 0xdfff; + //ac97_write(codec, AC97_POWERDOWN, reg); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* enable master bias and vmid */ + reg = ac97_read(codec, AC97_EXTENDED_MID) & 0xbbff; + ac97_write(codec, AC97_EXTENDED_MID, reg); + ac97_write(codec, AC97_POWERDOWN, 0x0000); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* disable everything including AC link */ + ac97_write(codec, AC97_EXTENDED_MID, 0xffff); + ac97_write(codec, AC97_EXTENDED_MSTATUS, 0xffff); + ac97_write(codec, AC97_POWERDOWN, 0xffff); + break; + } + codec->dapm_state = event; + return 0; +} + +static int wm9712_reset(struct snd_soc_codec *codec, int try_warm) +{ + if(try_warm && soc_ac97_ops.warm_reset) { + soc_ac97_ops.warm_reset(codec->ac97); + if(!(ac97_read(codec, 0) & 0x8000)) + return 1; + } + + soc_ac97_ops.reset(codec->ac97); + if(ac97_read(codec, 0) & 0x8000) + goto err; + return 0; + +err: + printk(KERN_ERR "WM9712 AC97 reset failed\n"); + return -EIO; +} + +static int wm9712_soc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + wm9712_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm9712_soc_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + int i, ret; + u16 *cache = codec->reg_cache; + + if((ret = wm9712_reset(codec, 1)) < 0){ + printk(KERN_ERR "could not reset AC97 codec\n"); + return ret; + } + + wm9712_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + if(ret == 0){ + /* Sync reg_cache with the hardware after cold reset */ + for (i = 2; i < ARRAY_SIZE(wm9712_reg) << 1; i+=2) { + if (i == AC97_INT_PAGING || i == AC97_POWERDOWN || + (i > 0x58 && i != 0x5c)) + continue; + soc_ac97_ops.write(codec->ac97, i, cache[i>>1]); + } + } + + if(codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) + wm9712_dapm_event(codec, SNDRV_CTL_POWER_D0); + + return ret; +} + +static int wm9712_soc_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec; + int ret = 0; + + printk(KERN_INFO "WM9711/WM9712 SoC Audio Codec %s\n", WM9712_VERSION); + + if ((socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + codec = socdev->codec; + mutex_init(&codec->mutex); + + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm9712_reg), GFP_KERNEL)) == NULL){ + kfree(codec->ac97); + kfree(socdev->codec); + socdev->codec = NULL; + return -ENOMEM; + } + memcpy(codec->reg_cache, wm9712_reg, sizeof(u16) * ARRAY_SIZE(wm9712_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm9712_reg); + codec->reg_cache_step = 2; + + codec->name = "WM9712"; + codec->owner = THIS_MODULE; + codec->dai = wm9712_dai; + codec->num_dai = ARRAY_SIZE(wm9712_dai); + codec->write = ac97_write; + codec->read = ac97_read; + codec->dapm_event = wm9712_dapm_event; + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + if((ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0)) < 0) + goto err; + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) + goto pcm_err; + + if((ret = wm9712_reset(codec, 0)) < 0) { + printk(KERN_ERR "AC97 link error\n"); + goto reset_err; + } + + /* set alc mux to none */ + ac97_write(codec, AC97_VIDEO, ac97_read(codec, AC97_VIDEO) | 0x3000); + + wm9712_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + wm9712_add_controls(codec); + wm9712_add_widgets(codec); + if ((ret = snd_soc_register_card(socdev)) < 0) + goto reset_err; + + return 0; + +reset_err: + snd_soc_free_pcms(socdev); + +pcm_err: + snd_soc_free_ac97_codec(codec); + +err: + kfree(socdev->codec->reg_cache); + kfree(socdev->codec); + socdev->codec = NULL; + return ret; +} + +static int wm9712_soc_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if(codec == NULL) + return 0; + + snd_soc_dapm_free(socdev); + snd_soc_free_pcms(socdev); + snd_soc_free_ac97_codec(codec); + kfree(codec->reg_cache); + kfree(codec); + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm9712= { + .probe = wm9712_soc_probe, + .remove = wm9712_soc_remove, + .suspend = wm9712_soc_suspend, + .resume = wm9712_soc_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm9712); + +MODULE_DESCRIPTION("Soc WM9711/WM9712 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm9712.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm9712.h @@ -0,0 +1,14 @@ +/* + * wm9712.h -- WM9712 Soc Audio driver + */ + +#ifndef _WM9712_H +#define _WM9712_H + +#define WM9712_DAI_AC97_HIFI 0 +#define WM9712_DAI_AC97_AUX 1 + +extern struct snd_soc_codec_dai wm9712_dai[2]; +extern struct snd_soc_codec_device soc_codec_dev_wm9712; + +#endif Index: linux-2.6-pxa/sound/soc/codecs/wm9713.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm9713.c @@ -0,0 +1,1272 @@ +/* + * wm9713.c -- ALSA Soc WM9713 codec support + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 4th Feb 2006 Initial version. + * + * Features:- + * + * o Support for AC97 Codec, Voice DAC and Aux DAC + * o Support for DAPM + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define WM9713_VERSION "0.9" + +struct wm9713 { + u32 pll; /* current PLL frequency */ + u32 pll_resume; /* PLL resume frequency */ +}; + +static unsigned int ac97_read(struct snd_soc_codec *codec, + unsigned int reg); +static int ac97_write(struct snd_soc_codec *codec, + unsigned int reg, unsigned int val); + +#define AC97_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define AC97_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000) + +#define AC97_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S18_3LE | SNDRV_PCM_FORMAT_S20_3LE) + +/* may need to expand this */ +static struct snd_soc_dai_mode ac97_modes[] = { + {0, 0, AC97_PCM_FORMATS, AC97_RATES}, +}; + +#define WM9713_VOICE_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \ + SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF | \ + SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_IB_IF) + +#define WM9713_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define WM9713_VOICE_FSB \ + (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \ + SND_SOC_FSBD(8) | SND_SOC_FSBD(16)) + +#define WM9713_VOICE_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_32000 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000) + +#define WM9713_VOICE_PCM_FORMATS \ + (SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S20_3LE | \ + SNDRV_PCM_FORMAT_S24_3LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE) + +/* + * Voice modes + */ +static struct snd_soc_dai_mode wm9713_voice_modes[] = { + + /* master modes */ + {WM9713_VOICE_DAIFMT | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS, + SND_SOC_DAITDM_LRDW(0,0), WM9713_VOICE_PCM_FORMATS, WM9713_VOICE_RATES, + WM9713_DIR, SND_SOC_DAI_BFS_DIV, 256, WM9713_VOICE_FSB}, + + /* slave modes */ + {WM9713_VOICE_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), + WM9713_VOICE_PCM_FORMATS, WM9713_VOICE_RATES, WM9713_DIR, + SND_SOC_DAI_BFS_DIV, SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, +}; + +/* + * WM9713 register cache + */ +static const u16 wm9713_reg[] = { + 0x6174, 0x8080, 0x8080, 0x8080, // 6 + 0xc880, 0xe808, 0xe808, 0x0808, // e + 0x00da, 0x8000, 0xd600, 0xaaa0, // 16 + 0xaaa0, 0xaaa0, 0x0000, 0x0000, // 1e + 0x0f0f, 0x0040, 0x0000, 0x7f00, // 26 + 0x0405, 0x0410, 0xbb80, 0xbb80, // 2e + 0x0000, 0xbb80, 0x0000, 0x4523, // 36 + 0x0000, 0x2000, 0xfeff, 0xffff, // 3e + 0x0000, 0x0000, 0x0080, 0x0000, // 46 + 0x0000, 0x0000, 0xfffe, 0xffff, // 4e + 0x0000, 0x0000, 0x0000, 0xfffe, // 56 + 0x4000, 0x0000, 0x0000, 0x0000, // 5e + 0xb032, 0x3e00, 0x0000, 0x0000, // 66 + 0x0000, 0x0000, 0x0000, 0x0000, // 6e + 0x0000, 0x0000, 0x0000, 0x0006, // 76 + 0x0001, 0x0000, 0x574d, 0x4c13, // 7e + 0x0000, 0x0000, 0x0000 // virtual hp & mic mixers +}; + +/* virtual HP mixers regs */ +#define HPL_MIXER 0x80 +#define HPR_MIXER 0x82 +#define MICB_MUX 0x84 + +static const char* wm9713_mic_mixer[] = {"Stereo", "Mic 1", "Mic 2", "Mute"}; +static const char* wm9713_rec_mux[] = {"Stereo", "Left", "Right", "Mute"}; +static const char* wm9713_rec_src[] = + {"Mic 1", "Mic 2", "Line", "Mono In", "Headphone", "Speaker", + "Mono Out", "Zh"}; +static const char* wm9713_rec_gain[] = {"+1.5dB Steps", "+0.75dB Steps"}; +static const char* wm9713_alc_select[] = {"None", "Left", "Right", "Stereo"}; +static const char* wm9713_mono_pga[] = {"Vmid", "Zh", "Mono", "Inv"}; +static const char* wm9713_spk_pga[] = + {"Vmid", "Zh", "Headphone", "Speaker", "Inv", "NC", "NC", "NC"}; +static const char* wm9713_hp_pga[] = {"Vmid", "Zh", "Headphone"}; +static const char* wm9713_out3_pga[] = {"Vmid", "Zh", "Inv 1", "NC"}; +static const char* wm9713_out4_pga[] = {"Vmid", "Zh", "Inv 2", "NC"}; +static const char* wm9713_dac_inv[] = + {"Off", "Mono", "Speaker", "Left Headphone", "Right Headphone", + "Headphone Mono", "NC", "Vmid"}; +static const char* wm9713_bass[] = {"Linear Control", "Adaptive Boost"}; +static const char* wm9713_ng_type[] = {"Constant Gain", "Mute"}; +static const char* wm9713_mic_select[] = {"Mic 1", "Mic 2 A", "Mic 2 B"}; +static const char* wm9713_micb_select[] = {"MPB", "MPA"}; + +static const struct soc_enum wm9713_enum[] = { +SOC_ENUM_SINGLE(AC97_LINE, 3, 4, wm9713_mic_mixer), /* record mic mixer 0 */ +SOC_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux), /* record mux hp 1 */ +SOC_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux), /* record mux mono 2 */ +SOC_ENUM_SINGLE(AC97_VIDEO, 3, 8, wm9713_rec_src), /* record mux left 3 */ +SOC_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src), /* record mux right 4*/ +SOC_ENUM_DOUBLE(AC97_CD, 14, 6, 2, wm9713_rec_gain), /* record step size 5 */ +SOC_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9713_alc_select), /* alc source select 6*/ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 14, 4, wm9713_mono_pga), /* mono input select 7 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 11, 8, wm9713_spk_pga), /* speaker left input select 8 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 8, 8, wm9713_spk_pga), /* speaker right input select 9 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 6, 3, wm9713_hp_pga), /* headphone left input 10 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 4, 3, wm9713_hp_pga), /* headphone right input 11 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 2, 4, wm9713_out3_pga), /* out 3 source 12 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN, 0, 4, wm9713_out4_pga), /* out 4 source 13 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN_MIC, 13, 8, wm9713_dac_inv), /* dac invert 1 14 */ +SOC_ENUM_SINGLE(AC97_REC_GAIN_MIC, 10, 8, wm9713_dac_inv), /* dac invert 2 15 */ +SOC_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 15, 2, wm9713_bass), /* bass control 16 */ +SOC_ENUM_SINGLE(AC97_PCI_SVID, 5, 2, wm9713_ng_type), /* noise gate type 17 */ +SOC_ENUM_SINGLE(AC97_3D_CONTROL, 12, 3, wm9713_mic_select), /* mic selection 18 */ +SOC_ENUM_SINGLE(MICB_MUX, 0, 2, wm9713_micb_select), /* mic selection 19 */ +}; + +static const struct snd_kcontrol_new wm9713_snd_ac97_controls[] = { +SOC_DOUBLE("Speaker Playback Volume", AC97_MASTER, 8, 0, 31, 1), +SOC_DOUBLE("Speaker Playback Switch", AC97_MASTER, 15, 7, 1, 1), +SOC_DOUBLE("Headphone Playback Volume", AC97_HEADPHONE, 8, 0, 31, 1), +SOC_DOUBLE("Headphone Playback Switch", AC97_HEADPHONE,15, 7, 1, 1), +SOC_DOUBLE("Line In Volume", AC97_PC_BEEP, 8, 0, 31, 1), +SOC_DOUBLE("PCM Playback Volume", AC97_PHONE, 8, 0, 31, 1), +SOC_SINGLE("Mic 1 Volume", AC97_MIC, 8, 31, 1), +SOC_SINGLE("Mic 2 Volume", AC97_MIC, 0, 31, 1), + +SOC_SINGLE("Mic Boost (+20dB) Switch", AC97_LINE, 5, 1, 0), +SOC_SINGLE("Mic Headphone Mixer Volume", AC97_LINE, 0, 7, 1), + +SOC_SINGLE("Capture Switch", AC97_CD, 15, 1, 1), +SOC_ENUM("Capture Volume Steps", wm9713_enum[5]), +SOC_DOUBLE("Capture Volume", AC97_CD, 8, 0, 31, 0), +SOC_SINGLE("Capture ZC Switch", AC97_CD, 7, 1, 0), + +SOC_SINGLE("Capture to Headphone Volume", AC97_VIDEO, 11, 7, 1), +SOC_SINGLE("Capture to Mono Boost (+20dB) Switch", AC97_VIDEO, 8, 1, 0), +SOC_SINGLE("Capture ADC Boost (+20dB) Switch", AC97_VIDEO, 6, 1, 0), + +SOC_SINGLE("ALC Target Volume", AC97_CODEC_CLASS_REV, 12, 15, 0), +SOC_SINGLE("ALC Hold Time", AC97_CODEC_CLASS_REV, 8, 15, 0), +SOC_SINGLE("ALC Decay Time ", AC97_CODEC_CLASS_REV, 4, 15, 0), +SOC_SINGLE("ALC Attack Time", AC97_CODEC_CLASS_REV, 0, 15, 0), +SOC_ENUM("ALC Function", wm9713_enum[6]), +SOC_SINGLE("ALC Max Volume", AC97_PCI_SVID, 11, 7, 0), +SOC_SINGLE("ALC ZC Timeout", AC97_PCI_SVID, 9, 3, 0), +SOC_SINGLE("ALC ZC Switch", AC97_PCI_SVID, 8, 1, 0), +SOC_SINGLE("ALC NG Switch", AC97_PCI_SVID, 7, 1, 0), +SOC_ENUM("ALC NG Type", wm9713_enum[17]), +SOC_SINGLE("ALC NG Threshold", AC97_PCI_SVID, 0, 31, 0), + +SOC_DOUBLE("Speaker Playback ZC Switch", AC97_MASTER, 14, 6, 1, 0), +SOC_DOUBLE("Headphone Playback ZC Switch", AC97_HEADPHONE, 14, 6, 1, 0), + +SOC_SINGLE("Out4 Playback Switch", AC97_MASTER_MONO, 15, 1, 1), +SOC_SINGLE("Out4 Playback ZC Switch", AC97_MASTER_MONO, 14, 1, 0), +SOC_SINGLE("Out4 Playback Volume", AC97_MASTER_MONO, 8, 63, 1), + +SOC_SINGLE("Out3 Playback Switch", AC97_MASTER_MONO, 7, 1, 1), +SOC_SINGLE("Out3 Playback ZC Switch", AC97_MASTER_MONO, 6, 1, 0), +SOC_SINGLE("Out3 Playback Volume", AC97_MASTER_MONO, 0, 63, 1), + +SOC_SINGLE("Mono Capture Volume", AC97_MASTER_TONE, 8, 31, 1), +SOC_SINGLE("Mono Playback Switch", AC97_MASTER_TONE, 7, 1, 1), +SOC_SINGLE("Mono Playback ZC Switch", AC97_MASTER_TONE, 6, 1, 0), +SOC_SINGLE("Mono Playback Volume", AC97_MASTER_TONE, 0, 31, 1), + +SOC_SINGLE("PC Beep Playback Headphone Volume", AC97_AUX, 12, 7, 1), +SOC_SINGLE("PC Beep Playback Speaker Volume", AC97_AUX, 8, 7, 1), +SOC_SINGLE("PC Beep Playback Mono Volume", AC97_AUX, 4, 7, 1), + +SOC_SINGLE("Voice Playback Headphone Volume", AC97_PCM, 12, 7, 1), +SOC_SINGLE("Voice Playback Master Volume", AC97_PCM, 8, 7, 1), +SOC_SINGLE("Voice Playback Mono Volume", AC97_PCM, 4, 7, 1), + +SOC_SINGLE("Aux Playback Headphone Volume", AC97_REC_SEL, 12, 7, 1), +SOC_SINGLE("Aux Playback Master Volume", AC97_REC_SEL, 8, 7, 1), +SOC_SINGLE("Aux Playback Mono Volume", AC97_REC_SEL, 4, 7, 1), + +SOC_ENUM("Bass Control", wm9713_enum[16]), +SOC_SINGLE("Bass Cut-off Switch", AC97_GENERAL_PURPOSE, 12, 1, 1), +SOC_SINGLE("Tone Cut-off Switch", AC97_GENERAL_PURPOSE, 4, 1, 1), +SOC_SINGLE("Playback Attenuate (-6dB) Switch", AC97_GENERAL_PURPOSE, 6, 1, 0), +SOC_SINGLE("Bass Volume", AC97_GENERAL_PURPOSE, 8, 15, 1), +SOC_SINGLE("Tone Volume", AC97_GENERAL_PURPOSE, 0, 15, 1), + +SOC_SINGLE("3D Upper Cut-off Switch", AC97_REC_GAIN_MIC, 5, 1, 0), +SOC_SINGLE("3D Lower Cut-off Switch", AC97_REC_GAIN_MIC, 4, 1, 0), +SOC_SINGLE("3D Depth", AC97_REC_GAIN_MIC, 0, 15, 1), +}; + +/* add non dapm controls */ +static int wm9713_add_controls(struct snd_soc_codec *codec) +{ + int err, i; + + for (i = 0; i < ARRAY_SIZE(wm9713_snd_ac97_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm9713_snd_ac97_controls[i],codec, NULL))) < 0) + return err; + } + return 0; +} + +/* We have to create a fake left and right HP mixers because + * the codec only has a single control that is shared by both channels. + * This makes it impossible to determine the audio path. + */ +static int mixer_event (struct snd_soc_dapm_widget *w, int event) +{ + u16 l, r, beep, tone, phone, rec, pcm, aux; + + l = ac97_read(w->codec, HPL_MIXER); + r = ac97_read(w->codec, HPR_MIXER); + beep = ac97_read(w->codec, AC97_PC_BEEP); + tone = ac97_read(w->codec, AC97_MASTER_TONE); + phone = ac97_read(w->codec, AC97_PHONE); + rec = ac97_read(w->codec, AC97_REC_SEL); + pcm = ac97_read(w->codec, AC97_PCM); + aux = ac97_read(w->codec, AC97_AUX); + + if (event & SND_SOC_DAPM_PRE_REG) + return 0; + if(l & 0x1 || r & 0x1) + ac97_write(w->codec, AC97_PC_BEEP, beep & 0x7fff); + else + ac97_write(w->codec, AC97_PC_BEEP, beep | 0x8000); + + if(l & 0x2 || r & 0x2) + ac97_write(w->codec, AC97_MASTER_TONE, tone & 0x7fff); + else + ac97_write(w->codec, AC97_MASTER_TONE, tone | 0x8000); + + if(l & 0x4 || r & 0x4) + ac97_write(w->codec, AC97_PHONE, phone & 0x7fff); + else + ac97_write(w->codec, AC97_PHONE, phone | 0x8000); + + if(l & 0x8 || r & 0x8) + ac97_write(w->codec, AC97_REC_SEL, rec & 0x7fff); + else + ac97_write(w->codec, AC97_REC_SEL, rec | 0x8000); + + if(l & 0x10 || r & 0x10) + ac97_write(w->codec, AC97_PCM, pcm & 0x7fff); + else + ac97_write(w->codec, AC97_PCM, pcm | 0x8000); + + if(l & 0x20 || r & 0x20) + ac97_write(w->codec, AC97_AUX, aux & 0x7fff); + else + ac97_write(w->codec, AC97_AUX, aux | 0x8000); + + return 0; +} + +/* Left Headphone Mixers */ +static const struct snd_kcontrol_new wm9713_hpl_mixer_controls[] = { +SOC_DAPM_SINGLE("PC Beep Playback Switch", HPL_MIXER, 5, 1, 0), +SOC_DAPM_SINGLE("Voice Playback Switch", HPL_MIXER, 4, 1, 0), +SOC_DAPM_SINGLE("Aux Playback Switch", HPL_MIXER, 3, 1, 0), +SOC_DAPM_SINGLE("PCM Playback Switch", HPL_MIXER, 2, 1, 0), +SOC_DAPM_SINGLE("MonoIn Playback Switch", HPL_MIXER, 1, 1, 0), +SOC_DAPM_SINGLE("Bypass Playback Switch", HPL_MIXER, 0, 1, 0), +}; + +/* Right Headphone Mixers */ +static const struct snd_kcontrol_new wm9713_hpr_mixer_controls[] = { +SOC_DAPM_SINGLE("PC Beep Playback Switch", HPR_MIXER, 5, 1, 0), +SOC_DAPM_SINGLE("Voice Playback Switch", HPR_MIXER, 4, 1, 0), +SOC_DAPM_SINGLE("Aux Playback Switch", HPR_MIXER, 3, 1, 0), +SOC_DAPM_SINGLE("PCM Playback Switch", HPR_MIXER, 2, 1, 0), +SOC_DAPM_SINGLE("MonoIn Playback Switch", HPR_MIXER, 1, 1, 0), +SOC_DAPM_SINGLE("Bypass Playback Switch", HPR_MIXER, 0, 1, 0), +}; + +/* headphone capture mux */ +static const struct snd_kcontrol_new wm9713_hp_rec_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[1]); + +/* headphone mic mux */ +static const struct snd_kcontrol_new wm9713_hp_mic_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[0]); + +/* Speaker Mixer */ +static const struct snd_kcontrol_new wm9713_speaker_mixer_controls[] = { +SOC_DAPM_SINGLE("PC Beep Playback Switch", AC97_AUX, 11, 1, 1), +SOC_DAPM_SINGLE("Voice Playback Switch", AC97_PCM, 11, 1, 1), +SOC_DAPM_SINGLE("Aux Playback Switch", AC97_REC_SEL, 11, 1, 1), +SOC_DAPM_SINGLE("PCM Playback Switch", AC97_PHONE, 14, 1, 1), +SOC_DAPM_SINGLE("MonoIn Playback Switch", AC97_MASTER_TONE, 14, 1, 1), +SOC_DAPM_SINGLE("Bypass Playback Switch", AC97_PC_BEEP, 14, 1, 1), +}; + +/* Mono Mixer */ +static const struct snd_kcontrol_new wm9713_mono_mixer_controls[] = { +SOC_DAPM_SINGLE("PC Beep Playback Switch", AC97_AUX, 7, 1, 1), +SOC_DAPM_SINGLE("Voice Playback Switch", AC97_PCM, 7, 1, 1), +SOC_DAPM_SINGLE("Aux Playback Switch", AC97_REC_SEL, 7, 1, 1), +SOC_DAPM_SINGLE("PCM Playback Switch", AC97_PHONE, 13, 1, 1), +SOC_DAPM_SINGLE("MonoIn Playback Switch", AC97_MASTER_TONE, 13, 1, 1), +SOC_DAPM_SINGLE("Bypass Playback Switch", AC97_PC_BEEP, 13, 1, 1), +SOC_DAPM_SINGLE("Mic 1 Sidetone Switch", AC97_LINE, 7, 1, 1), +SOC_DAPM_SINGLE("Mic 2 Sidetone Switch", AC97_LINE, 6, 1, 1), +}; + +/* mono mic mux */ +static const struct snd_kcontrol_new wm9713_mono_mic_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[2]); + +/* mono output mux */ +static const struct snd_kcontrol_new wm9713_mono_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[7]); + +/* speaker left output mux */ +static const struct snd_kcontrol_new wm9713_hp_spkl_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[8]); + +/* speaker right output mux */ +static const struct snd_kcontrol_new wm9713_hp_spkr_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[9]); + +/* headphone left output mux */ +static const struct snd_kcontrol_new wm9713_hpl_out_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[10]); + +/* headphone right output mux */ +static const struct snd_kcontrol_new wm9713_hpr_out_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[11]); + +/* Out3 mux */ +static const struct snd_kcontrol_new wm9713_out3_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[12]); + +/* Out4 mux */ +static const struct snd_kcontrol_new wm9713_out4_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[13]); + +/* DAC inv mux 1 */ +static const struct snd_kcontrol_new wm9713_dac_inv1_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[14]); + +/* DAC inv mux 2 */ +static const struct snd_kcontrol_new wm9713_dac_inv2_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[15]); + +/* Capture source left */ +static const struct snd_kcontrol_new wm9713_rec_srcl_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[3]); + +/* Capture source right */ +static const struct snd_kcontrol_new wm9713_rec_srcr_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[4]); + +/* mic source */ +static const struct snd_kcontrol_new wm9713_mic_sel_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[18]); + +/* mic source B virtual control */ +static const struct snd_kcontrol_new wm9713_micb_sel_mux_controls = +SOC_DAPM_ENUM("Route", wm9713_enum[19]); + +static const struct snd_soc_dapm_widget wm9713_dapm_widgets[] = { +SND_SOC_DAPM_MUX("Capture Headphone Mux", SND_SOC_NOPM, 0, 0, + &wm9713_hp_rec_mux_controls), +SND_SOC_DAPM_MUX("Sidetone Mux", SND_SOC_NOPM, 0, 0, + &wm9713_hp_mic_mux_controls), +SND_SOC_DAPM_MUX("Capture Mono Mux", SND_SOC_NOPM, 0, 0, + &wm9713_mono_mic_mux_controls), +SND_SOC_DAPM_MUX("Mono Out Mux", SND_SOC_NOPM, 0, 0, + &wm9713_mono_mux_controls), +SND_SOC_DAPM_MUX("Left Speaker Out Mux", SND_SOC_NOPM, 0, 0, + &wm9713_hp_spkl_mux_controls), +SND_SOC_DAPM_MUX("Right Speaker Out Mux", SND_SOC_NOPM, 0, 0, + &wm9713_hp_spkr_mux_controls), +SND_SOC_DAPM_MUX("Left Headphone Out Mux", SND_SOC_NOPM, 0, 0, + &wm9713_hpl_out_mux_controls), +SND_SOC_DAPM_MUX("Right Headphone Out Mux", SND_SOC_NOPM, 0, 0, + &wm9713_hpr_out_mux_controls), +SND_SOC_DAPM_MUX("Out 3 Mux", SND_SOC_NOPM, 0, 0, + &wm9713_out3_mux_controls), +SND_SOC_DAPM_MUX("Out 4 Mux", SND_SOC_NOPM, 0, 0, + &wm9713_out4_mux_controls), +SND_SOC_DAPM_MUX("DAC Inv Mux 1", SND_SOC_NOPM, 0, 0, + &wm9713_dac_inv1_mux_controls), +SND_SOC_DAPM_MUX("DAC Inv Mux 2", SND_SOC_NOPM, 0, 0, + &wm9713_dac_inv2_mux_controls), +SND_SOC_DAPM_MUX("Left Capture Source", SND_SOC_NOPM, 0, 0, + &wm9713_rec_srcl_mux_controls), +SND_SOC_DAPM_MUX("Right Capture Source", SND_SOC_NOPM, 0, 0, + &wm9713_rec_srcr_mux_controls), +SND_SOC_DAPM_MUX("Mic A Source", SND_SOC_NOPM, 0, 0, + &wm9713_mic_sel_mux_controls ), +SND_SOC_DAPM_MUX("Mic B Source", SND_SOC_NOPM, 0, 0, + &wm9713_micb_sel_mux_controls ), +SND_SOC_DAPM_MIXER_E("Left HP Mixer", AC97_EXTENDED_MID, 3, 1, &wm9713_hpl_mixer_controls[0], + ARRAY_SIZE(wm9713_hpl_mixer_controls), mixer_event, SND_SOC_DAPM_POST_REG | SND_SOC_DAPM_PRE_REG), +SND_SOC_DAPM_MIXER_E("Right HP Mixer", AC97_EXTENDED_MID, 2, 1, &wm9713_hpr_mixer_controls[0], + ARRAY_SIZE(wm9713_hpr_mixer_controls), mixer_event, SND_SOC_DAPM_POST_REG | SND_SOC_DAPM_PRE_REG), +SND_SOC_DAPM_MIXER("Mono Mixer", AC97_EXTENDED_MID, 0, 1, + &wm9713_mono_mixer_controls[0], ARRAY_SIZE(wm9713_mono_mixer_controls)), +SND_SOC_DAPM_MIXER("Speaker Mixer", AC97_EXTENDED_MID, 1, 1, + &wm9713_speaker_mixer_controls[0], ARRAY_SIZE(wm9713_speaker_mixer_controls)), +SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", AC97_EXTENDED_MID, 7, 1), +SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", AC97_EXTENDED_MID, 6, 1), +SND_SOC_DAPM_MIXER("AC97 Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), +SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", AC97_EXTENDED_MID, 12, 1), +SND_SOC_DAPM_DAC("Aux DAC", "Aux Playback", AC97_EXTENDED_MID, 11, 1), +SND_SOC_DAPM_ADC("Left ADC", "Left HiFi Capture", AC97_EXTENDED_MID, 5, 1), +SND_SOC_DAPM_ADC("Right ADC", "Right HiFi Capture", AC97_EXTENDED_MID, 4, 1), +SND_SOC_DAPM_PGA("Left Headphone", AC97_EXTENDED_MSTATUS, 10, 1, NULL, 0), +SND_SOC_DAPM_PGA("Right Headphone", AC97_EXTENDED_MSTATUS, 9, 1, NULL, 0), +SND_SOC_DAPM_PGA("Left Speaker", AC97_EXTENDED_MSTATUS, 8, 1, NULL, 0), +SND_SOC_DAPM_PGA("Right Speaker", AC97_EXTENDED_MSTATUS, 7, 1, NULL, 0), +SND_SOC_DAPM_PGA("Out 3", AC97_EXTENDED_MSTATUS, 11, 1, NULL, 0), +SND_SOC_DAPM_PGA("Out 4", AC97_EXTENDED_MSTATUS, 12, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mono Out", AC97_EXTENDED_MSTATUS, 13, 1, NULL, 0), +SND_SOC_DAPM_PGA("Left Line In", AC97_EXTENDED_MSTATUS, 6, 1, NULL, 0), +SND_SOC_DAPM_PGA("Right Line In", AC97_EXTENDED_MSTATUS, 5, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mono In", AC97_EXTENDED_MSTATUS, 4, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mic A PGA", AC97_EXTENDED_MSTATUS, 3, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mic B PGA", AC97_EXTENDED_MSTATUS, 2, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mic A Pre Amp", AC97_EXTENDED_MSTATUS, 1, 1, NULL, 0), +SND_SOC_DAPM_PGA("Mic B Pre Amp", AC97_EXTENDED_MSTATUS, 0, 1, NULL, 0), +SND_SOC_DAPM_MICBIAS("Mic Bias", AC97_EXTENDED_MSTATUS, 14, 1), +SND_SOC_DAPM_OUTPUT("MONO"), +SND_SOC_DAPM_OUTPUT("HPL"), +SND_SOC_DAPM_OUTPUT("HPR"), +SND_SOC_DAPM_OUTPUT("SPKL"), +SND_SOC_DAPM_OUTPUT("SPKR"), +SND_SOC_DAPM_OUTPUT("OUT3"), +SND_SOC_DAPM_OUTPUT("OUT4"), +SND_SOC_DAPM_INPUT("LINEL"), +SND_SOC_DAPM_INPUT("LINER"), +SND_SOC_DAPM_INPUT("MONOIN"), +SND_SOC_DAPM_INPUT("PCBEEP"), +SND_SOC_DAPM_INPUT("MIC1"), +SND_SOC_DAPM_INPUT("MIC2A"), +SND_SOC_DAPM_INPUT("MIC2B"), +}; + +static const char* audio_map[][3] = { + /* left HP mixer */ + {"Left HP Mixer", "PC Beep Playback Switch", "PCBEEP"}, + {"Left HP Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Left HP Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Left HP Mixer", "Bypass Playback Switch", "Left Line In"}, + {"Left HP Mixer", "PCM Playback Switch", "Left DAC"}, + {"Left HP Mixer", "MonoIn Playback Switch", "Mono In"}, + {"Left HP Mixer", NULL, "Capture Headphone Mux"}, + + /* right HP mixer */ + {"Right HP Mixer", "PC Beep Playback Switch", "PCBEEP"}, + {"Right HP Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Right HP Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Right HP Mixer", "Bypass Playback Switch", "Right Line In"}, + {"Right HP Mixer", "PCM Playback Switch", "Right DAC"}, + {"Right HP Mixer", "MonoIn Playback Switch", "Mono In"}, + {"Right HP Mixer", NULL, "Capture Headphone Mux"}, + + /* virtual mixer - mixes left & right channels for spk and mono */ + {"AC97 Mixer", NULL, "Left DAC"}, + {"AC97 Mixer", NULL, "Right DAC"}, + {"Line Mixer", NULL, "Right Line In"}, + {"Line Mixer", NULL, "Left Line In"}, + + /* speaker mixer */ + {"Speaker Mixer", "PC Beep Playback Switch", "PCBEEP"}, + {"Speaker Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Speaker Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Speaker Mixer", "Bypass Playback Switch", "Line Mixer"}, + {"Speaker Mixer", "PCM Playback Switch", "AC97 Mixer"}, + {"Speaker Mixer", "MonoIn Playback Switch", "Mono In"}, + + /* mono mixer */ + {"Mono Mixer", "PC Beep Playback Switch", "PCBEEP"}, + {"Mono Mixer", "Voice Playback Switch", "Voice DAC"}, + {"Mono Mixer", "Aux Playback Switch", "Aux DAC"}, + {"Mono Mixer", "Bypass Playback Switch", "Line Mixer"}, + {"Mono Mixer", "PCM Playback Switch", "AC97 Mixer"}, + {"Mono Mixer", NULL, "Capture Mono Mux"}, + + /* DAC inv mux 1 */ + {"DAC Inv Mux 1", "Mono", "Mono Mixer"}, + {"DAC Inv Mux 1", "Speaker", "Speaker Mixer"}, + {"DAC Inv Mux 1", "Left Headphone", "Left HP Mixer"}, + {"DAC Inv Mux 1", "Right Headphone", "Right HP Mixer"}, + {"DAC Inv Mux 1", "Headphone Mono", "Left HP Mixer"}, + {"DAC Inv Mux 1", "Headphone Mono", "Right HP Mixer"}, + + /* DAC inv mux 2 */ + {"DAC Inv Mux 2", "Mono", "Mono Mixer"}, + {"DAC Inv Mux 2", "Speaker", "Speaker Mixer"}, + {"DAC Inv Mux 2", "Left Headphone", "Left HP Mixer"}, + {"DAC Inv Mux 2", "Right Headphone", "Right HP Mixer"}, + {"DAC Inv Mux 2", "Headphone Mono", "Left HP Mixer"}, + {"DAC Inv Mux 2", "Headphone Mono", "Right HP Mixer"}, + + /* headphone left mux */ + {"Left Headphone Out Mux", "Headphone", "Left HP Mixer"}, + + /* headphone right mux */ + {"Right Headphone Out Mux", "Headphone", "Right HP Mixer"}, + + /* speaker left mux */ + {"Left Speaker Out Mux", "Headphone", "Left HP Mixer"}, + {"Left Speaker Out Mux", "Speaker", "Speaker Mixer"}, + {"Left Speaker Out Mux", "Inv", "DAC Inv Mux 1"}, + + /* speaker right mux */ + {"Right Speaker Out Mux", "Headphone", "Right HP Mixer"}, + {"Right Speaker Out Mux", "Speaker", "Speaker Mixer"}, + {"Right Speaker Out Mux", "Inv", "DAC Inv Mux 2"}, + + /* mono mux */ + {"Mono Out Mux", "Mono", "Mono Mixer"}, + {"Mono Out Mux", "Inv", "DAC Inv Mux 1"}, + + /* out 3 mux */ + {"Out 3 Mux", "Inv 1", "DAC Inv Mux 1"}, + + /* out 4 mux */ + {"Out 4 Mux", "Inv 2", "DAC Inv Mux 2"}, + + /* output pga */ + {"HPL", NULL, "Left Headphone"}, + {"Left Headphone", NULL, "Left Headphone Out Mux"}, + {"HPR", NULL, "Right Headphone"}, + {"Right Headphone", NULL, "Right Headphone Out Mux"}, + {"OUT3", NULL, "Out 3"}, + {"Out 3", NULL, "Out 3 Mux"}, + {"OUT4", NULL, "Out 4"}, + {"Out 4", NULL, "Out 4 Mux"}, + {"SPKL", NULL, "Left Speaker"}, + {"Left Speaker", NULL, "Left Speaker Out Mux"}, + {"SPKR", NULL, "Right Speaker"}, + {"Right Speaker", NULL, "Right Speaker Out Mux"}, + {"MONO", NULL, "Mono Out"}, + {"Mono Out", NULL, "Mono Out Mux"}, + + /* input pga */ + {"Left Line In", NULL, "LINEL"}, + {"Right Line In", NULL, "LINER"}, + {"Mono In", NULL, "MONOIN"}, + {"Mic A PGA", NULL, "Mic A Pre Amp"}, + {"Mic B PGA", NULL, "Mic B Pre Amp"}, + + /* left capture select */ + {"Left Capture Source", "Mic 1", "Mic A Pre Amp"}, + {"Left Capture Source", "Mic 2", "Mic B Pre Amp"}, + {"Left Capture Source", "Line", "LINEL"}, + {"Left Capture Source", "Mono In", "MONOIN"}, + {"Left Capture Source", "Headphone", "Left HP Mixer"}, + {"Left Capture Source", "Speaker", "Speaker Mixer"}, + {"Left Capture Source", "Mono Out", "Mono Mixer"}, + + /* right capture select */ + {"Right Capture Source", "Mic 1", "Mic A Pre Amp"}, + {"Right Capture Source", "Mic 2", "Mic B Pre Amp"}, + {"Right Capture Source", "Line", "LINER"}, + {"Right Capture Source", "Mono In", "MONOIN"}, + {"Right Capture Source", "Headphone", "Right HP Mixer"}, + {"Right Capture Source", "Speaker", "Speaker Mixer"}, + {"Right Capture Source", "Mono Out", "Mono Mixer"}, + + /* left ADC */ + {"Left ADC", NULL, "Left Capture Source"}, + + /* right ADC */ + {"Right ADC", NULL, "Right Capture Source"}, + + /* mic */ + {"Mic A Pre Amp", NULL, "Mic A Source"}, + {"Mic A Source", "Mic 1", "MIC1"}, + {"Mic A Source", "Mic 2 A", "MIC2A"}, + {"Mic A Source", "Mic 2 B", "Mic B Source"}, + {"Mic B Pre Amp", "MPB", "Mic B Source"}, + {"Mic B Source", NULL, "MIC2B"}, + + /* headphone capture */ + {"Capture Headphone Mux", "Stereo", "Left Capture Source"}, + {"Capture Headphone Mux", "Stereo", "Right Capture Source"}, + {"Capture Headphone Mux", "Left", "Left Capture Source"}, + {"Capture Headphone Mux", "Right", "Right Capture Source"}, + + /* mono capture */ + {"Capture Mono Mux", "Stereo", "Left Capture Source"}, + {"Capture Mono Mux", "Stereo", "Right Capture Source"}, + {"Capture Mono Mux", "Left", "Left Capture Source"}, + {"Capture Mono Mux", "Right", "Right Capture Source"}, + + {NULL, NULL, NULL}, + +}; + +static int wm9713_add_widgets(struct snd_soc_codec *codec) +{ + int i; + + for(i = 0; i < ARRAY_SIZE(wm9713_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm9713_dapm_widgets[i]); + } + + /* set up audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_new_widgets(codec); + return 0; +} + +static unsigned int ac97_read(struct snd_soc_codec *codec, + unsigned int reg) +{ + u16 *cache = codec->reg_cache; + + if (reg == AC97_RESET || reg == AC97_GPIO_STATUS || + reg == AC97_VENDOR_ID1 || reg == AC97_VENDOR_ID2 || + reg == AC97_CD) + return soc_ac97_ops.read(codec->ac97, reg); + else { + reg = reg >> 1; + + if(reg > (ARRAY_SIZE(wm9713_reg))) + return -EIO; + + return cache[reg]; + } +} + +static int ac97_write(struct snd_soc_codec *codec, unsigned int reg, + unsigned int val) +{ + u16 *cache = codec->reg_cache; + + soc_ac97_ops.write(codec->ac97, reg, val); + reg = reg >> 1; + if(reg <= (ARRAY_SIZE(wm9713_reg))) + cache[reg] = val; + + return 0; +} + +struct pll_ { + unsigned int in_hz; + unsigned int lf:1; /* allows low frequency use */ + unsigned int sdm:1; /* allows fraction n div */ + unsigned int divsel:1; /* enables input clock div */ + unsigned int divctl:1; /* input clock divider */ + unsigned int n:4; + unsigned int k; +}; + +struct pll_ pll[] = { + {13000000, 0, 1, 0, 0, 7, 0x23f488}, + {2048000, 1, 0, 0, 0, 12, 0x0}, + {4096000, 1, 0, 0, 0, 6, 0x0}, + {12288000, 0, 0, 0, 0, 8, 0x0}, + /* liam - add more entries */ +}; + +/* we must have either 24.576MHz or a PLL freq */ +static unsigned int wm9713_config_ac97sysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + int i; + dai->mclk = 0; + + /* first check if we can get away witout burning any PLL power */ + if (24576000 == clk) { + /* standard AC97 clock */ + dai->mclk = clk; + goto out; + } + + /* ok no standard clock, so we must now try the PLL */ + for(i = 0; i < ARRAY_SIZE(pll); i++) { + if (clk == pll[i].in_hz) { + dai->mclk = clk; /* clock out */ + goto out; + } + } + +out: + return dai->mclk; +} + +/* The WM9713 voice DAC can only run at 256FS. This interface and DAC are + * clocked by the main AC97 clock divided down to 256 FS. + */ +static unsigned int wm9713_config_vsysclk(struct snd_soc_codec_dai *dai, + struct snd_soc_clock_info *info, unsigned int clk) +{ + + int i, j, best_clk = info->fs * info->rate; + + /* can we run at this clk without the PLL ? */ + for (i = 1; i <= 16; i++) { + if (best_clk * i == clk) { + dai->pll_in = 0; + dai->clk_div = i << 1; + dai->mclk = best_clk; + return dai->mclk; + } + } + + /* now check for PLL support */ + for (i = 0; i < ARRAY_SIZE(pll); i++) { + if (pll[i].in_hz == clk) { + for (j = 1; j <= 16; j++) { + if (24576000 == j * best_clk) { + dai->pll_in = clk; + dai->pll_out = 24576000; + dai->clk_div = j << 1; + dai->mclk = best_clk; + return dai->mclk; + } + } + } + } + + /* this clk is not supported */ + return 0; +} + +u32 wm9713_set_pll(struct snd_soc_codec *codec, u32 in) +{ + struct wm9713 *wm = (struct wm9713*)codec->private_data; + int i; + u16 reg, reg2; + + /* turn PLL off ? */ + if (in == 0) { + /* disable PLL power and select ext source */ + reg = ac97_read(codec, AC97_HANDSET_RATE); + ac97_write(codec, AC97_HANDSET_RATE, reg | 0x0080); + reg = ac97_read(codec, AC97_EXTENDED_MID); + ac97_write(codec, AC97_EXTENDED_MID, reg | 0x0200); + wm->pll = 0; + return 0; + } + + for (i = 0; i < ARRAY_SIZE(pll); i++) { + if(pll[i].in_hz == in) + goto found; + } + return -EINVAL; + +found: + if(pll[i].sdm == 0) { + reg = (pll[i].n << 12) | (pll[i].lf << 11) | + (pll[i].divsel << 9) | (pll[i].divctl << 8); + ac97_write(codec, AC97_LINE1_LEVEL, reg); + } else { + /* write the fractional k to the reg 0x46 pages */ + reg2 = (pll[i].n << 12) | (pll[i].lf << 11) | (pll[i].sdm << 10) | + (pll[i].divsel << 9) | (pll[i].divctl << 8); + + reg = reg2 | (0x5 << 4) | (pll[i].k >> 20); /* K [21:20] */ + ac97_write(codec, AC97_LINE1_LEVEL, reg); + + reg = reg2 | (0x4 << 4) | ((pll[i].k >> 16) & 0xf); /* K [19:16] */ + ac97_write(codec, AC97_LINE1_LEVEL, reg); + + reg = reg2 | (0x3 << 4) | ((pll[i].k >> 12) & 0xf); /* K [15:12] */ + ac97_write(codec, AC97_LINE1_LEVEL, reg); + + reg = reg2 | (0x2 << 4) | ((pll[i].k >> 8) & 0xf); /* K [11:8] */ + ac97_write(codec, AC97_LINE1_LEVEL, reg); + + reg = reg2 | (0x1 << 4) | ((pll[i].k >> 4) & 0xf); /* K [7:4] */ + ac97_write(codec, AC97_LINE1_LEVEL, reg); + + reg = reg2 | (0x0 << 4) | (pll[i].k & 0xf); /* K [3:0] */ + ac97_write(codec, AC97_LINE1_LEVEL, reg); + } + + /* turn PLL on and select as source */ + reg = ac97_read(codec, AC97_EXTENDED_MID); + ac97_write(codec, AC97_EXTENDED_MID, reg & 0xfdff); + reg = ac97_read(codec, AC97_HANDSET_RATE); + ac97_write(codec, AC97_HANDSET_RATE, reg & 0xff7f); + /* wait 10ms AC97 link frames for the link to stabilise */ + schedule_timeout_interruptible(msecs_to_jiffies(10)); + wm->pll = in; + return 0; +} +EXPORT_SYMBOL_GPL(wm9713_set_pll); + +static int wm9713_voice_prepare(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 reg = 0x8000, bfs, div; + int master = 1; + + bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs); + + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK){ + case SND_SOC_DAIFMT_CBM_CFM: + reg |= 0x4000; + break; + case SND_SOC_DAIFMT_CBM_CFS: + reg |= 0x6000; + break; + case SND_SOC_DAIFMT_CBS_CFS: + reg |= 0x0200; + master = 0; + break; + } + + /* enable PLL if needed */ + if(rtd->codec_dai->pll_in) + wm9713_set_pll(codec, rtd->codec_dai->pll_in); + + /* set the PCM divider */ + div = ac97_read(codec, AC97_HANDSET_RATE) & 0xf0ff; + ac97_write(codec, AC97_HANDSET_RATE, div | ((rtd->codec_dai->clk_div >> 1) -1) << 8); + + /* clock inversion */ + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_IB_IF: + reg |= 0x00c0; + break; + case SND_SOC_DAIFMT_IB_NF: + reg |= 0x0080; + break; + case SND_SOC_DAIFMT_NB_IF: + reg |= 0x0040; + break; + } + + switch(rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + reg |= 0x0002; + break; + case SND_SOC_DAIFMT_RIGHT_J: + break; + case SND_SOC_DAIFMT_LEFT_J: + reg |= 0x0001; + break; + case SND_SOC_DAIFMT_DSP_A: + reg |= 0x0003; + break; + case SND_SOC_DAIFMT_DSP_B: + reg |= 0x0043; + break; + } + + switch(rtd->codec_dai->dai_runtime.pcmfmt) { + case SNDRV_PCM_FORMAT_S16_LE: + break; + case SNDRV_PCM_FORMAT_S20_3LE: + reg |= 0x0004; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + case SNDRV_PCM_FORMAT_S24_LE: + reg |= 0x0008; + break; + case SNDRV_PCM_FORMAT_S32_LE: + reg |= 0x000c; + break; + } + + switch (bfs) { + case 2: + reg |= (0x1 << 9); + break; + case 4: + reg |= (0x2 << 9); + break; + case 8: + reg |= (0x3 << 9); + break; + case 16: + reg |= (0x4 << 9); + break; + } + + /* enable PCM interface in master mode */ + ac97_write(codec, AC97_CENTER_LFE_MASTER, reg); + return 0; +} + +static void wm9713_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + + if(!codec->active) + wm9713_set_pll(codec, 0); +} + +static void wm9713_voiceshutdown(snd_pcm_substream_t *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 status; + + wm9713_shutdown(substream); + + /* Gracefully shut down the voice interface. */ + status = ac97_read(codec, AC97_EXTENDED_STATUS) | 0x1000; + ac97_write(codec,AC97_HANDSET_RATE,0x0280); + schedule_timeout_interruptible(msecs_to_jiffies(1)); + ac97_write(codec,AC97_HANDSET_RATE,0x0F80); + ac97_write(codec,AC97_EXTENDED_MID,status); +} + +static int ac97_hifi_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + int reg; + u16 vra; + + /* we need a 24576000Hz clock to run at the correct speed */ + if(rtd->codec_dai->mclk != 24576000) + wm9713_set_pll(codec, rtd->codec_dai->mclk); + + vra = ac97_read(codec, AC97_EXTENDED_STATUS); + ac97_write(codec, AC97_EXTENDED_STATUS, vra | 0x1); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + reg = AC97_PCM_FRONT_DAC_RATE; + else + reg = AC97_PCM_LR_ADC_RATE; + + return ac97_write(codec, reg, runtime->rate); +} + +static int ac97_aux_prepare(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_device *socdev = rtd->socdev; + struct snd_soc_codec *codec = socdev->codec; + u16 vra, xsle; + + /* we need a 24576000Hz clock to run at the correct speed */ + if(rtd->codec_dai->mclk != 24576000) + wm9713_set_pll(codec, rtd->codec_dai->mclk); + + vra = ac97_read(codec, AC97_EXTENDED_STATUS); + ac97_write(codec, AC97_EXTENDED_STATUS, vra | 0x1); + xsle = ac97_read(codec, AC97_PCI_SID); + ac97_write(codec, AC97_PCI_SID, xsle | 0x8000); + + if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) + return -ENODEV; + + return ac97_write(codec, AC97_PCM_SURR_DAC_RATE, runtime->rate); +} + +struct snd_soc_codec_dai wm9713_dai[] = { +{ + .name = "AC97 HiFi", + .playback = { + .stream_name = "HiFi Playback", + .channels_min = 1, + .channels_max = 2,}, + .capture = { + .stream_name = "HiFi Capture", + .channels_min = 1, + .channels_max = 2,}, + .config_sysclk = wm9713_config_ac97sysclk, + .ops = { + .shutdown = wm9713_shutdown, + .prepare = ac97_hifi_prepare,}, + .caps = { + .num_modes = ARRAY_SIZE(ac97_modes), + .mode = ac97_modes,},}, + { + .name = "AC97 Aux", + .playback = { + .stream_name = "Aux Playback", + .channels_min = 1, + .channels_max = 1,}, + .config_sysclk = wm9713_config_ac97sysclk, + .ops = { + .shutdown = wm9713_shutdown, + .prepare = ac97_aux_prepare,}, + .caps = { + .num_modes = ARRAY_SIZE(ac97_modes), + .mode = ac97_modes,} + }, + { + .name = "WM9713 Voice", + .playback = { + .stream_name = "Voice Playback", + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .stream_name = "Voice Capture", + .channels_min = 1, + .channels_max = 1,}, + .config_sysclk = wm9713_config_vsysclk, + .ops = { + .prepare = wm9713_voice_prepare, + .shutdown = wm9713_voiceshutdown,}, + .caps = { + .num_modes = ARRAY_SIZE(wm9713_voice_modes), + .mode = wm9713_voice_modes,}, + }, +}; +EXPORT_SYMBOL_GPL(wm9713_dai); + +int wm9713_reset(struct snd_soc_codec *codec, int try_warm) +{ + if(try_warm && soc_ac97_ops.warm_reset) { + soc_ac97_ops.warm_reset(codec->ac97); + if(!(ac97_read(codec, 0) & 0x8000)) + return 1; + } + + soc_ac97_ops.reset(codec->ac97); + if(ac97_read(codec, 0) & 0x8000) + return -EIO; + return 0; +} +EXPORT_SYMBOL_GPL(wm9713_reset); + +static int wm9713_dapm_event(struct snd_soc_codec *codec, int event) +{ + u16 reg; + + switch (event) { + case SNDRV_CTL_POWER_D0: /* full On */ + /* liam - maybe enable thermal shutdown */ + reg = ac97_read(codec, AC97_EXTENDED_MID) & 0xdfff; + ac97_write(codec, AC97_EXTENDED_MID, reg); + //reg = ac97_read(codec, AC97_POWERDOWN) & 0xdfff; + //ac97_write(codec, AC97_POWERDOWN, reg); + break; + case SNDRV_CTL_POWER_D1: /* partial On */ + case SNDRV_CTL_POWER_D2: /* partial On */ + break; + case SNDRV_CTL_POWER_D3hot: /* Off, with power */ + /* enable master bias and vmid */ + // liam - check PLL + reg = ac97_read(codec, AC97_EXTENDED_MID) & 0xbbff; + ac97_write(codec, AC97_EXTENDED_MID, reg); + ac97_write(codec, AC97_POWERDOWN, 0x0000); + break; + case SNDRV_CTL_POWER_D3cold: /* Off, without power */ + /* disable everything including AC link */ + ac97_write(codec, AC97_EXTENDED_MID, 0xffff); + ac97_write(codec, AC97_EXTENDED_MSTATUS, 0xffff); + ac97_write(codec, AC97_POWERDOWN, 0xffff); + break; + } + codec->dapm_state = event; + return 0; +} + +static int wm9713_soc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + struct wm9713 *wm = (struct wm9713*)codec->private_data; + + if(wm->pll) { + wm->pll_resume = wm->pll; + wm9713_set_pll(codec, 0); + } + wm9713_dapm_event(codec, SNDRV_CTL_POWER_D3cold); + return 0; +} + +static int wm9713_soc_resume(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + struct wm9713 *wm = (struct wm9713*)codec->private_data; + int i, ret; + u16 *cache = codec->reg_cache; + + if((ret = wm9713_reset(codec, 1)) < 0){ + printk(KERN_ERR "could not reset AC97 codec\n"); + return ret; + } + + wm9713_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* only sychronise the codec if warm reset failed */ + if(ret == 0) { + for (i = 2; i < ARRAY_SIZE(wm9713_reg) << 1; i+=2) { + if (i == AC97_POWERDOWN || i == AC97_EXTENDED_MID || + i == AC97_EXTENDED_MSTATUS || i > 0x66) + continue; + soc_ac97_ops.write(codec->ac97, i, cache[i>>1]); + } + } + + if(wm->pll_resume) { + wm9713_set_pll(codec, wm->pll_resume); + wm->pll_resume = 0; + } + + if(codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) + wm9713_dapm_event(codec, SNDRV_CTL_POWER_D0); + + return ret; +} + +static int wm9713_soc_probe(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec; + int ret = 0, reg; + + printk(KERN_INFO "WM9713/WM9714 SoC Audio Codec %s\n", WM9713_VERSION); + + if ((socdev->codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL)) == NULL) + return -ENOMEM; + codec = socdev->codec; + mutex_init(&codec->mutex); + + if ((codec->reg_cache = + kzalloc(sizeof(u16) * ARRAY_SIZE(wm9713_reg), GFP_KERNEL)) == NULL){ + kfree(socdev->codec); + socdev->codec = NULL; + return -ENOMEM; + } + memcpy(codec->reg_cache, wm9713_reg, sizeof(u16) * ARRAY_SIZE(wm9713_reg)); + codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm9713_reg); + codec->reg_cache_step = 2; + + if ((codec->private_data = kzalloc(sizeof(struct wm9713), GFP_KERNEL)) == NULL){ + kfree(codec->reg_cache); + kfree(socdev->codec); + socdev->codec = NULL; + return -ENOMEM; + } + + codec->name = "WM9713"; + codec->owner = THIS_MODULE; + codec->dai = wm9713_dai; + codec->num_dai = ARRAY_SIZE(wm9713_dai); + codec->write = ac97_write; + codec->read = ac97_read; + codec->dapm_event = wm9713_dapm_event; + INIT_LIST_HEAD(&codec->dapm_widgets); + INIT_LIST_HEAD(&codec->dapm_paths); + + if((ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0)) < 0) + goto err; + + /* register pcms */ + if((ret = snd_soc_new_pcms(socdev)) < 0) + goto pcm_err; + + /* do a cold reset for the controller and then try + * a warm reset followed by an optional cold reset for codec */ + wm9713_reset(codec, 0); + if((ret = wm9713_reset(codec, 1)) < 0) { + printk(KERN_ERR "AC97 link error\n"); + goto reset_err; + } + + wm9713_dapm_event(codec, SNDRV_CTL_POWER_D3hot); + + /* unmute the adc - move to kcontrol */ + reg = ac97_read(codec, AC97_CD) & 0x7fff; + ac97_write(codec, AC97_CD, reg); + + wm9713_add_controls(codec); + wm9713_add_widgets(codec); + if ((ret = snd_soc_register_card(socdev)) < 0) + goto reset_err; + return 0; + +reset_err: + snd_soc_free_pcms(socdev); + +pcm_err: + snd_soc_free_ac97_codec(codec); + +err: + kfree(socdev->codec->private_data); + kfree(socdev->codec->reg_cache); + kfree(socdev->codec); + socdev->codec = NULL; + return ret; +} + +static int wm9713_soc_remove(struct platform_device *pdev) +{ + struct snd_soc_device *socdev = platform_get_drvdata(pdev); + struct snd_soc_codec *codec = socdev->codec; + + if(codec == NULL) + return 0; + + snd_soc_dapm_free(socdev); + snd_soc_free_pcms(socdev); + snd_soc_free_ac97_codec(codec); + kfree(codec->private_data); + kfree(codec->reg_cache); + kfree(codec); + return 0; +} + +struct snd_soc_codec_device soc_codec_dev_wm9713= { + .probe = wm9713_soc_probe, + .remove = wm9713_soc_remove, + .suspend = wm9713_soc_suspend, + .resume = wm9713_soc_resume, +}; + +EXPORT_SYMBOL_GPL(soc_codec_dev_wm9713); + +MODULE_DESCRIPTION("Soc WM9713/WM9714 driver"); +MODULE_AUTHOR("Liam Girdwood"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/codecs/wm9713.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/codecs/wm9713.h @@ -0,0 +1,18 @@ +/* + * wm9713.h -- WM9713 Soc Audio driver + */ + +#ifndef _WM9713_H +#define _WM9713_H + +#define WM9713_DAI_AC97_HIFI 0 +#define WM9713_DAI_AC97_AUX 1 +#define WM9713_DAI_PCM_VOICE 2 + +extern struct snd_soc_codec_device soc_codec_dev_wm9713; +extern struct snd_soc_codec_dai wm9713_dai[3]; + +u32 wm9713_set_pll(struct snd_soc_codec *codec, u32 in); +int wm9713_reset(struct snd_soc_codec *codec, int try_warm); + +#endif Index: linux-2.6-pxa/sound/soc/pxa/Kconfig =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/Kconfig @@ -0,0 +1,124 @@ +menu "SoC Audio for the Intel PXA2xx" + +config SND_PXA2xx_SOC + tristate "SoC Audio for the Intel PXA2xx chip" + depends on ARCH_PXA && SND + select SND_PCM + help + Say Y or M if you want to add support for codecs attached to + the PXA2xx AC97, I2S or SSP interface. You will also need + to select the audio interfaces to support below. + +config SND_PXA2xx_AC97 + tristate + select SND_AC97_CODEC + +config SND_PXA2xx_SOC_AC97 + tristate + select SND_AC97_BUS + +config SND_PXA2xx_SOC_I2S + tristate + +config SND_PXA2xx_SOC_SSP + tristate + select PXA_SSP + +config SND_PXA2xx_SOC_MAINSTONE + tristate "SoC AC97 Audio support for Intel Mainstone" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_AC97 + help + Say Y if you want to add support for generic AC97 SoC audio on Mainstone. + +config SND_PXA2xx_SOC_MAINSTONE_WM8731 + tristate "SoC I2S Audio support for Intel Mainstone - WM8731" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_I2S + help + Say Y if you want to add support for SoC audio on Mainstone + with the WM8731. + +config SND_PXA2xx_SOC_MAINSTONE_WM8753 + tristate "SoC I2S/SSP Audio support for Intel Mainstone - WM8753" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_I2S + select SND_PXA2xx_SOC_SSP + help + Say Y if you want to add support for SoC audio on Mainstone + with the WM8753. + +config SND_PXA2xx_SOC_MAINSTONE_WM8974 + tristate "SoC I2S Audio support for Intel Mainstone - WM8974" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_I2S + help + Say Y if you want to add support for SoC audio on Mainstone + with the WM8974. + +config SND_PXA2xx_SOC_MAINSTONE_WM9713 + tristate "SoC I2S/SSP Audio support for Intel Mainstone - WM9713" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_AC97 + select SND_PXA2xx_SOC_SSP + help + Say Y if you want to add support for SoC voice audio on Mainstone + with the WM9713. + +config SND_MAINSTONE_BASEBAND + tristate "Example SoC Baseband Audio support for Intel Mainstone" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_AC97 + help + Say Y if you want to add support for SoC baseband on Mainstone + with the WM9713 and example Baseband modem. + +config SND_MAINSTONE_BLUETOOTH + tristate "Example SoC Bluetooth Audio support for Intel Mainstone" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_I2S + help + Say Y if you want to add support for SoC bluetooth on Mainstone + with the WM8753 and example Bluetooth codec. + +config SND_PXA2xx_SOC_MAINSTONE_WM9712 + tristate "SoC I2S/SSP Audio support for Intel Mainstone - WM9712" + depends on SND_PXA2xx_SOC && MACH_MAINSTONE + select SND_PXA2xx_SOC_AC97 + help + Say Y if you want to add support for SoC voice audio on Mainstone + with the WM9712. + +config SND_PXA2xx_SOC_CORGI + tristate "SoC Audio support for Sharp Zaurus SL-C7x0" + depends on SND_PXA2xx_SOC && PXA_SHARP_C7xx + select SND_PXA2xx_SOC_I2S + help + Say Y if you want to add support for SoC audio on Sharp + Zaurus SL-C7x0 models (Corgi, Shepherd, Husky). + +config SND_PXA2xx_SOC_SPITZ + tristate "SoC Audio support for Sharp Zaurus SL-Cxx00" + depends on SND_PXA2xx_SOC && PXA_SHARP_Cxx00 + select SND_PXA2xx_SOC_I2S + help + Say Y if you want to add support for SoC audio on Sharp + Zaurus SL-Cxx00 models (Spitz, Borzoi and Akita). + +config SND_PXA2xx_SOC_POODLE + tristate "SoC Audio support for Poodle" + depends on SND_PXA2xx_SOC && MACH_POODLE + select SND_PXA2xx_SOC_I2S + help + Say Y if you want to add support for SoC audio on Sharp + Zaurus SL-5600 model (Poodle). + +config SND_PXA2xx_SOC_TOSA + tristate "SoC AC97 Audio support for Tosa" + depends on SND_PXA2xx_SOC && MACH_TOSA + select SND_PXA2xx_SOC_AC97 + help + Say Y if you want to add support for SoC audio on Sharp + Zaurus SL-C6000x models (Tosa). + +endmenu Index: linux-2.6-pxa/sound/soc/pxa/Makefile =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/Makefile @@ -0,0 +1,36 @@ +# PXA Platform Support +snd-soc-pxa2xx-objs := pxa2xx-pcm.o +snd-soc-pxa2xx-ac97-objs := pxa2xx-ac97.o +snd-soc-pxa2xx-i2s-objs := pxa2xx-i2s.o +snd-soc-pxa2xx-ssp-objs := pxa2xx-ssp.o + +obj-$(CONFIG_SND_PXA2xx_SOC) += snd-soc-pxa2xx.o +obj-$(CONFIG_SND_PXA2xx_SOC_AC97) += snd-soc-pxa2xx-ac97.o +obj-$(CONFIG_SND_PXA2xx_SOC_I2S) += snd-soc-pxa2xx-i2s.o +obj-$(CONFIG_SND_PXA2xx_SOC_SSP) += snd-soc-pxa2xx-ssp.o + +# PXA Machine Support +snd-soc-corgi-objs := corgi.o +snd-soc-mainstone-wm8731-objs := mainstone_wm8731.o +snd-soc-mainstone-wm8753-objs := mainstone_wm8753.o +snd-soc-mainstone-wm8974-objs := mainstone_wm8974.o +snd-soc-mainstone-wm9713-objs := mainstone_wm9713.o +snd-soc-mainstone-wm9712-objs := mainstone_wm9712.o +snd-soc-mainstone-baseband-objs := mainstone_baseband.o +snd-soc-mainstone-bluetooth-objs := mainstone_bluetooth.o +snd-soc-poodle-objs := poodle.o +snd-soc-tosa-objs := tosa.o +snd-soc-spitz-objs := spitz.o + +obj-$(CONFIG_SND_PXA2xx_SOC_CORGI) += snd-soc-corgi.o +obj-$(CONFIG_SND_PXA2xx_SOC_MAINSTONE_WM8731) += snd-soc-mainstone-wm8731.o +obj-$(CONFIG_SND_PXA2xx_SOC_MAINSTONE_WM8753) += snd-soc-mainstone-wm8753.o +obj-$(CONFIG_SND_PXA2xx_SOC_MAINSTONE_WM8974) += snd-soc-mainstone-wm8974.o +obj-$(CONFIG_SND_PXA2xx_SOC_MAINSTONE_WM9713) += snd-soc-mainstone-wm9713.o +obj-$(CONFIG_SND_PXA2xx_SOC_MAINSTONE_WM9712) += snd-soc-mainstone-wm9712.o +obj-$(CONFIG_SND_MAINSTONE_BASEBAND) += snd-soc-mainstone-baseband.o +obj-$(CONFIG_SND_MAINSTONE_BLUETOOTH) += snd-soc-mainstone-bluetooth.o +obj-$(CONFIG_SND_PXA2xx_SOC_POODLE) += snd-soc-poodle.o +obj-$(CONFIG_SND_PXA2xx_SOC_TOSA) += snd-soc-tosa.o +obj-$(CONFIG_SND_PXA2xx_SOC_SPITZ) += snd-soc-spitz.o + Index: linux-2.6-pxa/sound/soc/pxa/corgi.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/corgi.c @@ -0,0 +1,344 @@ +/* + * corgi.c -- SoC audio for Corgi + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Copyright 2005 Openedhand Ltd. + * + * Authors: Liam Girdwood + * Richard Purdie + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 30th Nov 2005 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "../codecs/wm8731.h" +#include "pxa2xx-pcm.h" + +#define CORGI_HP 0 +#define CORGI_MIC 1 +#define CORGI_LINE 2 +#define CORGI_HEADSET 3 +#define CORGI_HP_OFF 4 +#define CORGI_SPK_ON 0 +#define CORGI_SPK_OFF 1 + + /* audio clock in Hz - rounded from 12.235MHz */ +#define CORGI_AUDIO_CLOCK 12288000 + +static int corgi_jack_func = 0; +static int corgi_spk_func = 0; + +static void corgi_ext_control(struct snd_soc_codec *codec) +{ + int spk = 0, mic = 0, line = 0, hp = 0, hs = 0; + + /* set up jack connection */ + switch(corgi_jack_func) { + case CORGI_HP: + hp = 1; + /* set = unmute headphone */ + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_L); + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_R); + break; + case CORGI_MIC: + mic = 1; + /* reset = mute headphone */ + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_L); + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_R); + break; + case CORGI_LINE: + line = 1; + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_L); + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_R); + break; + case CORGI_HEADSET: + hs = 1; + mic = 1; + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_L); + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_R); + break; + } + + if (corgi_spk_func == CORGI_SPK_ON) + spk = 1; + + /* set the enpoints to their new connetion states */ + snd_soc_dapm_set_endpoint(codec, "Ext Spk", spk); + snd_soc_dapm_set_endpoint(codec, "Mic Jack", mic); + snd_soc_dapm_set_endpoint(codec, "Line Jack", line); + snd_soc_dapm_set_endpoint(codec, "Headphone Jack", hp); + snd_soc_dapm_set_endpoint(codec, "Headset Jack", hs); + + /* signal a DAPM event */ + snd_soc_dapm_sync_endpoints(codec); +} + +static int corgi_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->socdev->codec; + + /* check the jack status at stream startup */ + corgi_ext_control(codec); + return 0; +} + +/* we need to unmute the HP at shutdown as the mute burns power on corgi */ +static int corgi_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->socdev->codec; + + /* set = unmute headphone */ + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_L); + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MUTE_R); + return 0; +} + +static struct snd_soc_ops corgi_ops = { + .startup = corgi_startup, + .shutdown = corgi_shutdown, +}; + +static int corgi_get_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = corgi_jack_func; + return 0; +} + +static int corgi_set_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + corgi_jack_func = ucontrol->value.integer.value[0]; + corgi_ext_control(codec); + return 0; +} + +static int corgi_get_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = corgi_spk_func; + return 0; +} + +static int corgi_set_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + corgi_spk_func = ucontrol->value.integer.value[0]; + + corgi_ext_control(codec); + return 0; +} + +static int corgi_amp_event(struct snd_soc_dapm_widget *w, int event) +{ + if (SND_SOC_DAPM_EVENT_ON(event)) + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_APM_ON); + else + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_APM_ON); + + return 0; +} + +static int corgi_mic_event(struct snd_soc_dapm_widget *w, int event) +{ + if (SND_SOC_DAPM_EVENT_ON(event)) + set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MIC_BIAS); + else + reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_MIC_BIAS); + + return 0; +} + +/* corgi machine dapm widgets */ +static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = { +SND_SOC_DAPM_HP("Headphone Jack", NULL), +SND_SOC_DAPM_MIC("Mic Jack", corgi_mic_event), +SND_SOC_DAPM_SPK("Ext Spk", corgi_amp_event), +SND_SOC_DAPM_LINE("Line Jack", NULL), +SND_SOC_DAPM_HP("Headset Jack", NULL), +}; + +/* Corgi machine audio map (connections to the codec pins) */ +static const char* audio_map[][3] = { + + /* headset Jack - in = micin, out = LHPOUT*/ + {"Headset Jack", NULL, "LHPOUT"}, + + /* headphone connected to LHPOUT1, RHPOUT1 */ + {"Headphone Jack", NULL, "LHPOUT"}, + {"Headphone Jack", NULL, "RHPOUT"}, + + /* speaker connected to LOUT, ROUT */ + {"Ext Spk", NULL, "ROUT"}, + {"Ext Spk", NULL, "LOUT"}, + + /* mic is connected to MICIN (via right channel of headphone jack) */ + {"MICIN", NULL, "Mic Jack"}, + + /* Same as the above but no mic bias for line signals */ + {"MICIN", NULL, "Line Jack"}, + + {NULL, NULL, NULL}, +}; + +static const char *jack_function[] = {"Headphone", "Mic", "Line", "Headset", "Off"}; +static const char *spk_function[] = {"On", "Off"}; +static const struct soc_enum corgi_enum[] = { + SOC_ENUM_SINGLE_EXT(5, jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), +}; + +static const struct snd_kcontrol_new wm8731_corgi_controls[] = { + SOC_ENUM_EXT("Jack Function", corgi_enum[0], corgi_get_jack, corgi_set_jack), + SOC_ENUM_EXT("Speaker Function", corgi_enum[1], corgi_get_spk, corgi_set_spk), +}; + +/* + * Logic for a wm8731 as connected on a Sharp SL-C7x0 Device + */ +static int corgi_wm8731_init(struct snd_soc_codec *codec) +{ + int i, err; + + snd_soc_dapm_set_endpoint(codec, "LLINEIN", 0); + snd_soc_dapm_set_endpoint(codec, "RLINEIN", 0); + + /* Add corgi specific controls */ + for (i = 0; i < ARRAY_SIZE(wm8731_corgi_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8731_corgi_controls[i],codec, NULL))) < 0) + return err; + } + + /* Add corgi specific widgets */ + for(i = 0; i < ARRAY_SIZE(wm8731_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8731_dapm_widgets[i]); + } + + /* Set up corgi specific audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_sync_endpoints(codec); + return 0; +} + +unsigned int corgi_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + if(info->bclk_master & SND_SOC_DAIFMT_CBS_CFS) { + /* pxa2xx is i2s master */ + switch(info->rate) { + case 44100: + case 88200: + /* configure codec digital filters for 44.1, 88.2 */ + rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 11289600); + break; + default: + /* configure codec digital filters for all other rates */ + rtd->codec_dai->config_sysclk(rtd->codec_dai, info, CORGI_AUDIO_CLOCK); + break; + } + /* config pxa i2s as master */ + return rtd->cpu_dai->config_sysclk(rtd->cpu_dai, info, CORGI_AUDIO_CLOCK); + } else { + /* codec is i2s master - only configure codec DAI clock and filters */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, CORGI_AUDIO_CLOCK); + } +} + +/* corgi digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link corgi_dai = { + .name = "WM8731", + .stream_name = "WM8731", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8731_dai, + .init = corgi_wm8731_init, + .config_sysclk = corgi_config_sysclk, +}; + +/* corgi audio machine driver */ +static struct snd_soc_machine snd_soc_machine_corgi = { + .name = "Corgi", + .dai_link = &corgi_dai, + .num_links = 1, + .ops = &corgi_ops, +}; + +/* corgi audio private data */ +static struct wm8731_setup_data corgi_wm8731_setup = { + .i2c_address = 0x1b, +}; + +/* corgi audio subsystem */ +static struct snd_soc_device corgi_snd_devdata = { + .machine = &snd_soc_machine_corgi, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8731, + .codec_data = &corgi_wm8731_setup, +}; + +static struct platform_device *corgi_snd_device; + +static int __init corgi_init(void) +{ + int ret; + + if (!(machine_is_corgi() || machine_is_shepherd() || machine_is_husky())) + return -ENODEV; + + corgi_snd_device = platform_device_alloc("soc-audio", -1); + if (!corgi_snd_device) + return -ENOMEM; + + platform_set_drvdata(corgi_snd_device, &corgi_snd_devdata); + corgi_snd_devdata.dev = &corgi_snd_device->dev; + ret = platform_device_add(corgi_snd_device); + + if (ret) + platform_device_put(corgi_snd_device); + + return ret; +} + +static void __exit corgi_exit(void) +{ + platform_device_unregister(corgi_snd_device); +} + +module_init(corgi_init); +module_exit(corgi_exit); + +/* Module information */ +MODULE_AUTHOR("Richard Purdie"); +MODULE_DESCRIPTION("ALSA SoC Corgi"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone.c @@ -0,0 +1,126 @@ +/* + * mainstone.c -- SoC audio for Mainstone + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Mainstone audio amplifier code taken from arch/arm/mach-pxa/mainstone.c + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 30th Oct 2005 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/ac97.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; +static long mst_audio_suspend_mask; + +static int mainstone_suspend(struct platform_device *pdev, pm_message_t state) +{ + mst_audio_suspend_mask = MST_MSCWR2; + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_resume(struct platform_device *pdev) +{ + MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_probe(struct platform_device *pdev) +{ + MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_remove(struct platform_device *pdev) +{ + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static struct snd_soc_machine_config codecs[] = { +{ + .name = "AC97", + .sname = "AC97 HiFi", + .iface = &pxa_ac97_interface[0], +}, +{ + .name = "AC97 Aux", + .sname = "AC97 Aux", + .iface = &pxa_ac97_interface[1], +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .probe = mainstone_probe, + .remove = mainstone_remove, + .suspend_pre = mainstone_suspend, + .resume_post = mainstone_resume, + .config = codecs, + .nconfigs = ARRAY_SIZE(codecs), +}; + +static struct snd_soc_device mainstone_snd_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_ac97, +}; + +static struct platform_device *mainstone_snd_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_device, &mainstone_snd_devdata); + mainstone_snd_devdata.dev = &mainstone_snd_device->dev; + ret = platform_device_add(mainstone_snd_device); + + if (ret) + platform_device_put(mainstone_snd_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC Mainstone"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_baseband.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_baseband.c @@ -0,0 +1,249 @@ +/* + * mainstone_baseband.c + * Mainstone Example Baseband modem -- ALSA Soc Audio Layer + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 15th Apr 2006 Initial version. + * + * This is example code to demonstrate connecting a baseband modem to the PCM + * DAI on the WM9713 codec on the Intel Mainstone platform. It is by no means + * complete as it requires code to control the modem. + * + * The architecture consists of the WM9713 AC97 DAI connected to the PXA27x + * AC97 controller and the WM9713 PCM DAI connected to the basebands DAI. The + * baseband is controlled via a serial port. Audio is routed between the PXA27x + * and the baseband via internal WM9713 analog paths. + * + * This driver is not the baseband modem driver. This driver only calls + * functions from the Baseband driver to set up it's PCM DAI. + * + * It's intended to use this driver as follows:- + * + * 1. open() WM9713 PCM audio device. + * 2. open() serial device (for AT commands). + * 3. configure PCM audio device (rate etc) - sets up WM9713 PCM DAI, + * this will also set up the baseband PCM DAI (via calling baseband driver). + * 4. send any further AT commands to set up baseband. + * 5. configure codec audio mixer paths. + * 6. open(), configure and read/write AC97 audio device - to Tx/Rx voice + * + * The PCM audio device is opened but IO is never performed on it as the IO is + * directly between the codec and the baseband (and not the CPU). + * + * TODO: + * o Implement callbacks + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "../codecs/wm9713.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; + +#define BASEBAND_XXX_DAIFMT \ + (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS |\ + SND_SOC_DAIFMT_NB_NF) + +#define BASEBAND_XXX_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +/* + * PCM modes - 8k 16bit mono baseband modem is master + */ +static struct snd_soc_dai_mode mainstone_example_modes[] = { + /* port master clk & frame modes */ + {BASEBAND_XXX_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_8000, BASEBAND_XXX_DIR, 0, 256, SND_SOC_FSB(64)}, +}; + +/* Do specific baseband PCM voice startup here */ +static int mainstone_baseband_startup(struct snd_pcm_substream *substream) +{ + return 0; +} + +/* Do specific baseband PCM voice shutdown here */ +static void mainstone_baseband_shutdown (struct snd_pcm_substream *substream) +{ +} + +/* Do specific baseband modem PCM voice hw params init here */ +static int mainstone_baseband_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + return 0; +} + +/* Do specific baseband modem PCM voice hw params free here */ +static int mainstone_baseband_hw_free(struct snd_pcm_substream *substream) +{ + return 0; +} + +static struct snd_soc_cpu_dai mainstone_example_dai[] = { + { .name = "Baseband", + .id = 0, + .type = SND_SOC_DAI_PCM, + .playback = { + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .startup = mainstone_baseband_startup, + .shutdown = mainstone_baseband_shutdown, + .hw_params = mainstone_baseband_hw_params, + .hw_free = mainstone_baseband_hw_free, + }, + .caps = { + .mode = mainstone_example_modes, + .num_modes = ARRAY_SIZE(mainstone_example_modes),}, + }, +}; + +/* do we need to do any thing on the mainstone when the stream is + * started and stopped + */ +static int mainstone_startup(struct snd_pcm_substream *substream) +{ + return 0; +} + +static void mainstone_shutdown(struct snd_pcm_substream *substream) +{ +} + +static struct snd_soc_ops mainstone_ops = { + .startup = mainstone_startup, + .shutdown = mainstone_shutdown, +}; + +/* PM */ +static int mainstone_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int mainstone_resume(struct platform_device *pdev) +{ + return 0; +} + +static int mainstone_probe(struct platform_device *pdev) +{ + return 0; +} + +static int mainstone_remove(struct platform_device *pdev) +{ + return 0; +} + +static int mainstone_wm9713_init(struct snd_soc_codec *codec) +{ + return 0; +} + +unsigned int mainstone_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + /* wm8753 has pll that generates mclk from 13MHz xtal */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 13000000); +} + +/* the physical audio connections between the WM9713, Baseband and pxa2xx */ +static struct snd_soc_dai_link mainstone_dai[] = { +{ + .name = "AC97", + .stream_name = "AC97 HiFi", + .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI], + .codec_dai = &wm9713_dai[WM9713_DAI_AC97_HIFI], + .init = mainstone_wm9713_init, +}, +{ + .name = "AC97 Aux", + .stream_name = "AC97 Aux", + .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX], + .codec_dai = &wm9713_dai[WM9713_DAI_AC97_AUX], +}, +{ + .name = "Baseband", + .stream_name = "Voice", + .cpu_dai = mainstone_example_dai, + .codec_dai = &wm9713_dai[WM9713_DAI_PCM_VOICE], + .config_sysclk = mainstone_config_sysclk, +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .probe = mainstone_probe, + .remove = mainstone_remove, + .suspend_pre = mainstone_suspend, + .resume_post = mainstone_resume, + .ops = &mainstone_ops, + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct snd_soc_device mainstone_snd_ac97_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm9713, +}; + +static struct platform_device *mainstone_snd_ac97_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_ac97_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_ac97_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_ac97_device, &mainstone_snd_ac97_devdata); + mainstone_snd_ac97_devdata.dev = &mainstone_snd_ac97_device->dev; + + if((ret = platform_device_add(mainstone_snd_ac97_device)) != 0) + platform_device_put(mainstone_snd_ac97_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_ac97_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("Mainstone Example Baseband PCM Interface"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_bluetooth.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_bluetooth.c @@ -0,0 +1,406 @@ +/* + * mainstone_bluetooth.c + * Mainstone Example Bluetooth -- ALSA Soc Audio Layer + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 15th May 2006 Initial version. + * + * This is example code to demonstrate connecting a bluetooth codec to the PCM + * DAI on the WM8753 codec on the Intel Mainstone platform. It is by no means + * complete as it requires code to control the BT codec. + * + * The architecture consists of the WM8753 HIFI DAI connected to the PXA27x + * I2S controller and the WM8753 PCM DAI connected to the bluetooth DAI. The + * bluetooth codec and wm8753 are controlled via I2C. Audio is routed between + * the PXA27x and the bluetooth via internal WM8753 analog paths. + * + * This example supports the following audio input/outputs. + * + * o Board mounted Mic and Speaker (spk has amplifier) + * o Headphones via jack socket + * o BT source and sink + * + * This driver is not the bluetooth codec driver. This driver only calls + * functions from the Bluetooth driver to set up it's PCM DAI. + * + * It's intended to use the driver as follows:- + * + * 1. open() WM8753 PCM audio device. + * 2. configure PCM audio device (rate etc) - sets up WM8753 PCM DAI, + * this should also set up the BT codec DAI (via calling bt driver). + * 3. configure codec audio mixer paths. + * 4. open(), configure and read/write HIFI audio device - to Tx/Rx voice + * + * The PCM audio device is opened but IO is never performed on it as the IO is + * directly between the codec and the BT codec (and not the CPU). + * + * TODO: + * o Implement callbacks + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "../codecs/wm8753.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; + +#define BLUETOOTH_DAIFMT \ + (SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS |\ + SND_SOC_DAIFMT_NB_NF) + +#define BLUETOOTH_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +/* + * PCM modes - 8k 16bit mono BT codec is master + */ +static struct snd_soc_dai_mode mainstone_bt_modes[] = { + /* port master clk & frame modes */ + {BLUETOOTH_DAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_8000, BLUETOOTH_DIR, 0, 256, SND_SOC_FSB(64)}, +}; + +/* Do specific bluetooth PCM startup here */ +static int mainstone_bt_startup(struct snd_pcm_substream *substream) +{ + return 0; +} + +/* Do specific bluetooth PCM shutdown here */ +static void mainstone_bt_shutdown (struct snd_pcm_substream *substream) +{ +} + +/* Do pecific bluetooth PCM hw params init here */ +static int mainstone_bt_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + return 0; +} + +/* Do specific bluetooth PCM hw params free here */ +static int mainstone_bt_hw_free(struct snd_pcm_substream *substream) +{ + return 0; +} + +static struct snd_soc_cpu_dai mainstone_bt_dai[] = { + { .name = "Bluetooth", + .id = 0, + .type = SND_SOC_DAI_PCM, + .playback = { + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .startup = mainstone_bt_startup, + .shutdown = mainstone_bt_shutdown, + .hw_params = mainstone_bt_hw_params, + .hw_free = mainstone_bt_hw_free, + }, + .caps = { + .mode = mainstone_bt_modes, + .num_modes = ARRAY_SIZE(mainstone_bt_modes),}, + }, +}; + +/* do we need to do any thing on the mainstone when the stream is + * started and stopped + */ +static int mainstone_startup(struct snd_pcm_substream *substream) +{ + return 0; +} + +static void mainstone_shutdown(struct snd_pcm_substream *substream) +{ +} + +static struct snd_soc_ops mainstone_ops = { + .startup = mainstone_startup, + .shutdown = mainstone_shutdown, +}; + +/* PM */ +static int mainstone_suspend(struct platform_device *pdev, pm_message_t state) +{ + return 0; +} + +static int mainstone_resume(struct platform_device *pdev) +{ + return 0; +} + +static int mainstone_probe(struct platform_device *pdev) +{ + return 0; +} + +static int mainstone_remove(struct platform_device *pdev) +{ + return 0; +} + +/* + * Machine audio functions. + * + * The machine now has 3 extra audio controls. + * + * Jack function: Sets function (device plugged into Jack) to nothing (Off) + * or Headphones. + * + * Mic function: Set the on board Mic to On or Off + * Spk function: Set the on board Spk to On or Off + * + * example: BT playback (of far end) and capture (of near end) + * Set Mic and Speaker to On, open BT alsa interface as above and set up + * internal audio paths. + */ + +static int machine_jack_func = 0; +static int machine_spk_func = 0; +static int machine_mic_func = 0; + +static int machine_get_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = machine_jack_func; + return 0; +} + +static int machine_set_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + machine_jack_func = ucontrol->value.integer.value[0]; + snd_soc_dapm_set_endpoint(codec, "Headphone Jack", machine_jack_func); + return 0; +} + +static int machine_get_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = machine_spk_func; + return 0; +} + +static int machine_set_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + machine_spk_func = ucontrol->value.integer.value[0]; + snd_soc_dapm_set_endpoint(codec, "Spk", machine_spk_func); + return 0; +} + +static int machine_get_mic(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = machine_spk_func; + return 0; +} + +static int machine_set_mic(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + machine_spk_func = ucontrol->value.integer.value[0]; + snd_soc_dapm_set_endpoint(codec, "Mic", machine_mic_func); + return 0; +} + +/* turns on board speaker amp on/off */ +static int machine_amp_event(struct snd_soc_dapm_widget *w, int event) +{ +#if 0 + if (SND_SOC_DAPM_EVENT_ON(event)) + /* on */ + else + /* off */ +#endif + return 0; +} + +/* machine dapm widgets */ +static const struct snd_soc_dapm_widget machine_dapm_widgets[] = { +SND_SOC_DAPM_HP("Headphone Jack", NULL), +SND_SOC_DAPM_SPK("Spk", machine_amp_event), +SND_SOC_DAPM_MIC("Mic", NULL), +}; + +/* machine connections to the codec pins */ +static const char* audio_map[][3] = { + + /* headphone connected to LOUT1, ROUT1 */ + {"Headphone Jack", NULL, "LOUT"}, + {"Headphone Jack", NULL, "ROUT"}, + + /* speaker connected to LOUT2, ROUT2 */ + {"Spk", NULL, "ROUT2"}, + {"Spk", NULL, "LOUT2"}, + + /* mic is connected to MIC1 (via Mic Bias) */ + {"MIC1", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Mic"}, + + {NULL, NULL, NULL}, +}; + +static const char* jack_function[] = {"Off", "Headphone"}; +static const char* spk_function[] = {"Off", "On"}; +static const char* mic_function[] = {"Off", "On"}; +static const struct soc_enum machine_ctl_enum[] = { + SOC_ENUM_SINGLE_EXT(2, jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), + SOC_ENUM_SINGLE_EXT(2, mic_function), +}; + +static const struct snd_kcontrol_new wm8753_machine_controls[] = { + SOC_ENUM_EXT("Jack Function", machine_ctl_enum[0], machine_get_jack, machine_set_jack), + SOC_ENUM_EXT("Speaker Function", machine_ctl_enum[1], machine_get_spk, machine_set_spk), + SOC_ENUM_EXT("Mic Function", machine_ctl_enum[2], machine_get_mic, machine_set_mic), +}; + +static int mainstone_wm8753_init(struct snd_soc_codec *codec) +{ + int i, err; + + /* not used on this machine - e.g. will never be powered up */ + snd_soc_dapm_set_endpoint(codec, "OUT3", 0); + snd_soc_dapm_set_endpoint(codec, "OUT4", 0); + snd_soc_dapm_set_endpoint(codec, "MONO2", 0); + snd_soc_dapm_set_endpoint(codec, "MONO1", 0); + snd_soc_dapm_set_endpoint(codec, "LINE1", 0); + snd_soc_dapm_set_endpoint(codec, "LINE2", 0); + snd_soc_dapm_set_endpoint(codec, "RXP", 0); + snd_soc_dapm_set_endpoint(codec, "RXN", 0); + snd_soc_dapm_set_endpoint(codec, "MIC2", 0); + + /* Add machine specific controls */ + for (i = 0; i < ARRAY_SIZE(wm8753_machine_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8753_machine_controls[i],codec, NULL))) < 0) + return err; + } + + /* Add machine specific widgets */ + for(i = 0; i < ARRAY_SIZE(machine_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &machine_dapm_widgets[i]); + } + + /* Set up machine specific audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_sync_endpoints(codec); + return 0; +} + +/* this configures the clocking between the WM8753 and the BT codec */ +unsigned int mainstone_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + /* wm8753 has pll that generates mclk from 13MHz xtal */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 13000000); +} + +static struct snd_soc_dai_link mainstone_dai[] = { +{ /* Hifi Playback - for similatious use with voice below */ + .name = "WM8753", + .stream_name = "WM8753 HiFi 1", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8753_dai[WM8753_DAI_MODE1_HIFI], + .init = mainstone_wm8753_init, + .config_sysclk = mainstone_config_sysclk, +}, +{ /* Voice via BT */ + .name = "Bluetooth", + .stream_name = "Voice", + .cpu_dai = mainstone_bt_dai, + .codec_dai = &wm8753_dai[WM8753_DAI_MODE1_VOICE], + .config_sysclk = mainstone_config_sysclk, +}, +{ /* Hifi Playback and Capture - exclusive of BT */ + .name = "WM8753", + .stream_name = "WM8753 HiFi 3", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8753_dai[WM8753_DAI_MODE3_HIFI], + .config_sysclk = mainstone_config_sysclk, +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .probe = mainstone_probe, + .remove = mainstone_remove, + .suspend_pre = mainstone_suspend, + .resume_post = mainstone_resume, + .ops = &mainstone_ops, + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct snd_soc_device mainstone_snd_wm8753_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8753, +}; + +static struct platform_device *mainstone_snd_wm8753_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_wm8753_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_wm8753_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_wm8753_device, &mainstone_snd_wm8753_devdata); + mainstone_snd_wm8753_devdata.dev = &mainstone_snd_wm8753_device->dev; + + if((ret = platform_device_add(mainstone_snd_wm8753_device)) != 0) + platform_device_put(mainstone_snd_wm8753_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_wm8753_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("Mainstone Example Bluetooth PCM Interface"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_wm8731.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_wm8731.c @@ -0,0 +1,156 @@ +/* + * mainstone.c -- SoC audio for Mainstone + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Mainstone audio amplifier code taken from arch/arm/mach-pxa/mainstone.c + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 5th June 2006 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/wm8731.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; + + +static const struct snd_soc_dapm_widget dapm_widgets[] = { + SND_SOC_DAPM_MIC("Int Mic", NULL), + SND_SOC_DAPM_SPK("Ext Spk", NULL), +}; + +static const char* intercon[][3] = { + + /* speaker connected to LHPOUT */ + {"Ext Spk", NULL, "LHPOUT"}, + + /* mic is connected to Mic Jack, with WM8731 Mic Bias */ + {"MICIN", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Int Mic"}, + + /* terminator */ + {NULL, NULL, NULL}, +}; + +/* + * Logic for a wm8731 as connected on a Endrelia ETI-B1 board. + */ +static int mainstone_wm8731_init(struct snd_soc_codec *codec) +{ + int i; + + + /* Add specific widgets */ + for(i = 0; i < ARRAY_SIZE(dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &dapm_widgets[i]); + } + + /* Set up specific audio path interconnects */ + for(i = 0; intercon[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, intercon[i][0], intercon[i][1], intercon[i][2]); + } + + /* not connected */ + snd_soc_dapm_set_endpoint(codec, "RLINEIN", 0); + snd_soc_dapm_set_endpoint(codec, "LLINEIN", 0); + + /* always connected */ + snd_soc_dapm_set_endpoint(codec, "Int Mic", 1); + snd_soc_dapm_set_endpoint(codec, "Ext Spk", 1); + + snd_soc_dapm_sync_endpoints(codec); + + return 0; +} + +unsigned int mainstone_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + /* we have a 12.288MHz crystal */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 12288000); +} + +static struct snd_soc_dai_link mainstone_dai[] = { +{ + .name = "WM8731", + .stream_name = "WM8731 HiFi", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8731_dai, + .init = mainstone_wm8731_init, + .config_sysclk = mainstone_config_sysclk, +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct wm8731_setup_data corgi_wm8731_setup = { + .i2c_address = 0x1b, +}; + +static struct snd_soc_device mainstone_snd_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8731, + .codec_data = &corgi_wm8731_setup, +}; + +static struct platform_device *mainstone_snd_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_device, &mainstone_snd_devdata); + mainstone_snd_devdata.dev = &mainstone_snd_device->dev; + ret = platform_device_add(mainstone_snd_device); + + if (ret) + platform_device_put(mainstone_snd_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC WM8731 Mainstone"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_wm8753.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_wm8753.c @@ -0,0 +1,247 @@ +/* + * mainstone.c -- SoC audio for Mainstone + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Mainstone audio amplifier code taken from arch/arm/mach-pxa/mainstone.c + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 30th Oct 2005 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/wm8753.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; + +static int mainstone_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if(rtd->cpu_dai->type == SND_SOC_DAI_PCM && rtd->cpu_dai->id == 1) { + /* enable USB on the go MUX so we can use SSPFRM2 */ + MST_MSCWR2 |= MST_MSCWR2_USB_OTG_SEL; + MST_MSCWR2 &= ~MST_MSCWR2_USB_OTG_RST; + } + return 0; +} + +static void mainstone_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if(rtd->cpu_dai->type == SND_SOC_DAI_PCM && rtd->cpu_dai->id == 1) { + /* disable USB on the go MUX so we can use ttyS0 */ + MST_MSCWR2 &= ~MST_MSCWR2_USB_OTG_SEL; + MST_MSCWR2 |= MST_MSCWR2_USB_OTG_RST; + } +} + +static struct snd_soc_ops mainstone_ops = { + .startup = mainstone_startup, + .shutdown = mainstone_shutdown, +}; + +static long mst_audio_suspend_mask; + +static int mainstone_suspend(struct platform_device *pdev, pm_message_t state) +{ + mst_audio_suspend_mask = MST_MSCWR2; + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_resume(struct platform_device *pdev) +{ + MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_probe(struct platform_device *pdev) +{ + MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_remove(struct platform_device *pdev) +{ + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +/* example machine audio_mapnections */ +static const char* audio_map[][3] = { + + /* mic is connected to mic1 - with bias */ + {"MIC1", NULL, "Mic Bias"}, + {"MIC1N", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Mic1 Jack"}, + {"Mic Bias", NULL, "Mic1 Jack"}, + + {"ACIN", NULL, "ACOP"}, + {NULL, NULL, NULL}, +}; + +/* headphone detect support on my board */ +static const char * hp_pol[] = {"Headphone", "Speaker"}; +static const struct soc_enum wm8753_enum = + SOC_ENUM_SINGLE(WM8753_OUTCTL, 1, 2, hp_pol); + +static const struct snd_kcontrol_new wm8753_mainstone_controls[] = { + SOC_SINGLE("Headphone Detect Switch", WM8753_OUTCTL, 6, 1, 0), + SOC_ENUM("Headphone Detect Polarity", wm8753_enum), +}; + +/* + * This is an example machine initialisation for a wm8753 connected to a + * Mainstone II. It is missing logic to detect hp/mic insertions and logic + * to re-route the audio in such an event. + */ +static int mainstone_wm8753_init(struct snd_soc_codec *codec) +{ + int i, err; + + /* set up mainstone codec pins */ + snd_soc_dapm_set_endpoint(codec, "RXP", 0); + snd_soc_dapm_set_endpoint(codec, "RXN", 0); + snd_soc_dapm_set_endpoint(codec, "MIC2", 0); + + /* add mainstone specific controls */ + for (i = 0; i < ARRAY_SIZE(wm8753_mainstone_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8753_mainstone_controls[i],codec, NULL))) < 0) + return err; + } + + /* set up mainstone specific audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_sync_endpoints(codec); + return 0; +} + +unsigned int mainstone_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + /* wm8753 has pll that generates mclk from 13MHz xtal */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 13000000); +} + +static struct snd_soc_dai_link mainstone_dai[] = { +{ + .name = "WM8753", + .stream_name = "WM8753 HiFi 1", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8753_dai[WM8753_DAI_MODE1_HIFI], + .init = mainstone_wm8753_init, + .config_sysclk = mainstone_config_sysclk, +}, +{ + .name = "WM8753", + .stream_name = "WM8753 Voice 1", + .cpu_dai = &pxa_ssp_dai[PXA2XX_DAI_SSP2], + .codec_dai = &wm8753_dai[WM8753_DAI_MODE1_VOICE], + .config_sysclk = mainstone_config_sysclk, +}, +{ + .name = "WM8753", + .stream_name = "WM8753 Voice 2", + .cpu_dai = &pxa_ssp_dai[PXA2XX_DAI_SSP2], + .codec_dai = &wm8753_dai[WM8753_DAI_MODE2_VOICE], + .config_sysclk = mainstone_config_sysclk, +}, +{ + .name = "WM8753", + .stream_name = "WM8753 HiFi 3", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8753_dai[WM8753_DAI_MODE3_HIFI], + .config_sysclk = mainstone_config_sysclk, +}, +{ + .name = "WM8753", + .stream_name = "WM8753 HiFi 4", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8753_dai[WM8753_DAI_MODE4_HIFI], + .config_sysclk = mainstone_config_sysclk, +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .probe = mainstone_probe, + .remove = mainstone_remove, + .suspend_pre = mainstone_suspend, + .resume_post = mainstone_resume, + .ops = &mainstone_ops, + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct wm8753_setup_data mainstone_wm8753_setup = { + .i2c_address = 0x1a, +}; + +static struct snd_soc_device mainstone_snd_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8753, + .codec_data = &mainstone_wm8753_setup, +}; + +static struct platform_device *mainstone_snd_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_device, &mainstone_snd_devdata); + mainstone_snd_devdata.dev = &mainstone_snd_device->dev; + ret = platform_device_add(mainstone_snd_device); + + if (ret) + platform_device_put(mainstone_snd_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC WM8753 Mainstone"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_wm8974.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_wm8974.c @@ -0,0 +1,112 @@ +/* + * mainstone.c -- SoC audio for Mainstone + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Mainstone audio amplifier code taken from arch/arm/mach-pxa/mainstone.c + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 30th Oct 2005 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/wm8974.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; + +static int mainstone_wm8974_init(struct snd_soc_codec *codec) +{ + return 0; +} + +unsigned int mainstone_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + /* we have a PLL */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 12288000); + +} + +static struct snd_soc_dai_link mainstone_dai[] = { +{ + .name = "WM8974", + .stream_name = "WM8974 HiFi", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8974_dai, + .init = mainstone_wm8974_init, + .config_sysclk = mainstone_config_sysclk, +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct wm8974_setup_data mainstone_wm8974_setup = { + .i2c_address = 0x1a, +}; + +static struct snd_soc_device mainstone_snd_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8974, + .codec_data = &mainstone_wm8974_setup, +}; + +static struct platform_device *mainstone_snd_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_device, &mainstone_snd_devdata); + mainstone_snd_devdata.dev = &mainstone_snd_device->dev; + ret = platform_device_add(mainstone_snd_device); + + if (ret) + platform_device_put(mainstone_snd_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC Mainstone"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_wm9712.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_wm9712.c @@ -0,0 +1,171 @@ +/* + * mainstone.c -- SoC audio for Mainstone + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Mainstone audio amplifier code taken from arch/arm/mach-pxa/mainstone.c + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 29th Jan 2006 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/wm9712.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; +static long mst_audio_suspend_mask; + +static int mainstone_suspend(struct platform_device *pdev, pm_message_t state) +{ + mst_audio_suspend_mask = MST_MSCWR2; + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_resume(struct platform_device *pdev) +{ + MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_probe(struct platform_device *pdev) +{ + MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_remove(struct platform_device *pdev) +{ + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +/* mainstone machine dapm widgets */ +static const struct snd_soc_dapm_widget mainstone_dapm_widgets[] = { + SND_SOC_DAPM_MIC("Mic (Internal)", NULL), +}; + +/* example machine interconnections */ +static const char* intercon[][3] = { + + /* mic is connected to mic1 - with bias */ + {"MIC1", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Mic (Internal)"}, + + {NULL, NULL, NULL}, +}; + +/* + * This is an example machine initialisation for a wm8753 connected to a + * Mainstone II. It is missing logic to detect hp/mic insertions and logic + * to re-route the audio in such an event. + */ +static int mainstone_wm9712_init(struct snd_soc_codec *codec) +{ + int i; + + /* set up mainstone codec pins */ + snd_soc_dapm_set_endpoint(codec, "RXP", 0); + snd_soc_dapm_set_endpoint(codec, "RXN", 0); + //snd_soc_dapm_set_endpoint(codec, "MIC2", 0); + + /* Add mainstone specific widgets */ + for(i = 0; i < ARRAY_SIZE(mainstone_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &mainstone_dapm_widgets[i]); + } + + /* set up mainstone specific audio path interconnects */ + for(i = 0; intercon[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, intercon[i][0], intercon[i][1], intercon[i][2]); + } + + snd_soc_dapm_sync_endpoints(codec); + return 0; +} + +static struct snd_soc_dai_link mainstone_dai[] = { +{ + .name = "AC97", + .stream_name = "AC97 HiFi", + .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI], + .codec_dai = &wm9712_dai[WM9712_DAI_AC97_HIFI], + .init = mainstone_wm9712_init, +}, +{ + .name = "AC97 Aux", + .stream_name = "AC97 Aux", + .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX], + .codec_dai = &wm9712_dai[WM9712_DAI_AC97_AUX], +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .probe = mainstone_probe, + .remove = mainstone_remove, + .suspend_pre = mainstone_suspend, + .resume_post = mainstone_resume, + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct snd_soc_device mainstone_snd_ac97_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm9712, +}; + +static struct platform_device *mainstone_snd_ac97_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_ac97_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_ac97_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_ac97_device, &mainstone_snd_ac97_devdata); + mainstone_snd_ac97_devdata.dev = &mainstone_snd_ac97_device->dev; + + if((ret = platform_device_add(mainstone_snd_ac97_device)) != 0) + platform_device_put(mainstone_snd_ac97_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_ac97_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC WM9712 Mainstone"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/mainstone_wm9713.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/mainstone_wm9713.c @@ -0,0 +1,255 @@ +/* + * mainstone.c -- SoC audio for Mainstone + * + * Copyright 2006 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * Mainstone audio amplifier code taken from arch/arm/mach-pxa/mainstone.c + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 29th Jan 2006 Initial version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "../codecs/wm9713.h" +#include "pxa2xx-pcm.h" + +static struct snd_soc_machine mainstone; + +static int mainstone_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if(rtd->cpu_dai->type == SND_SOC_DAI_PCM && rtd->cpu_dai->id == 1) { + /* enable USB on the go MUX so we can use SSPFRM2 */ + MST_MSCWR2 |= MST_MSCWR2_USB_OTG_SEL; + MST_MSCWR2 &= ~MST_MSCWR2_USB_OTG_RST; + } + return 0; +} + +static void mainstone_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if(rtd->cpu_dai->type == SND_SOC_DAI_PCM && rtd->cpu_dai->id == 1) { + /* disable USB on the go MUX so we can use ttyS0 */ + MST_MSCWR2 &= ~MST_MSCWR2_USB_OTG_SEL; + MST_MSCWR2 |= MST_MSCWR2_USB_OTG_RST; + } +} + +static struct snd_soc_ops mainstone_ops = { + .startup = mainstone_startup, + .shutdown = mainstone_shutdown, +}; + +static int test = 0; +static int get_test(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = test; + return 0; +} + +static int set_test(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + + test = ucontrol->value.integer.value[0]; + if(test) { + + } else { + + } + return 0; +} + +static long mst_audio_suspend_mask; + +static int mainstone_suspend(struct platform_device *pdev, pm_message_t state) +{ + mst_audio_suspend_mask = MST_MSCWR2; + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_resume(struct platform_device *pdev) +{ + MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_probe(struct platform_device *pdev) +{ + MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static int mainstone_remove(struct platform_device *pdev) +{ + MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; + return 0; +} + +static const char* test_function[] = {"Off", "On"}; +static const struct soc_enum mainstone_enum[] = { + SOC_ENUM_SINGLE_EXT(2, test_function), +}; + +static const struct snd_kcontrol_new mainstone_controls[] = { + SOC_ENUM_EXT("ATest Function", mainstone_enum[0], get_test, set_test), +}; + +/* mainstone machine dapm widgets */ +static const struct snd_soc_dapm_widget mainstone_dapm_widgets[] = { + SND_SOC_DAPM_MIC("Mic (Internal)", NULL), +}; + +/* example machine audio_mapnections */ +static const char* audio_map[][3] = { + + /* mic is connected to mic1 - with bias */ + {"MIC1", NULL, "Mic Bias"}, + {"Mic Bias", NULL, "Mic (Internal)"}, + + {NULL, NULL, NULL}, +}; + +/* + * This is an example machine initialisation for a wm9713 connected to a + * Mainstone II. It is missing logic to detect hp/mic insertions and logic + * to re-route the audio in such an event. + */ +static int mainstone_wm9713_init(struct snd_soc_codec *codec) +{ + int i, err; + + /* set up mainstone codec pins */ + snd_soc_dapm_set_endpoint(codec, "RXP", 0); + snd_soc_dapm_set_endpoint(codec, "RXN", 0); + //snd_soc_dapm_set_endpoint(codec, "MIC2", 0); + + /* Add test specific controls */ + for (i = 0; i < ARRAY_SIZE(mainstone_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&mainstone_controls[i],codec, NULL))) < 0) + return err; + } + + /* Add mainstone specific widgets */ + for(i = 0; i < ARRAY_SIZE(mainstone_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &mainstone_dapm_widgets[i]); + } + + /* set up mainstone specific audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_sync_endpoints(codec); + return 0; +} + +/* configure the system audio clock */ +unsigned int mainstone_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 24576000); +} + +static struct snd_soc_dai_link mainstone_dai[] = { +{ + .name = "AC97", + .stream_name = "AC97 HiFi", + .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_HIFI], + .codec_dai = &wm9713_dai[WM9713_DAI_AC97_HIFI], + .init = mainstone_wm9713_init, + .config_sysclk = mainstone_config_sysclk, +}, +{ + .name = "AC97 Aux", + .stream_name = "AC97 Aux", + .cpu_dai = &pxa_ac97_dai[PXA2XX_DAI_AC97_AUX], + .codec_dai = &wm9713_dai[WM9713_DAI_AC97_AUX], + .config_sysclk = mainstone_config_sysclk, +}, +{ + .name = "WM9713", + .stream_name = "WM9713 Voice", + .cpu_dai = &pxa_ssp_dai[PXA2XX_DAI_SSP2], + .codec_dai = &wm9713_dai[WM9713_DAI_PCM_VOICE], + .config_sysclk = mainstone_config_sysclk, +}, +}; + +static struct snd_soc_machine mainstone = { + .name = "Mainstone", + .probe = mainstone_probe, + .remove = mainstone_remove, + .suspend_pre = mainstone_suspend, + .resume_post = mainstone_resume, + .ops = &mainstone_ops, + .dai_link = mainstone_dai, + .num_links = ARRAY_SIZE(mainstone_dai), +}; + +static struct snd_soc_device mainstone_snd_ac97_devdata = { + .machine = &mainstone, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm9713, +}; + +static struct platform_device *mainstone_snd_ac97_device; + +static int __init mainstone_init(void) +{ + int ret; + + mainstone_snd_ac97_device = platform_device_alloc("soc-audio", -1); + if (!mainstone_snd_ac97_device) + return -ENOMEM; + + platform_set_drvdata(mainstone_snd_ac97_device, &mainstone_snd_ac97_devdata); + mainstone_snd_ac97_devdata.dev = &mainstone_snd_ac97_device->dev; + + if((ret = platform_device_add(mainstone_snd_ac97_device)) != 0) + platform_device_put(mainstone_snd_ac97_device); + + return ret; +} + +static void __exit mainstone_exit(void) +{ + platform_device_unregister(mainstone_snd_ac97_device); +} + +module_init(mainstone_init); +module_exit(mainstone_exit); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("ALSA SoC WM9713 Mainstone"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/poodle.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/poodle.c @@ -0,0 +1,304 @@ +/* + * poodle.c -- SoC audio for Poodle + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Copyright 2005 Openedhand Ltd. + * + * Authors: Liam Girdwood + * Richard Purdie + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "../codecs/wm8731.h" +#include "pxa2xx-pcm.h" + +#define POODLE_HP 0 +#define POODLE_HP_OFF 1 +#define POODLE_SPK_ON 0 +#define POODLE_SPK_OFF 1 + + /* audio clock in Hz - rounded from 12.235MHz */ +#define POODLE_AUDIO_CLOCK 12288000 + +static int poodle_jack_func = 0; +static int poodle_spk_func = 0; + +static void poodle_ext_control(struct snd_soc_codec *codec) +{ + int spk = 0; + + /* set up jack connection */ + if (poodle_jack_func == POODLE_HP) { + /* set = unmute headphone */ + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_L, 1); + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_R, 1); + snd_soc_dapm_set_endpoint(codec, "Headphone Jack", 1); + } else { + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_L, 0); + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_R, 0); + snd_soc_dapm_set_endpoint(codec, "Headphone Jack", 0); + } + + if (poodle_spk_func == POODLE_SPK_ON) + spk = 1; +printk("p ext ctrl jackf %d spkf %d spk %d\n", poodle_jack_func, poodle_spk_func, spk); + /* set the enpoints to their new connetion states */ + snd_soc_dapm_set_endpoint(codec, "Ext Spk", spk); + + /* signal a DAPM event */ + snd_soc_dapm_sync_endpoints(codec); +} + +static int poodle_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->socdev->codec; +printk("p startup\n"); + /* check the jack status at stream startup */ + poodle_ext_control(codec); + return 0; +} + +/* we need to unmute the HP at shutdown as the mute burns power on poodle */ +static int poodle_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_codec *codec = rtd->socdev->codec; +printk("shutdown hp unmute\n"); + /* set = unmute headphone */ + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_L, 1); + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_R, 1); + return 0; +} + +static struct snd_soc_ops poodle_ops = { + .startup = poodle_startup, + .shutdown = poodle_shutdown, +}; + +static int poodle_get_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = poodle_jack_func; + return 0; +} + +static int poodle_set_jack(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + poodle_jack_func = ucontrol->value.integer.value[0]; +printk("p set jack %d\n", poodle_jack_func); + poodle_ext_control(codec); + return 0; +} + +static int poodle_get_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = poodle_spk_func; + return 0; +} + +static int poodle_set_spk(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + poodle_spk_func = ucontrol->value.integer.value[0]; +printk("p set spk %d\n", poodle_spk_func); + poodle_ext_control(codec); + return 0; +} + +static int poodle_amp_event(struct snd_soc_dapm_widget *w, int event) +{ +printk("p amp event %d\n",SND_SOC_DAPM_EVENT_ON(event)); + if (SND_SOC_DAPM_EVENT_ON(event)) + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_AMP_ON, 0); + else + locomo_gpio_write2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_AMP_ON, 1); + + return 0; +} + +/* poodle machine dapm widgets */ +static const struct snd_soc_dapm_widget wm8731_dapm_widgets[] = { +SND_SOC_DAPM_HP("Headphone Jack", NULL), +SND_SOC_DAPM_SPK("Ext Spk", poodle_amp_event), +}; + +/* Corgi machine audio_mapnections to the codec pins */ +static const char* audio_map[][3] = { + + /* headphone connected to LHPOUT1, RHPOUT1 */ + {"Headphone Jack", NULL, "LHPOUT"}, + {"Headphone Jack", NULL, "RHPOUT"}, + + /* speaker connected to LOUT, ROUT */ + {"Ext Spk", NULL, "ROUT"}, + {"Ext Spk", NULL, "LOUT"}, + + {NULL, NULL, NULL}, +}; + +static const char *jack_function[] = {"Headphone", "Off"}; +static const char *spk_function[] = {"On", "Off"}; +static const struct soc_enum poodle_enum[] = { + SOC_ENUM_SINGLE_EXT(2, jack_function), + SOC_ENUM_SINGLE_EXT(2, spk_function), +}; + +static const snd_kcontrol_new_t wm8731_poodle_controls[] = { + SOC_ENUM_EXT("Jack Function", poodle_enum[0], poodle_get_jack, poodle_set_jack), + SOC_ENUM_EXT("Speaker Function", poodle_enum[1], poodle_get_spk, poodle_set_spk), +}; + +/* + * Logic for a wm8731 as connected on a Sharp SL-C7x0 Device + */ +static int poodle_wm8731_init(struct snd_soc_codec *codec) +{ + int i, err; + + snd_soc_dapm_set_endpoint(codec, "LLINEIN", 0); + snd_soc_dapm_set_endpoint(codec, "RLINEIN", 0); + snd_soc_dapm_set_endpoint(codec, "MICIN", 1); + + /* Add poodle specific controls */ + for (i = 0; i < ARRAY_SIZE(wm8731_poodle_controls); i++) { + if ((err = snd_ctl_add(codec->card, + snd_soc_cnew(&wm8731_poodle_controls[i],codec, NULL))) < 0) + return err; + } + + /* Add poodle specific widgets */ + for(i = 0; i < ARRAY_SIZE(wm8731_dapm_widgets); i++) { + snd_soc_dapm_new_control(codec, &wm8731_dapm_widgets[i]); + } + + /* Set up poodle specific audio path audio_mapnects */ + for(i = 0; audio_map[i][0] != NULL; i++) { + snd_soc_dapm_connect_input(codec, audio_map[i][0], audio_map[i][1], audio_map[i][2]); + } + + snd_soc_dapm_sync_endpoints(codec); + return 0; +} + +unsigned int poodle_config_sysclk(struct snd_soc_pcm_runtime *rtd, + struct snd_soc_clock_info *info) +{ + if(info->bclk_master & SND_SOC_DAIFMT_CBS_CFS) { + /* pxa2xx is i2s master */ + switch(info->rate) { + case 44100: + case 88200: + /* configure codec digital filters for 44.1, 88.2 */ + rtd->codec_dai->config_sysclk(rtd->codec_dai, info, 11289600); + break; + default: + /* configure codec digital filters for all other rates */ + rtd->codec_dai->config_sysclk(rtd->codec_dai, info, POODLE_AUDIO_CLOCK); + break; + } + return rtd->cpu_dai->config_sysclk(rtd->cpu_dai, info, POODLE_AUDIO_CLOCK); + } else { + /* codec is i2s master - only configure codec DAI clock and filters */ + return rtd->codec_dai->config_sysclk(rtd->codec_dai, info, POODLE_AUDIO_CLOCK); + } +} + +/* poodle digital audio interface glue - connects codec <--> CPU */ +static struct snd_soc_dai_link poodle_dai = { + .name = "WM8731", + .stream_name = "WM8731", + .cpu_dai = &pxa_i2s_dai, + .codec_dai = &wm8731_dai, + .init = poodle_wm8731_init, + .config_sysclk = poodle_config_sysclk, +}; + +/* poodle audio machine driver */ +static struct snd_soc_machine snd_soc_machine_poodle = { + .name = "Poodle", + .dai_link = &poodle_dai, + .num_links = 1, + .ops = &poodle_ops, +}; + +/* poodle audio private data */ +static struct wm8731_setup_data poodle_wm8731_setup = { + .i2c_address = 0x1b, +}; + +/* poodle audio subsystem */ +static struct snd_soc_device poodle_snd_devdata = { + .machine = &snd_soc_machine_poodle, + .platform = &pxa2xx_soc_platform, + .codec_dev = &soc_codec_dev_wm8731, + .codec_data = &poodle_wm8731_setup, +}; + +static struct platform_device *poodle_snd_device; + +static int __init poodle_init(void) +{ + int ret; + + if (!machine_is_poodle()) + return -ENODEV; + + locomo_gpio_set_dir2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_AMP_ON, 0); + /* should we mute HP at startup - burning power ?*/ + locomo_gpio_set_dir2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_L, 0); + locomo_gpio_set_dir2(&poodle_locomo_device, POODLE_LOCOMO_GPIO_MUTE_R, 0); + + poodle_snd_device = platform_device_alloc("soc-audio", -1); + if (!poodle_snd_device) + return -ENOMEM; + + platform_set_drvdata(poodle_snd_device, &poodle_snd_devdata); + poodle_snd_devdata.dev = &poodle_snd_device->dev; + ret = platform_device_add(poodle_snd_device); + + if (ret) + platform_device_put(poodle_snd_device); + + return ret; +} + +static void __exit poodle_exit(void) +{ + platform_device_unregister(poodle_snd_device); +} + +module_init(poodle_init); +module_exit(poodle_exit); + +/* Module information */ +MODULE_AUTHOR("Richard Purdie"); +MODULE_DESCRIPTION("ALSA SoC Poodle"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/pxa2xx-ac97.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/pxa2xx-ac97.c @@ -0,0 +1,431 @@ +/* + * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip. + * + * Author: Nicolas Pitre + * Created: Dec 02, 2004 + * Copyright: MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "pxa2xx-pcm.h" + +static DECLARE_MUTEX(car_mutex); +static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); +static volatile long gsr_bits; + +#define AC97_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define AC97_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) + +/* may need to expand this */ +static struct snd_soc_dai_mode pxa2xx_ac97_modes[] = { + {0, 0, SNDRV_PCM_FORMAT_S16_LE, AC97_RATES}, +}; + +/* + * Beware PXA27x bugs: + * + * o Slot 12 read from modem space will hang controller. + * o CDONE, SDONE interrupt fails after any slot 12 IO. + * + * We therefore have an hybrid approach for waiting on SDONE (interrupt or + * 1 jiffy timeout if interrupt never comes). + */ + +static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) +{ + unsigned short val = -1; + volatile u32 *reg_addr; + + down(&car_mutex); + + /* set up primary or secondary codec/modem space */ +#ifdef CONFIG_PXA27x + reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE; +#else + if (reg == AC97_GPIO_STATUS) + reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE; + else + reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE; +#endif + reg_addr += (reg >> 1); + +#ifndef CONFIG_PXA27x + if (reg == AC97_GPIO_STATUS) { + /* read from controller cache */ + val = *reg_addr; + goto out; + } +#endif + + /* start read access across the ac97 link */ + GSR = GSR_CDONE | GSR_SDONE; + gsr_bits = 0; + val = *reg_addr; + + wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1); + if (!((GSR | gsr_bits) & GSR_SDONE)) { + printk(KERN_ERR "%s: read error (ac97_reg=%x GSR=%#lx)\n", + __FUNCTION__, reg, GSR | gsr_bits); + val = -1; + goto out; + } + + /* valid data now */ + GSR = GSR_CDONE | GSR_SDONE; + gsr_bits = 0; + val = *reg_addr; + /* but we've just started another cycle... */ + wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1); + +out: up(&car_mutex); + return val; +} + +static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) +{ + volatile u32 *reg_addr; + + down(&car_mutex); + + /* set up primary or secondary codec/modem space */ +#ifdef CONFIG_PXA27x + reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE; +#else + if (reg == AC97_GPIO_STATUS) + reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE; + else + reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE; +#endif + reg_addr += (reg >> 1); + + GSR = GSR_CDONE | GSR_SDONE; + gsr_bits = 0; + *reg_addr = val; + wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1); + if (!((GSR | gsr_bits) & GSR_CDONE)) + printk(KERN_ERR "%s: write error (ac97_reg=%x GSR=%#lx)\n", + __FUNCTION__, reg, GSR | gsr_bits); + + up(&car_mutex); +} + +static void pxa2xx_ac97_warm_reset(struct snd_ac97 *ac97) +{ + gsr_bits = 0; + +#ifdef CONFIG_PXA27x + /* warm reset broken on Bulverde, + so manually keep AC97 reset high */ + pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); + udelay(10); + GCR |= GCR_WARM_RST; + pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); + udelay(500); +#else + GCR |= GCR_WARM_RST | GCR_PRIRDY_IEN | GCR_SECRDY_IEN; + wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); +#endif + + if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) + printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", + __FUNCTION__, gsr_bits); + + GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); + GCR |= GCR_SDONE_IE|GCR_CDONE_IE; +} + +static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97) +{ + GCR &= GCR_COLD_RST; /* clear everything but nCRST */ + GCR &= ~GCR_COLD_RST; /* then assert nCRST */ + + gsr_bits = 0; +#ifdef CONFIG_PXA27x + /* PXA27x Developers Manual section 13.5.2.2.1 */ + pxa_set_cken(1 << 31, 1); + udelay(5); + pxa_set_cken(1 << 31, 0); + GCR = GCR_COLD_RST; + udelay(50); +#else + GCR = GCR_COLD_RST; + GCR |= GCR_CDONE_IE|GCR_SDONE_IE; + wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); +#endif + + if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) + printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n", + __FUNCTION__, gsr_bits); + + GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); + GCR |= GCR_SDONE_IE|GCR_CDONE_IE; +} + +static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs) +{ + long status; + + status = GSR; + if (status) { + GSR = status; + gsr_bits |= status; + wake_up(&gsr_wq); + +#ifdef CONFIG_PXA27x + /* Although we don't use those we still need to clear them + since they tend to spuriously trigger when MMC is used + (hardware bug? go figure)... */ + MISR = MISR_EOC; + PISR = PISR_EOC; + MCSR = MCSR_EOC; +#endif + + return IRQ_HANDLED; + } + + return IRQ_NONE; +} + +struct snd_ac97_bus_ops soc_ac97_ops = { + .read = pxa2xx_ac97_read, + .write = pxa2xx_ac97_write, + .warm_reset = pxa2xx_ac97_warm_reset, + .reset = pxa2xx_ac97_cold_reset, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_stereo_out = { + .name = "AC97 PCM Stereo out", + .dev_addr = __PREG(PCDR), + .drcmr = &DRCMRTXPCDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_stereo_in = { + .name = "AC97 PCM Stereo in", + .dev_addr = __PREG(PCDR), + .drcmr = &DRCMRRXPCDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_aux_mono_out = { + .name = "AC97 Aux PCM (Slot 5) Mono out", + .dev_addr = __PREG(MODR), + .drcmr = &DRCMRTXMODR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_aux_mono_in = { + .name = "AC97 Aux PCM (Slot 5) Mono in", + .dev_addr = __PREG(MODR), + .drcmr = &DRCMRRXMODR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ac97_pcm_mic_mono_in = { + .name = "AC97 Mic PCM (Slot 6) Mono in", + .dev_addr = __PREG(MCDR), + .drcmr = &DRCMRRXMCDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +#ifdef CONFIG_PM +static int pxa2xx_ac97_suspend(struct platform_device *pdev, + struct snd_soc_cpu_dai *dai) +{ + GCR |= GCR_ACLINK_OFF; + pxa_set_cken(CKEN2_AC97, 0); + return 0; +} + +static int pxa2xx_ac97_resume(struct platform_device *pdev, + struct snd_soc_cpu_dai *dai) +{ + pxa_gpio_mode(GPIO31_SYNC_AC97_MD); + pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); + pxa_gpio_mode(GPIO28_BITCLK_AC97_MD); + pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); +#ifdef CONFIG_PXA27x + /* Use GPIO 113 as AC97 Reset on Bulverde */ + pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); +#endif + pxa_set_cken(CKEN2_AC97, 1); + return 0; +} + +#else +#define pxa2xx_ac97_suspend NULL +#define pxa2xx_ac97_resume NULL +#endif + +static int pxa2xx_ac97_probe(struct platform_device *pdev) +{ + int ret; + + ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL); + if (ret < 0) + goto err; + + pxa_gpio_mode(GPIO31_SYNC_AC97_MD); + pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); + pxa_gpio_mode(GPIO28_BITCLK_AC97_MD); + pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); +#ifdef CONFIG_PXA27x + /* Use GPIO 113 as AC97 Reset on Bulverde */ + pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); +#endif + pxa_set_cken(CKEN2_AC97, 1); + return 0; + + err: + if (CKEN & CKEN2_AC97) { + GCR |= GCR_ACLINK_OFF; + free_irq(IRQ_AC97, NULL); + pxa_set_cken(CKEN2_AC97, 0); + } + return ret; +} + +static void pxa2xx_ac97_remove(struct platform_device *pdev) +{ + GCR |= GCR_ACLINK_OFF; + free_irq(IRQ_AC97, NULL); + pxa_set_cken(CKEN2_AC97, 0); +} + +static int pxa2xx_ac97_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + rtd->cpu_dai->dma_data = &pxa2xx_ac97_pcm_stereo_out; + else + rtd->cpu_dai->dma_data = &pxa2xx_ac97_pcm_stereo_in; + + return 0; +} + +static int pxa2xx_ac97_hw_aux_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + rtd->cpu_dai->dma_data = &pxa2xx_ac97_pcm_aux_mono_out; + else + rtd->cpu_dai->dma_data = &pxa2xx_ac97_pcm_aux_mono_in; + + return 0; +} + +static int pxa2xx_ac97_hw_mic_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + return -ENODEV; + else + rtd->cpu_dai->dma_data = &pxa2xx_ac97_pcm_mic_mono_in; + + return 0; +} + +/* + * There is only 1 physical AC97 interface for pxa2xx, but it + * has extra fifo's that can be used for aux DACs and ADCs. + */ +struct snd_soc_cpu_dai pxa_ac97_dai[] = { +{ + .name = "pxa2xx-ac97", + .id = 0, + .type = SND_SOC_DAI_AC97, + .probe = pxa2xx_ac97_probe, + .remove = pxa2xx_ac97_remove, + .suspend = pxa2xx_ac97_suspend, + .resume = pxa2xx_ac97_resume, + .playback = { + .stream_name = "AC97 Playback", + .channels_min = 2, + .channels_max = 2,}, + .capture = { + .stream_name = "AC97 Capture", + .channels_min = 2, + .channels_max = 2,}, + .ops = { + .hw_params = pxa2xx_ac97_hw_params,}, + .caps = { + .num_modes = ARRAY_SIZE(pxa2xx_ac97_modes), + .mode = pxa2xx_ac97_modes,}, +}, +{ + .name = "pxa2xx-ac97-aux", + .id = 1, + .type = SND_SOC_DAI_AC97, + .playback = { + .stream_name = "AC97 Aux Playback", + .channels_min = 1, + .channels_max = 1,}, + .capture = { + .stream_name = "AC97 Aux Capture", + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .hw_params = pxa2xx_ac97_hw_aux_params,}, + .caps = { + .num_modes = ARRAY_SIZE(pxa2xx_ac97_modes), + .mode = pxa2xx_ac97_modes,}, +}, +{ + .name = "pxa2xx-ac97-mic", + .id = 2, + .type = SND_SOC_DAI_AC97, + .capture = { + .stream_name = "AC97 Mic Capture", + .channels_min = 1, + .channels_max = 1,}, + .ops = { + .hw_params = pxa2xx_ac97_hw_mic_params,}, + .caps = { + .num_modes = ARRAY_SIZE(pxa2xx_ac97_modes), + .mode = pxa2xx_ac97_modes,},}, +}; + +EXPORT_SYMBOL_GPL(pxa_ac97_dai); +EXPORT_SYMBOL_GPL(soc_ac97_ops); + +MODULE_AUTHOR("Nicolas Pitre"); +MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/pxa2xx-i2s.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/pxa2xx-i2s.c @@ -0,0 +1,298 @@ +/* + * pxa2xx-i2s.c -- ALSA Soc Audio Layer + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 12th Aug 2005 Initial version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "pxa2xx-pcm.h" + +/* used to disable sysclk if external crystal is used */ +static int extclk = 0; +module_param(extclk, int, 0); +MODULE_PARM_DESC(extclk, "set to 1 to disable pxa2xx i2s sysclk"); + +struct pxa_i2s_port { + u32 sadiv; + u32 sacr0; + u32 sacr1; + u32 saimr; + int master; +}; +static struct pxa_i2s_port pxa_i2s; + +#define PXA_I2S_DAIFMT \ + (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF) + +#define PXA_I2S_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define PXA_I2S_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) + +/* priv is divider */ +static struct snd_soc_dai_mode pxa2xx_i2s_modes[] = { + /* pxa2xx I2S frame and clock master modes */ + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_8000, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x48}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_11025, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x34}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_16000, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x24}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_22050, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0x1a}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_44100, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0xd}, + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBS_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + SNDRV_PCM_RATE_48000, PXA_I2S_DIR, SND_SOC_DAI_BFS_DIV, 256, + SND_SOC_FSBD(4), 0xc}, + + /* pxa2xx I2S frame master and clock slave mode */ + {PXA_I2S_DAIFMT | SND_SOC_DAIFMT_CBM_CFS, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + PXA_I2S_RATES, PXA_I2S_DIR, 0, SND_SOC_FS_ALL, SND_SOC_FSB(64), 0x48}, + +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_i2s_pcm_stereo_out = { + .name = "I2S PCM Stereo out", + .dev_addr = __PREG(SADR), + .drcmr = &DRCMRTXSADR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_i2s_pcm_stereo_in = { + .name = "I2S PCM Stereo in", + .dev_addr = __PREG(SADR), + .drcmr = &DRCMRRXSADR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_gpio_t gpio_bus[] = { + { /* I2S SoC Slave */ + .rx = GPIO29_SDATA_IN_I2S_MD, + .tx = GPIO30_SDATA_OUT_I2S_MD, + .clk = GPIO28_BITCLK_IN_I2S_MD, + .frm = GPIO31_SYNC_I2S_MD, + }, + { /* I2S SoC Master */ + .sys = GPIO32_SYSCLK_I2S_MD, + .rx = GPIO29_SDATA_IN_I2S_MD, + .tx = GPIO30_SDATA_OUT_I2S_MD, + .clk = GPIO28_BITCLK_OUT_I2S_MD, + .frm = GPIO31_SYNC_I2S_MD, + }, +}; + +static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + if (!rtd->cpu_dai->active) { + SACR0 |= SACR0_RST; + SACR0 = 0; + } + + return 0; +} + +/* wait for I2S controller to be ready */ +static int pxa_i2s_wait(void) +{ + int i; + /* flush the Rx FIFO */ + for(i = 0; i < 16; i++) + SADR; + return 0; +} + +static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + + pxa_i2s.master = 0; + if(rtd->cpu_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CBS_CFS) + pxa_i2s.master = 1; + + if (pxa_i2s.master && !extclk){ + pxa_gpio_mode(gpio_bus[pxa_i2s.master].sys); + } + + pxa_gpio_mode(gpio_bus[pxa_i2s.master].rx); + pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx); + pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm); + pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk); + pxa_set_cken(CKEN8_I2S, 1); + pxa_i2s_wait(); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + rtd->cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_out; + else + rtd->cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_in; + + /* is port used by another stream */ + if (SACR0 & SACR0_ENB) { + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + SACR1 &= ~SACR1_DRPL; + SAIMR |= SAIMR_TFS; + } else { + SACR1 &= ~SACR1_DREC; + SAIMR |= SAIMR_RFS; + } + } else { + SACR0 = 0; + SACR1 = 0; + SAIMR = SACR1_DRPL | SACR1_DREC; + if (pxa_i2s.master) + SACR0 |= SACR0_BCKD; + + SACR0 |= SACR0_RFTH(14) | SACR0_TFTH(1); + + if (rtd->cpu_dai->dai_runtime.fmt & SND_SOC_DAIFMT_LEFT_J) + SACR1 |= SACR1_AMSL; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + SACR1 &= ~SACR1_DRPL; + SAIMR |= SAIMR_TFS; + } else { + SACR1 &= ~SACR1_DREC; + SAIMR |= SAIMR_RFS; + } + } + + SADIV = rtd->cpu_dai->dai_runtime.priv; + return 0; +} + +static int pxa2xx_i2s_prepare(struct snd_pcm_substream *substream) +{ + SACR0 |= SACR0_ENB; + return 0; +} + +static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream) +{ + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + SACR1 |= SACR1_DRPL; + SAIMR &= ~SAIMR_TFS; + } else { + SACR1 |= SACR1_DREC; + SAIMR &= ~SAIMR_RFS; + } + + if (SACR1 & (SACR1_DREC | SACR1_DRPL)) { + SACR0 &= ~SACR0_ENB; + pxa_i2s_wait(); + pxa_set_cken(CKEN8_I2S, 0); + } +} + +#ifdef CONFIG_PM +static int pxa2xx_i2s_suspend(struct platform_device *dev, + struct snd_soc_cpu_dai *dai) +{ + if(!dai->active) + return 0; + + /* disable link and store registers */ + SACR0 &= ~SACR0_ENB; + pxa_i2s_wait(); + pxa_i2s.sacr0 = SACR0; + pxa_i2s.sacr1 = SACR1; + pxa_i2s.saimr = SAIMR; + pxa_i2s.sadiv = SADIV; + pxa_set_cken(CKEN8_I2S, 0); + return 0; +} + +static int pxa2xx_i2s_resume(struct platform_device *pdev, + struct snd_soc_cpu_dai *dai) +{ + if(!dai->active) + return 0; + + pxa_set_cken(CKEN8_I2S, 1); + pxa_i2s_wait(); + + SACR0 = pxa_i2s.sacr0; + SACR1 = pxa_i2s.sacr1; + SAIMR = pxa_i2s.saimr; + SADIV = pxa_i2s.sadiv; + SACR0 |= SACR0_ENB; + + return 0; +} + +#else +#define pxa2xx_i2s_suspend NULL +#define pxa2xx_i2s_resume NULL +#endif + +/* pxa2xx I2S sysclock is always 256 FS */ +static unsigned int pxa_i2s_config_sysclk(struct snd_soc_cpu_dai *iface, + struct snd_soc_clock_info *info, unsigned int clk) +{ + return info->rate << 8; +} + +struct snd_soc_cpu_dai pxa_i2s_dai = { + .name = "pxa2xx-i2s", + .id = 0, + .type = SND_SOC_DAI_I2S, + .suspend = pxa2xx_i2s_suspend, + .resume = pxa2xx_i2s_resume, + .config_sysclk = pxa_i2s_config_sysclk, + .playback = { + .channels_min = 2, + .channels_max = 2,}, + .capture = { + .channels_min = 2, + .channels_max = 2,}, + .ops = { + .startup = pxa2xx_i2s_startup, + .shutdown = pxa2xx_i2s_shutdown, + .prepare = pxa2xx_i2s_prepare, + .hw_params = pxa2xx_i2s_hw_params,}, + .caps = { + .num_modes = ARRAY_SIZE(pxa2xx_i2s_modes), + .mode = pxa2xx_i2s_modes,}, +}; + +EXPORT_SYMBOL_GPL(pxa_i2s_dai); + +/* Module information */ +MODULE_AUTHOR("Liam Girdwood, liam.girdwood@wolfsonmicro.com, www.wolfsonmicro.com"); +MODULE_DESCRIPTION("pxa2xx I2S SoC Interface"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/pxa2xx-pcm.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/pxa2xx-pcm.c @@ -0,0 +1,369 @@ +/* + * linux/sound/arm/pxa2xx-pcm.c -- ALSA PCM interface for the Intel PXA2xx chip + * + * Author: Nicolas Pitre + * Created: Nov 30, 2004 + * Copyright: (C) 2004 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pxa2xx-pcm.h" + +static const struct snd_pcm_hardware pxa2xx_pcm_hardware = { + .info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_RESUME, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + .period_bytes_min = 32, + .period_bytes_max = 8192 - 32, + .periods_min = 1, + .periods_max = PAGE_SIZE/sizeof(pxa_dma_desc), + .buffer_bytes_max = 128 * 1024, + .fifo_size = 32, +}; + +struct pxa2xx_runtime_data { + int dma_ch; + pxa2xx_pcm_dma_params_t *params; + pxa_dma_desc *dma_desc_array; + dma_addr_t dma_desc_array_phys; +}; + +static void pxa2xx_pcm_dma_irq(int dma_ch, void *dev_id, struct pt_regs *regs) +{ + struct snd_pcm_substream *substream = dev_id; + struct pxa2xx_runtime_data *prtd = substream->runtime->private_data; + int dcsr; + + dcsr = DCSR(dma_ch); + DCSR(dma_ch) = dcsr & ~DCSR_STOPIRQEN; + + if (dcsr & DCSR_ENDINTR) { + snd_pcm_period_elapsed(substream); + } else { + printk( KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n", + prtd->params->name, dma_ch, dcsr ); + } +} + +static int pxa2xx_pcm_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct pxa2xx_runtime_data *prtd = runtime->private_data; + struct snd_soc_pcm_runtime *rtd = substream->private_data; + size_t totsize = params_buffer_bytes(params); + size_t period = params_period_bytes(params); + pxa2xx_pcm_dma_params_t *dma = rtd->cpu_dai->dma_data; + pxa_dma_desc *dma_desc; + dma_addr_t dma_buff_phys, next_desc_phys; + int ret; + + /* this may get called several times by oss emulation with different params */ + if(prtd->params != NULL) + pxa_free_dma(prtd->dma_ch); + prtd->params = dma; + if((ret = pxa_request_dma(prtd->params->name, DMA_PRIO_LOW, + pxa2xx_pcm_dma_irq, substream)) < 0) + return ret; + prtd->dma_ch = ret; + + snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); + runtime->dma_bytes = totsize; + + dma_desc = prtd->dma_desc_array; + next_desc_phys = prtd->dma_desc_array_phys; + dma_buff_phys = runtime->dma_addr; + do { + next_desc_phys += sizeof(pxa_dma_desc); + dma_desc->ddadr = next_desc_phys; + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + dma_desc->dsadr = dma_buff_phys; + dma_desc->dtadr = prtd->params->dev_addr; + } else { + dma_desc->dsadr = prtd->params->dev_addr; + dma_desc->dtadr = dma_buff_phys; + } + if (period > totsize) + period = totsize; + dma_desc->dcmd = prtd->params->dcmd | period | DCMD_ENDIRQEN; + dma_desc++; + dma_buff_phys += period; + } while (totsize -= period); + dma_desc[-1].ddadr = prtd->dma_desc_array_phys; + + return 0; +} + +static int pxa2xx_pcm_hw_free(struct snd_pcm_substream *substream) +{ + struct pxa2xx_runtime_data *prtd = substream->runtime->private_data; + + if(prtd && prtd->params) + *prtd->params->drcmr = 0; + + if(prtd->dma_ch) { + snd_pcm_set_runtime_buffer(substream, NULL); + pxa_free_dma(prtd->dma_ch); + prtd->dma_ch = 0; + prtd->params = NULL; + } + + return 0; +} + +static int pxa2xx_pcm_prepare(struct snd_pcm_substream *substream) +{ + struct pxa2xx_runtime_data *prtd = substream->runtime->private_data; + + DCSR(prtd->dma_ch) &= ~DCSR_RUN; + DCSR(prtd->dma_ch) = 0; + DCMD(prtd->dma_ch) = 0; + *prtd->params->drcmr = prtd->dma_ch | DRCMR_MAPVLD; + + return 0; +} + +static int pxa2xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) +{ + struct pxa2xx_runtime_data *prtd = substream->runtime->private_data; + int ret = 0; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + DDADR(prtd->dma_ch) = prtd->dma_desc_array_phys; + DCSR(prtd->dma_ch) = DCSR_RUN; + break; + + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + DCSR(prtd->dma_ch) &= ~DCSR_RUN; + break; + + case SNDRV_PCM_TRIGGER_RESUME: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + DCSR(prtd->dma_ch) |= DCSR_RUN; + break; + + default: + ret = -EINVAL; + } + + return ret; +} + +static snd_pcm_uframes_t pxa2xx_pcm_pointer(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct pxa2xx_runtime_data *prtd = runtime->private_data; + + dma_addr_t ptr = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? + DSADR(prtd->dma_ch) : DTADR(prtd->dma_ch); + snd_pcm_uframes_t x = bytes_to_frames(runtime, ptr - runtime->dma_addr); + + if (x == runtime->buffer_size) + x = 0; + return x; +} + +static int +pxa2xx_pcm_hw_rule_mult32(struct snd_pcm_hw_params *params, + struct snd_pcm_hw_rule *rule) +{ + struct snd_interval *i = hw_param_interval(params, rule->var); + int changed = 0; + + if (i->min & 31) { + i->min = (i->min & ~31) + 32; + i->openmin = 0; + changed = 1; + } + + if (i->max & 31) { + i->max &= ~31; + i->openmax = 0; + changed = 1; + } + + return changed; +} + +static int pxa2xx_pcm_open(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct pxa2xx_runtime_data *prtd; + int ret; + + snd_soc_set_runtime_hwparams(substream, &pxa2xx_pcm_hardware); + + /* + * For mysterious reasons (and despite what the manual says) + * playback samples are lost if the DMA count is not a multiple + * of the DMA burst size. Let's add a rule to enforce that. + */ + ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, + pxa2xx_pcm_hw_rule_mult32, NULL, + SNDRV_PCM_HW_PARAM_PERIOD_BYTES, -1); + if (ret) + goto out; + + ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, + pxa2xx_pcm_hw_rule_mult32, NULL, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES, -1); + if (ret) + goto out; + + if((prtd = kzalloc(sizeof(struct pxa2xx_runtime_data), GFP_KERNEL)) == NULL) { + ret = -ENOMEM; + goto out; + } + + prtd->dma_desc_array = + dma_alloc_writecombine(substream->pcm->card->dev, PAGE_SIZE, + &prtd->dma_desc_array_phys, GFP_KERNEL); + if (!prtd->dma_desc_array) + goto err1; + + runtime->private_data = prtd; + return 0; + + err1: + kfree(prtd); + out: + return ret; +} + +static int pxa2xx_pcm_close(struct snd_pcm_substream *substream) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + struct pxa2xx_runtime_data *prtd = runtime->private_data; + + dma_free_writecombine(substream->pcm->card->dev, PAGE_SIZE, + prtd->dma_desc_array, prtd->dma_desc_array_phys); + kfree(prtd); + return 0; +} + +static int +pxa2xx_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma) +{ + struct snd_pcm_runtime *runtime = substream->runtime; + return dma_mmap_writecombine(substream->pcm->card->dev, vma, + runtime->dma_area, + runtime->dma_addr, + runtime->dma_bytes); +} + +struct snd_pcm_ops pxa2xx_pcm_ops = { + .open = pxa2xx_pcm_open, + .close = pxa2xx_pcm_close, + .ioctl = snd_pcm_lib_ioctl, + .hw_params = pxa2xx_pcm_hw_params, + .hw_free = pxa2xx_pcm_hw_free, + .prepare = pxa2xx_pcm_prepare, + .trigger = pxa2xx_pcm_trigger, + .pointer = pxa2xx_pcm_pointer, + .mmap = pxa2xx_pcm_mmap, +}; + +static int pxa2xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) +{ + struct snd_pcm_substream *substream = pcm->streams[stream].substream; + struct snd_dma_buffer *buf = &substream->dma_buffer; + size_t size = pxa2xx_pcm_hardware.buffer_bytes_max; + buf->dev.type = SNDRV_DMA_TYPE_DEV; + buf->dev.dev = pcm->card->dev; + buf->private_data = NULL; + buf->area = dma_alloc_writecombine(pcm->card->dev, size, + &buf->addr, GFP_KERNEL); + if (!buf->area) + return -ENOMEM; + buf->bytes = size; + return 0; +} + +static void pxa2xx_pcm_free_dma_buffers(struct snd_pcm *pcm) +{ + struct snd_pcm_substream *substream; + struct snd_dma_buffer *buf; + int stream; + + for (stream = 0; stream < 2; stream++) { + substream = pcm->streams[stream].substream; + if (!substream) + continue; + + buf = &substream->dma_buffer; + if (!buf->area) + continue; + + dma_free_writecombine(pcm->card->dev, buf->bytes, + buf->area, buf->addr); + buf->area = NULL; + } +} + +static u64 pxa2xx_pcm_dmamask = 0xffffffff; + +int pxa2xx_pcm_new(struct snd_card *card, struct snd_soc_codec_dai *dai, + struct snd_pcm *pcm) +{ + int ret = 0; + + if (!card->dev->dma_mask) + card->dev->dma_mask = &pxa2xx_pcm_dmamask; + if (!card->dev->coherent_dma_mask) + card->dev->coherent_dma_mask = 0xffffffff; + + if (dai->playback.channels_min) { + ret = pxa2xx_pcm_preallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK); + if (ret) + goto out; + } + + if (dai->capture.channels_min) { + ret = pxa2xx_pcm_preallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE); + if (ret) + goto out; + } + out: + return ret; +} + +struct snd_soc_platform pxa2xx_soc_platform = { + .name = "pxa2xx-audio", + .pcm_ops = &pxa2xx_pcm_ops, + .pcm_new = pxa2xx_pcm_new, + .pcm_free = pxa2xx_pcm_free_dma_buffers, +}; + +EXPORT_SYMBOL_GPL(pxa2xx_soc_platform); + +MODULE_AUTHOR("Nicolas Pitre"); +MODULE_DESCRIPTION("Intel PXA2xx PCM DMA module"); +MODULE_LICENSE("GPL"); Index: linux-2.6-pxa/sound/soc/pxa/pxa2xx-pcm.h =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/pxa2xx-pcm.h @@ -0,0 +1,48 @@ +/* + * linux/sound/arm/pxa2xx-pcm.h -- ALSA PCM interface for the Intel PXA2xx chip + * + * Author: Nicolas Pitre + * Created: Nov 30, 2004 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _PXA2XX_PCM_H +#define _PXA2XX_PCM_H + +typedef struct { + char *name; /* stream identifier */ + u32 dcmd; /* DMA descriptor dcmd field */ + volatile u32 *drcmr; /* the DMA request channel to use */ + u32 dev_addr; /* device physical address for DMA */ +} pxa2xx_pcm_dma_params_t; + +typedef struct { + u32 sys; + u32 rx; + u32 tx; + u32 clk; + u32 frm; +} pxa2xx_gpio_t; + +/* pxa2xx DAI ID's */ +#define PXA2XX_DAI_AC97_HIFI 0 +#define PXA2XX_DAI_AC97_AUX 1 +#define PXA2XX_DAI_AC97_MIC 2 +#define PXA2XX_DAI_I2S 0 +#define PXA2XX_DAI_SSP1 0 +#define PXA2XX_DAI_SSP2 1 +#define PXA2XX_DAI_SSP3 2 + +extern struct snd_soc_cpu_dai pxa_ac97_dai[3]; +extern struct snd_soc_cpu_dai pxa_i2s_dai; +extern struct snd_soc_cpu_dai pxa_ssp_dai[3]; + +/* platform data */ +extern struct snd_soc_platform pxa2xx_soc_platform; +extern struct snd_ac97_bus_ops pxa2xx_ac97_ops; + +#endif Index: linux-2.6-pxa/sound/soc/pxa/pxa2xx-ssp.c =================================================================== --- /dev/null +++ linux-2.6-pxa/sound/soc/pxa/pxa2xx-ssp.c @@ -0,0 +1,586 @@ +/* + * pxa2xx-ssp.c -- ALSA Soc Audio Layer + * + * Copyright 2005 Wolfson Microelectronics PLC. + * Author: Liam Girdwood + * liam.girdwood@wolfsonmicro.com or linux@wolfsonmicro.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Revision history + * 12th Aug 2005 Initial version. + * + * TODO: + * o Fix master mode (bug) + * o Fix resume (bug) + * o Add support for other clocks + * o Test network mode for > 16bit sample size + */ + +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "pxa2xx-pcm.h" + +/* + * SSP sysclock frequency in Hz + * Neither default pxa2xx PLL clocks are good for audio, hence pxa27x + * has audio clock. I would recommend using the pxa27x audio clock or an external + * clock or making the codec master to gurantee better sample rates. + */ +#ifdef CONFIG_PXA27x +static int sysclk[3] = {13000000, 13000000, 13000000}; +#else +static int sysclk[3] = {1843200, 1843200, 1843200}; +#endif +module_param_array(sysclk, int, NULL, 0); +MODULE_PARM_DESC(sysclk, "sysclk frequency in Hz"); + +/* + * SSP sysclock source. + * sysclk is ignored if audio clock is used + */ +#ifdef CONFIG_PXA27x +static int clksrc[3] = {0, 0, 0}; +#else +static int clksrc[3] = {0, 0, 0}; +#endif +module_param_array(clksrc, int, NULL, 0); +MODULE_PARM_DESC(clksrc, "sysclk source, 0 = internal PLL, 1 = ext, 2 = network, 3 = audio clock"); + +/* + * SSP GPIO's + */ +#define GPIO26_SSP1RX_MD (26 | GPIO_ALT_FN_1_IN) +#define GPIO25_SSP1TX_MD (25 | GPIO_ALT_FN_2_OUT) +#define GPIO23_SSP1CLKS_MD (23 | GPIO_ALT_FN_2_IN) +#define GPIO24_SSP1FRMS_MD (24 | GPIO_ALT_FN_2_IN) +#define GPIO23_SSP1CLKM_MD (23 | GPIO_ALT_FN_2_OUT) +#define GPIO24_SSP1FRMM_MD (24 | GPIO_ALT_FN_2_OUT) + +#define GPIO11_SSP2RX_MD (11 | GPIO_ALT_FN_2_IN) +#define GPIO13_SSP2TX_MD (13 | GPIO_ALT_FN_1_OUT) +#define GPIO22_SSP2CLKS_MD (22 | GPIO_ALT_FN_3_IN) +#define GPIO88_SSP2FRMS_MD (88 | GPIO_ALT_FN_3_IN) +#define GPIO22_SSP2CLKM_MD (22 | GPIO_ALT_FN_3_OUT) +#define GPIO88_SSP2FRMM_MD (88 | GPIO_ALT_FN_3_OUT) + +#define GPIO82_SSP3RX_MD (82 | GPIO_ALT_FN_1_IN) +#define GPIO81_SSP3TX_MD (81 | GPIO_ALT_FN_1_OUT) +#define GPIO84_SSP3CLKS_MD (84 | GPIO_ALT_FN_1_IN) +#define GPIO83_SSP3FRMS_MD (83 | GPIO_ALT_FN_1_IN) +#define GPIO84_SSP3CLKM_MD (84 | GPIO_ALT_FN_1_OUT) +#define GPIO83_SSP3FRMM_MD (83 | GPIO_ALT_FN_1_OUT) + +#define PXA_SSP_MDAIFMT \ + (SND_SOC_DAIFMT_DSP_B |SND_SOC_DAIFMT_CBS_CFS | SND_SOC_DAIFMT_CBM_CFS | \ + SND_SOC_DAIFMT_CBS_CFM | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF) + +#define PXA_SSP_SDAIFMT \ + (SND_SOC_DAIFMT_DSP_B |SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_CBM_CFS | \ + SND_SOC_DAIFMT_CBS_CFM | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF) + +#define PXA_SSP_DIR \ + (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE) + +#define PXA_SSP_RATES \ + (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \ + SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ + SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \ + SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) + +#define PXA27x_SSP_PCM_FORMATS \ + SNDRV_PCM_FORMAT_S16_LE | SNDRV_PCM_FORMAT_S24_LE | SNDRV_PCM_FORMAT_S32_LE + +/* + * SSP modes + */ +static struct snd_soc_dai_mode pxa2xx_ssp_modes[] = { + /* port slave clk & frame modes */ + {PXA_SSP_SDAIFMT, SND_SOC_DAITDM_LRDW(0,0), SNDRV_PCM_FORMAT_S16_LE, + PXA_SSP_RATES, PXA_SSP_DIR, 0, SND_SOC_FS_ALL, SND_SOC_FSB_ALL}, + + /* port master clk & frame modes */ +#ifdef CONFIG_PXA27x + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_8000, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_11025, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_16000, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_22050, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_32000, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_44100, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_48000, PXA_SSP_DIR, 0, 256, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_88200, PXA_SSP_DIR, 0, 128, SND_SOC_FSB(64)}, + {PXA_SSP_MDAIFMT, SND_SOC_DAITDM_LRDW(0,0), PXA27x_SSP_PCM_FORMATS, + SNDRV_PCM_RATE_96000, PXA_SSP_DIR, 0, 128, SND_SOC_FSB(64)}, +#endif +}; + +static struct ssp_dev ssp[3]; +#ifdef CONFIG_PM +static struct ssp_state ssp_state[3]; +#endif + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_mono_out = { + .name = "SSP1 PCM Mono out", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRTXSSDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_mono_in = { + .name = "SSP1 PCM Mono in", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRRXSSDR, + .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | + DCMD_BURST16 | DCMD_WIDTH2, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_stereo_out = { + .name = "SSP1 PCM Stereo out", + .dev_addr = __PREG(SSDR_P1), + .drcmr = &DRCMRTXSSDR, + .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | + DCMD_BURST32 | DCMD_WIDTH4, +}; + +static pxa2xx_pcm_dma_params_t pxa2xx_ssp1_pcm_stereo_in = { +