 arch/arm/boot/compressed/head-xscale.S |    4 
 arch/arm/configs/cm_x255_defconfig     | 1497 ++++++++++++++++++++++++++++++++
 arch/arm/configs/cm_x270_defconfig     | 1485 ++++++++++++++++++++++++++++++++
 arch/arm/mach-pxa/Kconfig              |   32 +
 arch/arm/mach-pxa/Makefile             |    9 
 arch/arm/mach-pxa/cm-x255-pci.c        |  155 +++
 arch/arm/mach-pxa/cm-x255.c            |  884 +++++++++++++++++++
 arch/arm/mach-pxa/cm-x270-pci.c        |  265 ++++++
 arch/arm/mach-pxa/cm-x270.c            |  886 +++++++++++++++++++
 arch/arm/mach-pxa/cm-x2xx-fbsetup.h    |   54 +
 arch/arm/mach-pxa/leds-cm-x2xx.c       |  136 +++
 arch/arm/mach-pxa/leds.c               |    2 
 arch/arm/mach-pxa/leds.h               |    1 
 arch/arm/mach-pxa/lpc.c                |  152 +++
 arch/arm/mach-pxa/pxa27x.c             |    6 
 include/asm-arm/arch-pxa/cm-x255.h     |   97 ++
 include/asm-arm/arch-pxa/cm-x270.h     |   94 ++
 include/asm-arm/arch-pxa/hardware.h    |   13 
 include/asm-arm/arch-pxa/irqs.h        |    3 
 include/asm-arm/arch-pxa/memory.h      |   13 
 20 files changed, 5787 insertions(+), 1 deletions(-)

diff --git a/arch/arm/boot/compressed/head-xscale.S b/arch/arm/boot/compressed/head-xscale.S
index 73c5d9e..5138473 100644
--- a/arch/arm/boot/compressed/head-xscale.S
+++ b/arch/arm/boot/compressed/head-xscale.S
@@ -53,3 +53,7 @@ #ifdef CONFIG_ARCH_IXP2000
 		str	r1, [r0, #0x18]
 #endif
 
+#if defined(CONFIG_MACH_ARMCORE)
+		mov r7, #(MACH_TYPE_ARMCORE & 0xFF00)
+		add r7, r7, #(MACH_TYPE_ARMCORE & 0xFF)
+#endif
diff --git a/arch/arm/configs/cm_x255_defconfig b/arch/arm/configs/cm_x255_defconfig
new file mode 100644
index 0000000..70889fd
--- /dev/null
+++ b/arch/arm/configs/cm_x255_defconfig
@@ -0,0 +1,1497 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17
+# Mon Jul  3 15:27:12 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION="-cm-x255"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_RT_MUTEXES=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+
+#
+# Intel PXA2xx Implementations
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+CONFIG_MACH_ARMCORE=y
+# CONFIG_CM_X270 is not set
+CONFIG_CM_X255=y
+CONFIG_PXA25x=y
+CONFIG_PXA_SSP=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_HOST_ITE8152=y
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+CONFIG_PCMCIA_IOCTL=y
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+CONFIG_YENTA=m
+CONFIG_YENTA_O2=y
+CONFIG_YENTA_RICOH=y
+CONFIG_YENTA_TI=y
+CONFIG_YENTA_ENE_TUNE=y
+CONFIG_YENTA_TOSHIBA=y
+# CONFIG_PD6729 is not set
+# CONFIG_I82092 is not set
+CONFIG_PCMCIA_PXA2XX=m
+CONFIG_PCCARD_NONSTATIC=m
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_LEDS=y
+CONFIG_LEDS_TIMER=y
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyS0,38400 root=/dev/nfs"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_LEGACY=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_APM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_IEEE80211=y
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+CONFIG_WIRELESS_EXT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=m
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLOCK=m
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_H1900 is not set
+CONFIG_MTD_NAND_IDS=m
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_CM_X255=m
+# CONFIG_MTD_NAND_NANDSIM is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+CONFIG_PARPORT=m
+CONFIG_PARPORT_PC=m
+# CONFIG_PARPORT_SERIAL is not set
+# CONFIG_PARPORT_PC_FIFO is not set
+CONFIG_PARPORT_PC_SUPERIO=y
+# CONFIG_PARPORT_PC_PCMCIA is not set
+# CONFIG_PARPORT_GSC is not set
+# CONFIG_PARPORT_AX88796 is not set
+# CONFIG_PARPORT_1284 is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_PARIDE is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=12000
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=m
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDE_CM_X255=m
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_PPA is not set
+# CONFIG_SCSI_IMM is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# PCMCIA SCSI adapter support
+#
+# CONFIG_PCMCIA_AHA152X is not set
+# CONFIG_PCMCIA_FDOMAIN is not set
+# CONFIG_PCMCIA_NINJA_SCSI is not set
+# CONFIG_PCMCIA_QLOGIC is not set
+# CONFIG_PCMCIA_SYM53C500 is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+CONFIG_SMC91X=y
+CONFIG_DM9000=y
+# CONFIG_SMC911X is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_NET_POCKET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+# CONFIG_NET_WIRELESS_RTNETLINK is not set
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+# CONFIG_PCMCIA_RAYCS is not set
+
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_HERMES is not set
+# CONFIG_ATMEL is not set
+
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+# CONFIG_AIRO_CS is not set
+# CONFIG_PCMCIA_WL3501 is not set
+
+#
+# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
+#
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_BCM43XX is not set
+CONFIG_NET_WIRELESS=y
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+CONFIG_PCMCIA_PCNET=m
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PLIP is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_PARKBD is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_PCI=m
+# CONFIG_SERIAL_8250_CS is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_PRINTER is not set
+# CONFIG_PPDEV is not set
+# CONFIG_TIPAR is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_BUTTERFLY is not set
+CONFIG_SPI_PXA2XX=y
+
+#
+# SPI Protocol Masters
+#
+
+#
+# Dallas's 1-wire bus
+#
+
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia Capabilities Port drivers
+#
+# CONFIG_UCB1400_TS is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_PARAMETERS is not set
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_AC97_BUS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+
+#
+# ALSA ARM devices
+#
+CONFIG_SND_PXA2XX_PCM=y
+CONFIG_SND_PXA2XX_AC97=y
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+
+#
+# PCMCIA devices
+#
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_USS720 is not set
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_SA1100 is not set
+# CONFIG_RTC_DRV_TEST is not set
+CONFIG_RTC_DRV_MAX6902=y
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+# CONFIG_ZISOFS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=y
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_WAITQ is not set
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_PLIST=y
diff --git a/arch/arm/configs/cm_x270_defconfig b/arch/arm/configs/cm_x270_defconfig
new file mode 100644
index 0000000..5f6950c
--- /dev/null
+++ b/arch/arm/configs/cm_x270_defconfig
@@ -0,0 +1,1485 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17
+# Mon Jul  3 17:36:37 2006
+#
+CONFIG_ARM=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION="-cm-x270"
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_UID16=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_RT_MUTEXES=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+
+#
+# Block layer
+#
+# CONFIG_BLK_DEV_IO_TRACE is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS7500 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CO285 is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP3XX is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_OMAP is not set
+CONFIG_DMABOUNCE=y
+
+#
+# Intel PXA2xx Implementations
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_MACH_TRIZEPS4 is not set
+CONFIG_MACH_ARMCORE=y
+CONFIG_CM_X270=y
+# CONFIG_CM_X255 is not set
+CONFIG_CM_X270_ATXBASE=y
+# CONFIG_CM_X270_SB2XX is not set
+CONFIG_PXA27x=y
+CONFIG_IWMMXT=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+CONFIG_XSCALE_PMU=y
+
+#
+# Bus support
+#
+CONFIG_PCI=y
+CONFIG_PCI_HOST_ITE8152=y
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+CONFIG_PCCARD=y
+# CONFIG_PCMCIA_DEBUG is not set
+CONFIG_PCMCIA=y
+# CONFIG_PCMCIA_LOAD_CIS is not set
+CONFIG_PCMCIA_IOCTL=y
+CONFIG_CARDBUS=y
+
+#
+# PC-card bridges
+#
+CONFIG_YENTA=m
+CONFIG_YENTA_O2=y
+CONFIG_YENTA_RICOH=y
+CONFIG_YENTA_TI=y
+CONFIG_YENTA_ENE_TUNE=y
+CONFIG_YENTA_TOSHIBA=y
+# CONFIG_PD6729 is not set
+# CONFIG_I82092 is not set
+CONFIG_PCMCIA_PXA2XX=m
+CONFIG_PCCARD_NONSTATIC=m
+
+#
+# Kernel Features
+#
+# CONFIG_PREEMPT is not set
+# CONFIG_NO_IDLE_HZ is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_LEDS=y
+CONFIG_LEDS_TIMER=y
+CONFIG_LEDS_CPU=y
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE="console=ttyS0,38400 root=/dev/nfs"
+# CONFIG_XIP_KERNEL is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_ARTHUR is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+CONFIG_PM_LEGACY=y
+# CONFIG_PM_DEBUG is not set
+# CONFIG_APM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+CONFIG_IEEE80211_SOFTMAC=m
+# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
+CONFIG_WIRELESS_EXT=y
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=m
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AFS_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLOCK=m
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+CONFIG_MTD_NAND=m
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_H1900 is not set
+CONFIG_MTD_NAND_IDS=m
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_CM_X270=m
+# CONFIG_MTD_NAND_NANDSIM is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=12000
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+CONFIG_IDEDISK_MULTI_MODE=y
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=m
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_IDEPCI is not set
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDE_CM_X270=m
+# CONFIG_BLK_DEV_IDEDMA is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+# CONFIG_SCSI_PROC_FS is not set
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# PCMCIA SCSI adapter support
+#
+# CONFIG_PCMCIA_AHA152X is not set
+# CONFIG_PCMCIA_FDOMAIN is not set
+# CONFIG_PCMCIA_NINJA_SCSI is not set
+# CONFIG_PCMCIA_QLOGIC is not set
+# CONFIG_PCMCIA_SYM53C500 is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+# CONFIG_PHYLIB is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+CONFIG_SMC91X=y
+CONFIG_DM9000=y
+# CONFIG_SMC911X is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+CONFIG_8139TOO=m
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+CONFIG_NET_RADIO=y
+# CONFIG_NET_WIRELESS_RTNETLINK is not set
+
+#
+# Obsolete Wireless cards support (pre-802.11)
+#
+# CONFIG_STRIP is not set
+# CONFIG_PCMCIA_WAVELAN is not set
+# CONFIG_PCMCIA_NETWAVE is not set
+
+#
+# Wireless 802.11 Frequency Hopping cards support
+#
+# CONFIG_PCMCIA_RAYCS is not set
+
+#
+# Wireless 802.11b ISA/PCI cards support
+#
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_HERMES is not set
+# CONFIG_ATMEL is not set
+
+#
+# Wireless 802.11b Pcmcia/Cardbus cards support
+#
+# CONFIG_AIRO_CS is not set
+# CONFIG_PCMCIA_WL3501 is not set
+
+#
+# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
+#
+# CONFIG_PRISM54 is not set
+# CONFIG_USB_ZD1201 is not set
+# CONFIG_HOSTAP is not set
+# CONFIG_BCM43XX is not set
+CONFIG_NET_WIRELESS=y
+
+#
+# PCMCIA network device support
+#
+CONFIG_NET_PCMCIA=y
+# CONFIG_PCMCIA_3C589 is not set
+# CONFIG_PCMCIA_3C574 is not set
+# CONFIG_PCMCIA_FMVJ18X is not set
+# CONFIG_PCMCIA_PCNET is not set
+# CONFIG_PCMCIA_NMCLAN is not set
+# CONFIG_PCMCIA_SMC91C92 is not set
+# CONFIG_PCMCIA_XIRC2PS is not set
+# CONFIG_PCMCIA_AXNET is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_PCI=m
+# CONFIG_SERIAL_8250_CS is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_DRM is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+CONFIG_SPI_PXA2XX=m
+
+#
+# SPI Protocol Masters
+#
+
+#
+# Dallas's 1-wire bus
+#
+
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia Capabilities Port drivers
+#
+# CONFIG_UCB1400_TS is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+CONFIG_FIRMWARE_EDID=y
+CONFIG_FB=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_TRIDENT is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_PARAMETERS is not set
+CONFIG_FB_MBX=m
+# CONFIG_FB_VIRTUAL is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+
+#
+# Logo configuration
+#
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=y
+CONFIG_SND_AC97_BUS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+
+#
+# ALSA ARM devices
+#
+CONFIG_SND_PXA2XX_PCM=y
+CONFIG_SND_PXA2XX_AC97=y
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+
+#
+# PCMCIA devices
+#
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_SUSPEND is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+CONFIG_USB_HIDINPUT=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_SA1100 is not set
+# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+CONFIG_RTC_DRV_V3020=y
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=y
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_UNWIND_INFO is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+CONFIG_DEBUG_USER=y
+# CONFIG_DEBUG_WAITQ is not set
+CONFIG_DEBUG_ERRORS=y
+CONFIG_DEBUG_LL=y
+# CONFIG_DEBUG_ICEDCC is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index 03d07ca..cff6130 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -39,6 +39,9 @@ config MACH_TRIZEPS4
 	bool "Keith und Koep Trizeps4 DIMM-Module"
 	select PXA27x
 
+config MACH_ARMCORE
+	bool "CompuLab CM-X255, CM-X270W and CM-X270L modules"
+
 endchoice
 
 if PXA_SHARPSL
@@ -74,6 +77,35 @@ endchoice
 
 endif
 
+if MACH_ARMCORE
+choice
+	prompt "Select target CM-X2XX module and baseboard"
+
+	config CM_X270
+	bool "CM-X270W/CM-X270L models"
+	select PXA27x
+	select IWMMXT
+	select DMABOUNCE
+
+	config CM_X255
+	bool "CM-X255 model"
+	select PXA25x
+	select PXA_SSP
+endchoice
+
+endif
+
+if CM_X270
+choice
+	prompt "Select CM-X270 base board"
+	config CM_X270_ATXBASE
+	bool "ATX-X270 base board"
+
+	config CM_X270_SB2XX
+	bool "SB-270 base board"
+endchoice
+endif
+
 endmenu
 
 config MACH_POODLE
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 9093eb1..e5b5a7a 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -18,6 +18,9 @@ obj-$(CONFIG_PXA_SHARP_Cxx00)	+= spitz.o
 obj-$(CONFIG_MACH_AKITA)	+= akita-ioexp.o
 obj-$(CONFIG_MACH_POODLE)	+= poodle.o corgi_ssp.o
 obj-$(CONFIG_MACH_TOSA)         += tosa.o
+obj-$(CONFIG_CM_X270)	+= cm-x270.o
+obj-$(CONFIG_CM_X255)	+= cm-x255.o
+obj-$(CONFIG_CM_X255)	+= lpc.o
 
 # Support for blinky lights
 led-y := leds.o
@@ -25,6 +28,7 @@ led-$(CONFIG_ARCH_LUBBOCK) += leds-lubbo
 led-$(CONFIG_MACH_MAINSTONE) += leds-mainstone.o
 led-$(CONFIG_ARCH_PXA_IDP) += leds-idp.o
 led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o
+led-$(CONFIG_MACH_ARMCORE) += leds-cm-x2xx.o
 
 obj-$(CONFIG_LEDS) += $(led-y)
 
@@ -35,3 +39,8 @@ obj-$(CONFIG_PXA_SSP) += ssp.o
 ifeq ($(CONFIG_PXA27x),y)
 obj-$(CONFIG_PM) += standby.o
 endif
+
+ifeq ($(CONFIG_PCI),y)
+obj-$(CONFIG_CM_X270) += cm-x270-pci.o
+obj-$(CONFIG_CM_X255) += cm-x255-pci.o
+endif
diff --git a/arch/arm/mach-pxa/cm-x255-pci.c b/arch/arm/mach-pxa/cm-x255-pci.c
new file mode 100644
index 0000000..a4e70f0
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x255-pci.c
@@ -0,0 +1,155 @@
+/*
+ * linux/arch/arm/kernel/cm-x270-pci.c
+ *
+ * PCI bios-type initialisation for PCI machines
+ *
+ * Bits taken from various places.
+ */
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <asm/irq.h>
+#include <asm/mach/pci.h>
+#include <asm/arch/cm-x255.h>
+#include <asm/mach-types.h>
+
+#include <asm/hardware/it8152.h>
+
+unsigned long armcore_pcibios_min_mem = 0x10000000;
+unsigned long armcore_pcibios_min_io = CMX255_IT8152_VIRT + 0x03e00000 + 0x120000;
+
+/* unsigned long armcore_pcibios_min_io = 0x10000000; */
+/* unsigned long armcore_pcibios_min_mem = CMX255_IT8152_VIRT + 0x03e00000 + 0x120000; */
+unsigned long it8152_base_address = CMX255_IT8152_VIRT;
+
+EXPORT_SYMBOL(armcore_pcibios_min_io);
+EXPORT_SYMBOL(armcore_pcibios_min_mem);
+
+/* static int irqmap_IT8152[] __initdata = { PCI_INTA, PCI_INTB, PCI_INTC, PCI_INTD }; */
+
+static u8 __init cmx255_pci_swizzle(struct pci_dev *dev, u8 *pin)
+{
+	return PCI_SLOT(dev->devfn);
+}
+
+static int __init cmx255_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+	if((dev->vendor==0x1283) && (dev->device==0x8152) &&
+	   ((dev->class >> 8)==0x801)) return(CDMA_INT);
+	if((dev->vendor==0x1283) && (dev->device==0x0801) &&
+	   ((dev->class >> 8)==0x401)) return(AUDIO_INT);
+	if((dev->vendor==0x1283) && (dev->device==0x8152) &&
+	   ((dev->class >> 8)==0xc03)) return(USB_INT);
+
+/* 	For IT8152 EB	 */
+/* 	return(irqmap_IT8152[(slot+pin-2)%4]); */
+		
+	/* ATXBASE PCI slot */
+	if ( slot == 7 )
+		return(PCI_INTA);
+
+	/* ATXBASE/SB-X270 CardBus*/
+	if ( (slot == 8) || (slot == 0) )
+		return(PCI_INTB);
+
+	/* ATXBASE ETH */
+	if ( slot == 9 )
+		return(PCI_INTA);
+
+	/* ARMCore onboard ETH */
+	if ( slot == 15 )
+		return(PCI_INTC);
+
+	/* ARMBase ETH */
+	if ( slot == 16 )
+		return(PCI_INTA);
+
+	/* PC104+ interrupt routing */
+	if ( (slot == 17) || (slot == 19) )
+		return(PCI_INTA);
+	if ( (slot == 18) || (slot == 20) )
+		return(PCI_INTB);
+   
+	return(0);
+}
+
+extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
+extern struct pci_bus * it8152_pci_scan_bus(int nr, struct pci_sys_data *sys);
+
+static struct pci_bus* __init cmx255_pci_scan_bus(int nr, struct pci_sys_data *sys)
+{
+	IT8152_PCI_CFG_ADDR	= 0x800;
+	if(IT8152_PCI_CFG_DATA == 0x81521283) {
+		printk("PCI Bridge found.\n");
+
+		IT8152_GPIO_GPLR=0x20;
+
+/***********	CardBus Controller on ATXBASE configuration	********/		
+		IT8152_PCI_CFG_ADDR	= 0x4000;
+		if(IT8152_PCI_CFG_DATA == 0xAC51104C) {
+			unsigned int temp;
+			printk("CardBus Bridge found.\n");
+
+			// Configure socket 0
+			IT8152_PCI_CFG_ADDR	= 0x408C;
+			IT8152_PCI_CFG_DATA = 0x1022;
+
+			IT8152_PCI_CFG_ADDR	= 0x4080;
+			IT8152_PCI_CFG_DATA = 0x3844d060;
+
+			IT8152_PCI_CFG_ADDR	= 0x4090;
+			temp = IT8152_PCI_CFG_DATA;
+			temp = temp & 0xFFFF;
+			temp = temp | (0x60440000);
+			IT8152_PCI_CFG_ADDR	= 0x4090;
+			IT8152_PCI_CFG_DATA = temp;
+
+			IT8152_PCI_CFG_ADDR	= 0x4018;
+			IT8152_PCI_CFG_DATA = 0xb0000000;
+
+			// Configure socket 1
+			IT8152_PCI_CFG_ADDR	= 0x418C;
+			IT8152_PCI_CFG_DATA = 0x1022;
+
+			IT8152_PCI_CFG_ADDR	= 0x4180;
+			IT8152_PCI_CFG_DATA = 0x3844d060;
+
+			IT8152_PCI_CFG_ADDR	= 0x4190;
+			temp = IT8152_PCI_CFG_DATA;
+			temp = temp & 0xFFFF;
+			temp = temp | (0x60440000);
+			IT8152_PCI_CFG_ADDR	= 0x4190;
+			IT8152_PCI_CFG_DATA = temp;
+
+			IT8152_PCI_CFG_ADDR	= 0x4118;
+			IT8152_PCI_CFG_DATA = 0xb0000000;  
+ 		}
+/***********	End of CardBus controller configuration	**************/
+	}
+//	printk("IT8152 memory control register: %x\n",IT8152_MC_SDCR);
+//	printk("IT8152 PCI control register: %x\n", IT8152_MC_PCICR);
+
+	return it8152_pci_scan_bus(nr, sys);
+/* 	return pci_scan_bus(0, &it8152_ops, sys); */
+}
+
+static struct hw_pci cmx255_pci __initdata = {
+	.swizzle		= cmx255_pci_swizzle,
+	.map_irq		= cmx255_pci_map_irq,
+	.nr_controllers		= 1,
+	.setup			= it8152_pci_setup,
+	.scan			= cmx255_pci_scan_bus,
+};
+
+static int __init cmx255_init_pci(void)
+{
+	if (machine_is_armcore()) {
+		pci_common_init(&cmx255_pci);
+	}
+	return 0;
+}
+
+subsys_initcall(cmx255_init_pci);
diff --git a/arch/arm/mach-pxa/cm-x255.c b/arch/arm/mach-pxa/cm-x255.c
new file mode 100644
index 0000000..1c5d757
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x255.c
@@ -0,0 +1,884 @@
+/*
+ * linux/arch/arm/mach-pxa/cm-x255.c
+ *
+ * Copyright (C) 2003, 2006 Compulab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/pm.h>
+#include <linux/fb.h>
+
+#include <linux/platform_device.h>
+
+#include <linux/dm9000.h>
+#include <linux/serial_8250.h>
+#include <linux/spi/spi.h>
+
+#include <linux/irq.h>
+
+#include <asm/mach-types.h>
+#include <asm/io.h>
+#include <asm/delay.h>
+
+#include <asm/hardware/it8711.h>
+#include <asm/hardware/it8152.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/pxafb.h>
+#include <asm/arch/bitfield.h>
+#include <asm/arch/cm-x255.h>
+#include <asm/arch/pxa2xx_spi.h>
+
+#include "generic.h"
+#include "cm-x2xx-fbsetup.h"
+
+extern void InitLPCInterface(void);
+extern int SearchIT8711(void);
+
+int init_8711_keyboard(void)
+{
+	unsigned char data;
+	int i;
+
+	outb(0xaa, KBD_COMMAND); /* send self-test cmd */
+	i = 0;
+	while (!(inb(KBD_COMMAND) & 0x1)) { /* wait output buffer full */
+		i++;
+		if (i > 0xffffff)
+			return 1;
+	}
+
+	data = inb(KBD_DATA);
+	outb(0xcb, KBD_COMMAND); /* set ps2 mode */
+	while (inb(KBD_COMMAND) & 0x2) { /* wait while input buffer full */
+		i++;
+		if (i > 0xffffff)
+			return 1;
+	}
+	outb(0x01, KBD_DATA);
+	while (inb(KBD_COMMAND) & 0x2) { /* wait while input buffer full */
+		i++;
+		if (i > 0xffffff)
+			return 1;
+	}
+
+	outb(0x60, KBD_COMMAND); /* write 8042 command byte */
+	while (inb(KBD_COMMAND) & 0x2) { /* wait while input buffer full */
+		i++;
+		if (i > 0xffffff)
+			return 1;
+	}
+	outb(0x45, KBD_DATA); /* at interface, keyboard enabled, system flag */
+	while (inb(KBD_COMMAND) & 0x2) { /* wait while input buffer full */
+		i++;
+		if (i > 0xffffff)
+			return 1;
+	}
+
+	outb(0xae, KBD_COMMAND); /* enable interface */
+	return 0;
+}
+
+/* DM9000 */
+#define DM9000_PHYS_BASE	(0x06000000)
+#define RTC_PHYS_BASE		(PXA_CS1_PHYS + (5 << 22))
+
+static struct resource cmx255_dm9k_resource[] = {
+	[0] = {
+		.start = DM9000_PHYS_BASE,
+		.end   = DM9000_PHYS_BASE + 3,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DM9000_PHYS_BASE + 4,
+		.end   = DM9000_PHYS_BASE + 4 + 500,
+		.flags = IORESOURCE_MEM,
+	},
+	[2] = {
+		.start = CMX255_ETHIRQ,
+		.end   = CMX255_ETHIRQ,
+		.flags = IORESOURCE_IRQ,
+	}
+};
+
+/* for the moment we limit ourselves to 32bit IO until some
+ * better IO routines can be written and tested
+*/
+
+static struct dm9000_plat_data cmx255_dm9k_platdata = {
+	.flags		= DM9000_PLATF_32BITONLY,
+};
+
+static struct platform_device cmx255_device_dm9k = {
+	.name		= "dm9000",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(cmx255_dm9k_resource),
+	.resource	= cmx255_dm9k_resource,
+	.dev		= {
+		.platform_data = &cmx255_dm9k_platdata,
+	}
+};
+
+/* audio device */
+static struct platform_device cmx255_audio_device = {
+	.name		= "pxa2xx-ac97",
+	.id		= -1,
+};
+
+/* touchscreen controller */
+static struct platform_device cmx255_ts_device = {
+	.name		= "ucb1x00",
+	.id		= -1,
+};
+
+/* UART on the ITE8152 chip */
+#ifdef CONFIG_PCI
+static struct plat_serial8250_port ite_uart_port[] = {
+	{
+		.irq		= IRQ_ITESER,		/* interrupt number */
+		.uartclk	= 115200 * 16,	/* UART clock rate */
+		.iotype		= UPIO_MEM,		/* UPIO_* */
+		.flags		= UPF_BOOT_AUTOCONF,
+	},
+	{}
+};
+
+static struct platform_device iteuart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev			= {
+		.platform_data	= ite_uart_port,
+	},
+};
+#endif
+
+static struct spi_board_info spi_board_info[] __initdata = {
+	[0] = {
+		.modalias	= "max6902",
+		.max_speed_hz	=	1000000,
+		.bus_num	= 1,
+		.chip_select	= 0,
+	},
+};
+
+static struct resource pxa_spi_ssp_resources[] = {
+	[0] = {
+		.start	= __PREG(SSCR0_P(1)),
+		.end	= __PREG(SSCR0_P(1)) + 0x2c,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_SSP,
+		.end	= IRQ_SSP,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct pxa2xx_spi_master pxa_ssp_master_info = {
+	.ssp_type = PXA25x_SSP,
+	.clock_enable = CKEN3_SSP,
+	.num_chipselect = 1,
+};
+
+static struct platform_device pxa_spi_ssp = {
+	.name = "pxa2xx-spi",
+	.id = 1,
+	.resource = pxa_spi_ssp_resources,
+	.num_resources = ARRAY_SIZE(pxa_spi_ssp_resources),
+	.dev = {
+		.platform_data = &pxa_ssp_master_info,
+	},
+};
+
+/* platform devices */
+static struct platform_device *platform_devices[] __initdata = {
+	&pxa_spi_ssp,
+	&cmx255_device_dm9k,
+	&cmx255_audio_device,
+	&cmx255_ts_device,
+#ifdef CONFIG_PCI
+	&iteuart_device,
+#endif
+};
+
+#ifdef CONFIG_PCI
+/*
+ * Install handler for IT8152 IRQ.  Yes, yes... we are way down the IRQ
+ * cascade which is not good for IRQ latency, but the hardware has been
+ * designed that way...
+ */
+static inline void cmx255_irq(int irq, struct pt_regs *regs)
+{
+	struct irqdesc *desc;
+	desc = irq_desc + irq;
+	desc_handle_irq(irq, desc, regs);
+}
+
+
+static void cmx255_irq_demux(unsigned int irq, struct irqdesc *desc,
+			     struct pt_regs *regs)
+{
+ 	int bits1, bits2, bits3;
+  
+ 	while(1) {
+		GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ);	/* clear our parent irq */
+
+ 		bits2 = IT8152_INTC_LPCNIRR;
+ 		bits1 = IT8152_INTC_PDCNIRR;
+		bits3 = IT8152_INTC_LDCNIRR;
+ 
+ 		bits1 &= (PCISERR_BIT | H2PTADR_BIT | H2PMAR_BIT |
+  		PCI_INTD_BIT | PCI_INTC_BIT | PCI_INTB_BIT | PCI_INTA_BIT |
+  				USB_INT_BIT | CDMA_INT_BIT);
+
+  
+ 		bits2 &= (SER_IRQ1_BIT | SER_IRQ3_BIT | SER_IRQ7_BIT 
+ 					| SER_IRQC_BIT);
+
+		bits3 &= ITESER_BIT;
+ 		if(! (bits1 | bits2 | bits3))
+ 			break;
+ 
+ 		IT8152_INTC_PDCNIRR = ~bits1;
+ 		IT8152_INTC_LPCNIRR = ~bits2;
+ 		IT8152_INTC_LDCNIRR = ~bits3;
+
+   		if (bits1) {
+	 		if( bits1 & PCISERR_BIT )
+  				cmx255_irq(PCISERR, regs);
+  
+ 			if( bits1 & H2PTADR_BIT )
+  				cmx255_irq(H2PTADR, regs);
+  
+	 		if( bits1 & H2PMAR_BIT )
+  				cmx255_irq(H2PMAR, regs);
+  
+	 		if( bits1 & PCI_INTA_BIT ) 
+	  			cmx255_irq(PCI_INTA, regs);
+
+	 		if( bits1 & PCI_INTB_BIT ) 
+	  			cmx255_irq(PCI_INTB, regs);
+
+	 		if( bits1 & PCI_INTC_BIT ) 
+	  			cmx255_irq(PCI_INTC, regs);
+
+	 		if( bits1 & PCI_INTD_BIT ) 
+	  			cmx255_irq(PCI_INTD, regs);
+
+	 		if( bits1 & USB_INT_BIT ) 
+  				cmx255_irq(USB_INT, regs);
+  
+	 		if( bits1 & CDMA_INT_BIT )
+  				cmx255_irq(CDMA_INT, regs);
+  		}
+	 	
+	 	if(bits2) {		
+		 	if( bits2 & SER_IRQ1_BIT )
+  				cmx255_irq(KEYBOARD_IRQ, regs);
+  
+			if( bits2 & SER_IRQ3_BIT )
+				cmx255_irq(IRQ_SIOSER, regs);
+
+			if( bits2 & SER_IRQ7_BIT )
+				cmx255_irq(IRQ_PARALLEL, regs);
+
+	 		if( bits2 & SER_IRQC_BIT )
+  				cmx255_irq(MOUSE_IRQ, regs);
+		}
+
+	 	if(bits3) {		
+		 	if( bits3 & ITESER_BIT )
+  				cmx255_irq(IRQ_ITESER, regs);
+  
+		}
+ 	}
+}
+
+#endif
+
+/* Map PCI companion and IDE/General Purpose CS statically */
+static struct map_desc cmx255_io_desc[] __initdata = {
+	{
+		.virtual	= CMX255_IDE104_VIRT,
+		.pfn		= __phys_to_pfn(CMX255_IDE104_PHYS),
+		.length		= PXA_CS_SIZE,
+		.type		= MT_DEVICE
+	},
+	{
+		.virtual	= CMX255_IT8152_VIRT,
+		.pfn		= __phys_to_pfn(CMX255_IT8152_PHYS),
+		.length		= PXA_CS_SIZE,
+		.type		= MT_DEVICE
+	},
+};
+
+/*********************** Display definitions ****************************/
+
+static int mtype=MTYPE_CRT640x480;
+static int mbpp=-1;
+
+struct cmx255_display_info {
+	struct pxafb_mach_info fb_info;
+	char *display_name;
+};
+
+static struct __initdata cmx255_display_info cmx255_displays[] = {
+	[ MTYPE_STN320x240 ] = {
+		.fb_info = {
+			.pixclock	= 76923,
+			.bpp		= 8,
+			.xres		= 320,
+			.yres		= 240,
+			.hsync_len	= 3,
+			.vsync_len	= 2,
+			.left_margin	= 3,
+			.upper_margin	= 0,
+			.right_margin	= 3,
+			.lower_margin	= 0,
+			.sync		= (FB_SYNC_HOR_HIGH_ACT |
+					   FB_SYNC_VERT_HIGH_ACT),
+			.lccr0		= 0,
+			.lccr3		= (LCCR3_PixClkDiv(0x03) |
+					   LCCR3_Acb(0xff) |
+					   LCCR3_PCP),
+			.cmap_greyscale  = 0,
+			.cmap_inverse	 = 0,
+			.cmap_static	 = 0,
+		},
+		.display_name	 = "STN 320x240",
+	},
+	[ MTYPE_TFT640x480 ] = {
+		.fb_info = {
+		.pixclock	= 38461,
+		.bpp		= 8,
+		.xres		= 640,
+		.yres		= 480,
+		.hsync_len	= 60,
+		.vsync_len	= 2,
+		.left_margin	= 70,
+		.upper_margin	= 10,
+		.right_margin	= 70,
+		.lower_margin	= 5,
+		.sync		= 0,
+		.lccr0		= (LCCR0_PAS),
+		.lccr3		= (LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff) |
+				   LCCR3_PCP),
+		.cmap_greyscale  	= 0,
+		.cmap_inverse	 	= 0,
+		.cmap_static	 	= 0,
+		},
+		.display_name		= "TFT 640x480",
+	},
+	[ MTYPE_CRT640x480 ] = {
+		.fb_info = {
+		.pixclock	= 38461,
+		.bpp		= 8,
+		.xres		= 640,
+		.yres		= 480,
+		.hsync_len	= 63,
+		.vsync_len	= 2,
+		.left_margin	= 81,
+		.upper_margin	= 33,
+		.right_margin	= 16,
+		.lower_margin	= 10,
+		.sync		= (FB_SYNC_HOR_HIGH_ACT |
+				   FB_SYNC_VERT_HIGH_ACT),
+		.lccr0		= (LCCR0_PAS),
+		.lccr3		= (LCCR3_PixClkDiv(0x01) | LCCR3_Acb(0xff)),
+		.lccr3		= LCCR3_Acb(0xff),
+		.cmap_greyscale  = 0,
+		.cmap_inverse	 = 0,
+		.cmap_static	 = 0,
+		},
+		.display_name	 = "CRT 640x480",
+	},
+	[ MTYPE_CRT800x600 ] = {
+		.fb_info = {
+		.pixclock	= 28846,
+		.bpp		= 8,
+		.xres		= 800,
+		.yres	  	= 600,
+		.hsync_len	= 63,
+		.vsync_len	= 2,
+		.left_margin	= 26,
+		.upper_margin	= 21,
+		.right_margin	= 26,
+		.lower_margin	= 11,
+		.sync		= (FB_SYNC_HOR_HIGH_ACT |
+				   FB_SYNC_VERT_HIGH_ACT),
+		.lccr0		= (LCCR0_PAS),
+		.lccr3		= (LCCR3_PixClkDiv(0x02) | LCCR3_Acb(0xff)),
+		.cmap_greyscale = 0,
+		.cmap_inverse	= 0,
+		.cmap_static	= 0,
+		},
+		.display_name	= "CRT 800x600",
+	},
+	[ MTYPE_CRT1024x768 ] = {
+		.fb_info = {
+			.pixclock = 0,
+			.xres = 0,
+			.yres = 0,
+		},
+		.display_name	= "CRT 1024x768",
+	},
+	[ MTYPE_USER_DEFINED ] = {
+		.fb_info = {
+		.pixclock	= LCD_PIXCLOCK,
+		.bpp		= LCD_BPP,
+		.xres		= LCD_XRES,
+		.yres		= LCD_YRES,
+		.hsync_len	= LCD_HORIZONTAL_SYNC_PULSE_WIDTH,
+		.vsync_len	= LCD_VERTICAL_SYNC_PULSE_WIDTH,
+		.left_margin	= LCD_BEGIN_OF_LINE_WAIT_COUNT,
+		.upper_margin	= LCD_BEGIN_FRAME_WAIT_COUNT,
+		.right_margin	= LCD_END_OF_LINE_WAIT_COUNT,
+		.lower_margin	= LCD_END_OF_FRAME_WAIT_COUNT,
+		.sync		= LCD_SYNC,
+		.lccr0		= LCD_LCCR0,
+		.lccr3		= LCD_LCCR3,
+		.cmap_greyscale = CMAP_GREYSCALE,
+		.cmap_inverse	= CMAP_INVERSE,
+		.cmap_static  	= CMAP_STATIC,
+		},
+		.display_name	= LCD_NAME,
+	},
+	[ MTYPE_TFT320x240 ] = {
+		.fb_info = {
+		.pixclock	= 134615,
+		.bpp		= 16,
+		.xres		= 320,
+		.yres		= 240,
+		.hsync_len	= 63,
+		.vsync_len	= 7,
+		.left_margin	= 75,
+		.upper_margin	= 0,
+		.right_margin	= 15,
+		.lower_margin	= 15,
+		.sync		= 0,
+		.lccr0		= (LCCR0_PAS),
+		.lccr3		= (LCCR3_PixClkDiv(0x06) | LCCR3_Acb(0xff) |
+				   LCCR3_PCP),
+		.cmap_greyscale  = 0,
+		.cmap_inverse	 = 0,
+		.cmap_static	 = 0,
+		},
+		.display_name	= "TFT 320x240",
+	},
+	[ MTYPE_STN640x480 ] = {
+		.fb_info = {
+		.pixclock	= 57692,
+		.bpp		= 8,
+		.xres		= 640,
+		.yres		= 480,
+		.hsync_len	= 4,
+		.vsync_len	= 2,
+		.left_margin	= 10,
+		.upper_margin	= 5,
+		.right_margin	= 10,
+		.lower_margin	= 5,
+		.sync		= (FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT),
+		.lccr0		= 0,
+		.lccr3		 = (LCCR3_PixClkDiv(0x02) | LCCR3_Acb(0xff)),
+		.cmap_greyscale  = 0,
+		.cmap_inverse	 = 0,
+		.cmap_static	 = 0,
+		},
+		.display_name	= "STN 640x480",
+	},
+};
+
+static int __init monitor_params(char *str)
+{
+	mtype = simple_strtol(str, NULL, 0);
+	return 1;
+}
+
+__setup("monitor=", monitor_params);
+
+static int __init fb_bpp(char *str)
+{
+	mbpp = simple_strtol(str, NULL, 0);
+	return 1;
+}
+
+__setup("bpp=", fb_bpp);
+
+
+#ifdef CONFIG_PM
+/* timeout for RTC wakeup */
+unsigned int cmx255_suspend_timeout;
+
+static ssize_t timeout_show(struct subsystem * subsys, char * buf)
+{
+	char * s = buf;
+
+	s += sprintf(s,"%d seconds\n", cmx255_suspend_timeout);
+	return (s - buf);
+}
+
+static ssize_t timeout_store(struct subsystem * subsys, const char * buf, size_t n)
+{
+	char *endp = 0;
+	int timeout;
+
+	timeout = simple_strtoul(buf, &endp, 10);
+	if ( *endp && *endp != '\n')
+		return -EINVAL;
+
+	cmx255_suspend_timeout = timeout;
+	return n;
+}
+
+static struct subsys_attribute timeout_attr = {
+	.attr	= {
+		.name = __stringify(timeout),
+		.mode = 0644,
+	},
+	.show	= timeout_show,
+	.store	= timeout_store,
+};
+
+static struct attribute * g[] = {
+	&timeout_attr.attr,
+	NULL,
+};
+
+static struct attribute_group attr_group = {
+	.attrs = g,
+};
+
+extern struct subsystem power_subsys;
+
+static unsigned long sleep_save_ite[10];
+static unsigned long sleep_save_msc[10];
+
+static int cmx255_suspend(struct sys_device *dev, pm_message_t state)
+{
+	/* save MSC registers */
+	sleep_save_msc[0] = MSC0;
+	sleep_save_msc[1] = MSC1;
+	sleep_save_msc[2] = MSC2;
+
+#ifdef CONFIG_PCI
+	/* save ITE state */
+	sleep_save_ite[0] = IT8152_INTC_PDCNIMR;
+	sleep_save_ite[1] = IT8152_INTC_LPCNIMR;
+	sleep_save_ite[2] = IT8152_INTC_LPNIAR;
+
+	/* Clear ITE IRQ's */
+	IT8152_INTC_PDCNIRR = 0;
+	IT8152_INTC_LPCNIRR = 0;
+#endif
+
+	/* setup power saving mode registers */
+	PCFR = 0x0;
+	PSLR = 0xff400000;
+	PMCR  = 0x00000005;
+	PWER  = 0x80000000;
+	PFER  = 0x00000000;
+	PRER  = 0x00000000;
+	PGSR0 = 0xC0018800;
+	PGSR1 = 0x004F0002;
+	PGSR2 = 0x6021C000;
+	PGSR3 = 0x00020000;
+
+	if ( cmx255_suspend_timeout ) {
+		RTAR = RCNR + cmx255_suspend_timeout;
+		cmx255_suspend_timeout = 0;
+	}
+
+	return 0;
+}
+
+static int cmx255_resume(struct sys_device *dev)
+{
+	/* restore MSC registers */
+	MSC0 = sleep_save_msc[0];
+	MSC1 = sleep_save_msc[1];
+	MSC2 = sleep_save_msc[2];
+
+#ifdef CONFIG_PCI
+	/* restore IT8152 state */
+	IT8152_INTC_PDCNIMR = sleep_save_ite[0];
+	IT8152_INTC_LPCNIMR = sleep_save_ite[1];
+	IT8152_INTC_LPNIAR = sleep_save_ite[2];
+#endif
+
+	return 0;
+}
+
+static struct sysdev_class cmx255_pm_sysclass = {
+	set_kset_name("pm"),
+	.resume = cmx255_resume,
+	.suspend = cmx255_suspend,
+};
+
+static struct sys_device cmx255_pm_device = {
+	.cls = &cmx255_pm_sysclass,
+};
+
+static int __init cmx255_pm_init(void)
+{
+	int error;
+	error = sysdev_class_register(&cmx255_pm_sysclass);
+	if (error == 0)
+		error = sysdev_register(&cmx255_pm_device);
+
+	error = sysfs_create_group(&power_subsys.kset.kobj,&attr_group);
+	return error;
+}
+#else
+static int __init cmx255_pm_init(void) { return 0; }
+#endif
+
+#define MEMC_SA1111	__REG(0x48000064)  /* 8 bit read register */
+static void __init cmx255_init(void)
+{
+	struct cmx255_display_info *tfbi = &cmx255_displays[2];
+
+	MEMC_SA1111 = 0x3c;
+
+	InitLPCInterface();
+
+	if (SearchIT8711()) {
+		printk("Found IT8711 Super IO\n");
+		// enable IT8711 serial ports
+ 		LPCSetConfig(LDN_SERIAL2, 0x30, 0x01); // enable
+ 		LPCSetConfig(LDN_NONE, 0x23, 0x0a); // global registers write enable
+ 		LPCSetConfig(LDN_NONE, 0x25, 0x00); // gpio
+ 		LPCSetConfig(LDN_NONE, 0x2a, 0x00); // gpio
+		LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); // enable keyboard
+		LPCSetConfig(LDN_MOUSE, 0x30, 0x1); // enable mouse
+		if (init_8711_keyboard()) {
+			printk("Unable to initialize keyboard\n");
+		}
+	}
+	else {
+		printk("IT8711 Super IO not found\n");
+	}
+
+
+	cmx255_pm_init();
+	
+	if ( mtype >= 0 && mtype < ARRAY_SIZE(cmx255_displays) )
+		tfbi = &cmx255_displays[mtype];
+
+	/* use default instead of unsupported displays */
+	if ( tfbi->fb_info.pixclock == 0 &&
+	     tfbi->fb_info.xres == 0 &&
+	     tfbi->fb_info.yres == 0 ) {
+		printk(KERN_WARNING "CM-X255 does not support %s display\n", cmx255_displays[mtype].display_name);
+		tfbi = &cmx255_displays[2];
+	}
+	     
+	if( mtype == MTYPE_USER_DEFINED ) {
+		mbpp = tfbi->fb_info.bpp;
+	}
+	if( mbpp > 0 ) {
+		if( (mbpp!=1) && (mbpp!=2) && (mbpp!=4) &&
+		    (mbpp!=8) && (mbpp!=16)) {
+			printk(KERN_WARNING "Illegal BPP value "
+			       "supplied, leaving default\n");
+			mbpp = 8;
+		}
+	} 
+	else mbpp = 8;
+	tfbi->fb_info.bpp = mbpp;
+	     
+	printk(KERN_INFO "Running a %s display with %d bits per pixel\n",
+	       tfbi->display_name, tfbi->fb_info.bpp);
+	set_pxa_fb_info(&tfbi->fb_info);
+	     
+	spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
+
+#ifdef CONFIG_PCI
+	ite_uart_port[0].membase = (void *)&IT8152_UART_BASE;		/* ioremap cookie or NULL */
+	ite_uart_port[0].mapbase = IT8152_UART_BASE;		/* resource base */
+#endif
+
+	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+}
+
+#ifdef CONFIG_PCI
+static void cmx255_mask_irq(unsigned int irq)
+{
+	switch(irq) {
+		case IT8152_IRQ(0):
+			IT8152_INTC_PDCNIMR |= PCISERR_BIT;	
+			break;
+		case IT8152_IRQ(1):
+			IT8152_INTC_PDCNIMR |= H2PTADR_BIT;	
+			break;
+		case IT8152_IRQ(2):		   
+			IT8152_INTC_PDCNIMR |= H2PMAR_BIT;	
+			break;
+		case IT8152_IRQ(3):
+			IT8152_INTC_PDCNIMR |= PCI_INTA_BIT;	
+			break;
+		case IT8152_IRQ(4):
+			IT8152_INTC_PDCNIMR |= PCI_INTB_BIT;	
+			break;
+		case IT8152_IRQ(5):
+			IT8152_INTC_PDCNIMR |= PCI_INTC_BIT;	
+			break;
+		case IT8152_IRQ(6):
+			IT8152_INTC_PDCNIMR |= PCI_INTD_BIT;	
+			break;
+		case IT8152_IRQ(7):
+			IT8152_INTC_PDCNIMR |= USB_INT_BIT;	
+			break;
+		case IT8152_IRQ(9):
+			IT8152_INTC_PDCNIMR |= CDMA_INT_BIT;	
+			break;
+		case IT8152_IRQ(10):
+			IT8152_INTC_LPCNIMR |= SER_IRQ1_BIT;	
+			break;
+		case IT8152_IRQ(11):
+			IT8152_INTC_LPCNIMR |= SER_IRQC_BIT;	
+			break;
+		case IT8152_IRQ(12):
+			IT8152_INTC_LPCNIMR |= SER_IRQ7_BIT;	
+			break;
+		case IT8152_IRQ(13):
+			IT8152_INTC_LPCNIMR |= SER_IRQ3_BIT;	
+			break;
+		case IT8152_IRQ(14):
+			IT8152_INTC_LDCNIMR |= ITESER_BIT;	
+			break;
+	} 
+}
+
+static void cmx255_unmask_irq(unsigned int irq)
+{
+	switch(irq) {
+		case IT8152_IRQ(0):
+			IT8152_INTC_PDCNIMR &= (~PCISERR_BIT);	
+			break;
+		case IT8152_IRQ(1):
+			IT8152_INTC_PDCNIMR &= (~H2PTADR_BIT);	
+			break;
+		case IT8152_IRQ(2):
+			IT8152_INTC_PDCNIMR &= (~H2PMAR_BIT);	
+			break;
+		case IT8152_IRQ(3):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTA_BIT);	
+			break;				   
+		case IT8152_IRQ(4):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTB_BIT);	
+			break;
+		case IT8152_IRQ(5):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTC_BIT);	
+			break;
+		case IT8152_IRQ(6):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTD_BIT);	
+			break;
+		case IT8152_IRQ(7):
+			IT8152_INTC_PDCNIMR &= (~USB_INT_BIT);	
+			break;
+		case IT8152_IRQ(9):
+			IT8152_INTC_PDCNIMR &= (~CDMA_INT_BIT);	
+			break;
+		case IT8152_IRQ(10):
+			IT8152_INTC_LPCNIMR &= (~SER_IRQ1_BIT);	
+			break;
+		case IT8152_IRQ(11):
+			IT8152_INTC_LPCNIMR &= (~SER_IRQC_BIT);	
+			break;
+		case IT8152_IRQ(12):
+			IT8152_INTC_LPCNIMR &= (~SER_IRQ7_BIT);	
+			break;
+		case IT8152_IRQ(13):
+			IT8152_INTC_LPCNIMR &= (~SER_IRQ3_BIT);	
+			break;
+		case IT8152_IRQ(14):
+			IT8152_INTC_LDCNIMR &= (~ITESER_BIT);	
+			break;
+	}
+}
+
+static struct irqchip cmx255_irq_chip = {
+	.ack		= cmx255_mask_irq,
+	.mask		= cmx255_mask_irq,
+	.unmask		= cmx255_unmask_irq,
+};
+#endif
+
+/* /\* FIXME: should not be here *\/ */
+/* #ifndef CONFIG_PCI */
+/* unsigned long it8152_base_address; */
+/* #endif */
+
+void __init cmx255_init_irq(void)
+{
+	int irq;
+
+	pxa_init_irq();
+
+/* 	/\* LED GPIOs should not be probed for IRQ *\/ */
+/* 	irq_desc[IRQ_GPIO(27)].probe_ok = 0; */
+/* 	irq_desc[IRQ_GPIO(32)].probe_ok = 0; */
+
+	/* Setup interrupt for dm9000 */
+	pxa_gpio_mode(IRQ_TO_GPIO(CMX255_ETHIRQ));
+	set_irq_type(CMX255_ETHIRQ, IRQT_RISING);
+
+#ifdef CONFIG_PCI
+	/* Disable and clear IRQ's for ITE8152 */
+	IT8152_INTC_PDCNIMR = 0xffff;
+	IT8152_INTC_PDCNIRR = 0;
+	IT8152_INTC_LPCNIMR = 0xffff;
+	IT8152_INTC_LPCNIRR = 0;
+	IT8152_INTC_LDCNIMR = 0xffff;
+	IT8152_INTC_LDCNIRR = 0;
+
+	/* Set PS/2 keyboard IRQ as active high*/
+	IT8152_INTC_LPNIAR |= SER_IRQ1_BIT;
+
+	/* Set PS/2 mouse IRQ as active high*/
+	IT8152_INTC_LPNIAR |= SER_IRQC_BIT;
+
+	/* Set parallel port IRQ as active high*/
+	IT8152_INTC_LPNIAR |= SER_IRQ7_BIT;
+
+	/* Set SIO serial port IRQ as active high*/
+	IT8152_INTC_LPNIAR |= SER_IRQ3_BIT;
+
+	/* Set IT8152 serial port IRQ as active high*/
+	IT8152_INTC_LDNIAR |= ITESER_BIT;
+
+	for(irq = IT8152_IRQ(0); irq <= IT8152_IRQ_MAX; irq++) {
+		set_irq_chip(irq, &cmx255_irq_chip);
+		set_irq_handler(irq, do_level_IRQ);
+		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+	}
+
+	/* INTC signal from IT8152 is connected to GPIO0 */
+	pxa_gpio_mode(IRQ_GPIO_IT8152_IRQ);
+	set_irq_chained_handler(IRQ_GPIO_IT8152_IRQ, cmx255_irq_demux);
+	set_irq_type(IRQ_GPIO_IT8152_IRQ, IRQT_RISING);
+#endif
+}
+
+static void __init cmx255_map_io(void)
+{
+	pxa_map_io();
+	iotable_init(cmx255_io_desc, ARRAY_SIZE(cmx255_io_desc));
+}
+
+
+MACHINE_START(ARMCORE, "Compulab CM-x255")
+	.boot_params	= 0xa0000100,
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.map_io		= cmx255_map_io,
+	.init_irq	= cmx255_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= cmx255_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x270-pci.c b/arch/arm/mach-pxa/cm-x270-pci.c
new file mode 100644
index 0000000..4c3e482
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x270-pci.c
@@ -0,0 +1,265 @@
+/*
+ * linux/arch/arm/kernel/cm-x270-pci.c
+ *
+ * PCI bios-type initialisation CM-X270
+ *
+ * Bits taken from various places.
+ *
+ * Copyright (C) 2006 Compulab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * The DMA bouncing is taken from arch/arm/mach-ixp4xx/common-pci.c
+ * (see this file for respective copyrights)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <asm/irq.h>
+#include <asm/mach/pci.h>
+#include <asm/arch/cm-x270.h>
+#include <asm/mach-types.h>
+
+#include <asm/hardware/it8152.h>
+
+unsigned long armcore_pcibios_min_mem = 0x10000000;
+unsigned long armcore_pcibios_min_io = CMX270_IT8152_VIRT + 0x03e00000 + 0x120000;
+unsigned long it8152_base_address = CMX270_IT8152_VIRT;
+
+#define DMA_BASE_MASK 0xe03fffff
+
+/* these symbols needed for CardBus driver (yenta_socket) */
+EXPORT_SYMBOL(armcore_pcibios_min_io);
+EXPORT_SYMBOL(armcore_pcibios_min_mem);
+
+static u8 __init cmx270_pci_swizzle(struct pci_dev *dev, u8 *pin)
+{
+	return PCI_SLOT(dev->devfn);
+}
+
+/* Platform specific IRQ mapping */
+static int __init cmx270_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+	/* IT8152 on-chip devices */
+	if((dev->vendor==0x1283) && (dev->device==0x8152) &&
+	   ((dev->class >> 8)==0x801)) return(CDMA_INT);
+	if((dev->vendor==0x1283) && (dev->device==0x0801) &&
+	   ((dev->class >> 8)==0x401)) return(AUDIO_INT);
+	if((dev->vendor==0x1283) && (dev->device==0x8152) &&
+	   ((dev->class >> 8)==0xc03)) return(USB_INT);
+
+	/* ATXBASE PCI slot */
+	if ( slot == 7 )
+		return(PCI_INTA);
+
+	/* ATXBASE/SB-X270 CardBus */
+	if ( (slot == 8) || (slot == 0) )
+		return(PCI_INTB);
+
+	/* ATXBASE ETH */
+	if ( slot == 9 )
+		return(PCI_INTA);
+
+	/* ARMCore onboard ETH */
+	if ( slot == 15 )
+		return(PCI_INTC);
+
+	/* ARMBase ETH */
+	if ( slot == 16 )
+		return(PCI_INTA);
+
+	/* PC104+ interrupt routing */
+	if ( (slot == 17) || (slot == 19) )
+		return(PCI_INTA);
+	if ( (slot == 18) || (slot == 20) )
+		return(PCI_INTB);
+   
+	return(0);
+}
+
+extern int it8152_pci_setup(int nr, struct pci_sys_data *sys);
+extern struct pci_bus* it8152_pci_scan_bus(int nr, struct pci_sys_data *sys);
+
+static struct pci_bus* __init cmx270_pci_scan_bus(int nr,
+						  struct pci_sys_data *sys)
+{
+	IT8152_PCI_CFG_ADDR	= 0x800;
+	if(IT8152_PCI_CFG_DATA == 0x81521283) {
+		printk("PCI Bridge found.\n");
+
+		IT8152_GPIO_GPLR=0x20;
+
+#ifdef CONFIG_CM_X270_ATXBASE
+		IT8152_PCI_CFG_ADDR	= 0x4000;
+		if(IT8152_PCI_CFG_DATA == 0xAC51104C) {
+			unsigned int temp;
+			printk("CardBus Bridge found.\n");
+
+			// Configure socket 0
+			IT8152_PCI_CFG_ADDR	= 0x408C;
+			IT8152_PCI_CFG_DATA = 0x1022;
+
+			IT8152_PCI_CFG_ADDR	= 0x4080;
+			IT8152_PCI_CFG_DATA = 0x3844d060;
+
+			IT8152_PCI_CFG_ADDR	= 0x4090;
+			temp = IT8152_PCI_CFG_DATA;
+			temp = temp & 0xFFFF;
+			temp = temp | (0x60440000);
+			IT8152_PCI_CFG_ADDR	= 0x4090;
+			IT8152_PCI_CFG_DATA = temp;
+
+			IT8152_PCI_CFG_ADDR	= 0x4018;
+			IT8152_PCI_CFG_DATA = 0xb0000000;
+
+			// Configure socket 1
+			IT8152_PCI_CFG_ADDR	= 0x418C;
+			IT8152_PCI_CFG_DATA = 0x1022;
+
+			IT8152_PCI_CFG_ADDR	= 0x4180;
+			IT8152_PCI_CFG_DATA = 0x3844d060;
+
+			IT8152_PCI_CFG_ADDR	= 0x4190;
+			temp = IT8152_PCI_CFG_DATA;
+			temp = temp & 0xFFFF;
+			temp = temp | (0x60440000);
+			IT8152_PCI_CFG_ADDR	= 0x4190;
+			IT8152_PCI_CFG_DATA = temp;
+
+			IT8152_PCI_CFG_ADDR	= 0x4118;
+			IT8152_PCI_CFG_DATA = 0xb0000000;  
+ 		}
+#endif
+	}
+	return it8152_pci_scan_bus(nr, sys);
+}
+
+
+/*
+ * The following functions are needed for DMA bouncing.
+ * ITE8152 chip can addrees up to 64MByte, so all the devices
+ * connected to ITE8152 (PCI and USB) should have limited DMA window
+ */
+
+/*
+ * Setup DMA mask to 64MB on devices connected to ITE8152. Ignore all
+ * other devices.
+ */
+static int cmx270_pci_platform_notify(struct device *dev)
+{
+	if ( dev->bus == &pci_bus_type ) {
+		if ( dev->dma_mask )
+			*dev->dma_mask =  (SZ_64M - 1) | DMA_BASE_MASK;
+		dev->coherent_dma_mask = (SZ_64M - 1) | DMA_BASE_MASK;
+		dmabounce_register_dev(dev, 2048, 4096);
+	}
+	return 0;
+}
+
+static int cmx270_pci_platform_notify_remove(struct device *dev)
+{
+	if ( dev->bus == &pci_bus_type ) {
+		dmabounce_unregister_dev(dev);
+	}
+	return 0;
+}
+
+int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
+{
+	dev_dbg(dev, "%s: dma_addr %08x, size %08x\n",
+		__FUNCTION__, dma_addr, size);
+	return (dev->bus == &pci_bus_type ) && 
+		((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
+}
+
+/*
+ * Only first 64MB of memory can be accessed via PCI.
+ * We use GFP_DMA to allocate safe buffers to do map/unmap.
+ * This is really ugly and we need a better way of specifying
+ * DMA-capable regions of memory.
+ */
+void __init cmx270_adjust_zones(int node, unsigned long *zone_size,
+				 unsigned long *zhole_size)
+{
+	unsigned int sz = SZ_64M >> PAGE_SHIFT;
+
+	/*
+	 * Only adjust if > 64M on current system
+	 */
+	if (node || (zone_size[0] <= sz))
+		return;
+
+	zone_size[1] = zone_size[0] - sz;
+	zone_size[0] = sz;
+	zhole_size[1] = zhole_size[0];
+	zhole_size[0] = 0;
+}
+
+/*
+ * We override these so we properly do dmabounce otherwise drivers
+ * are able to set the dma_mask to 0xffffffff and we can no longer
+ * trap bounces. :(
+ *
+ * We just return true on everyhing except for < 64MB in which case 
+ * we will fail miseralby and die since we can't handle that case.
+ */
+int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
+{
+	if (mask >= ((SZ_64M - 1) | DMA_BASE_MASK) )
+		return 0;
+
+	return -EIO;
+}
+    
+int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
+{
+	if (mask >= ((SZ_64M - 1) | DMA_BASE_MASK) )
+		return 0;
+
+	return -EIO;
+}
+
+static int __init cmx270_pci_setup(int nr, struct pci_sys_data *sys)
+{
+	int retval = 1;
+	retval = it8152_pci_setup(nr, sys);
+	
+	printk(KERN_INFO "%s: enter\n", __FUNCTION__);
+	
+	if ( retval != 1 )
+		return retval;
+
+	if (platform_notify || platform_notify_remove) {
+		printk(KERN_ERR "PCI: Can't use platform_notify\n");
+		return -EBUSY;
+	}
+
+	platform_notify = cmx270_pci_platform_notify;
+	platform_notify_remove = cmx270_pci_platform_notify_remove;
+	return retval;
+}
+
+static struct hw_pci cmx270_pci __initdata = {
+	.swizzle		= cmx270_pci_swizzle,
+	.map_irq		= cmx270_pci_map_irq,
+	.nr_controllers		= 1,
+	.setup			= cmx270_pci_setup,
+	.scan			= cmx270_pci_scan_bus,
+};
+
+static int __init cmx270_init_pci(void)
+{
+	if (machine_is_armcore()) {
+		pci_common_init(&cmx270_pci);
+	}
+	return 0;
+}
+
+subsys_initcall(cmx270_init_pci);
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
new file mode 100644
index 0000000..f8f244e
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -0,0 +1,886 @@
+/*
+ * linux/arch/arm/mach-pxa/cm-x270.c
+ *
+ * Copyright (C) 2006 CompuLab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/pm.h>
+#include <linux/fb.h>
+#include <linux/platform_device.h>
+#include <linux/dm9000.h>
+#include <linux/rtc-v3020.h>
+#include <linux/serial_8250.h>
+#include <linux/mbxfb.h>
+#include <linux/irq.h>
+
+#include <asm/mach-types.h>
+#include <asm/io.h>
+#include <asm/delay.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/pxafb.h>
+#include <asm/arch/ohci.h>
+#include <asm/arch/bitfield.h>
+#include <asm/arch/cm-x270.h>
+#include <asm/hardware/it8152.h>
+
+#include "cm-x2xx-fbsetup.h"
+
+#include "generic.h"
+
+#define CM_X270_V3020_PHYS	(PXA_CS1_PHYS + (5 << 22))
+#define DM9000_PHYS_BASE	(PXA_CS1_PHYS + (6 << 22))
+
+static struct resource cmx270_dm9k_resource[] = {
+	[0] = {
+		.start = DM9000_PHYS_BASE,
+		.end   = DM9000_PHYS_BASE + 4,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DM9000_PHYS_BASE + 8,
+		.end   = DM9000_PHYS_BASE + 8 + 500,
+		.flags = IORESOURCE_MEM,
+	},
+	[2] = {
+		.start = CMX270_ETHIRQ,
+		.end   = CMX270_ETHIRQ,
+		.flags = IORESOURCE_IRQ,
+	}
+};
+
+/* for the moment we limit ourselves to 32bit IO until some
+ * better IO routines can be written and tested
+ */
+static struct dm9000_plat_data cmx270_dm9k_platdata = {
+	.flags		= DM9000_PLATF_32BITONLY,
+};
+
+/* Ethernet device */
+static struct platform_device cmx270_device_dm9k = {
+	.name		= "dm9000",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(cmx270_dm9k_resource),
+	.resource	= cmx270_dm9k_resource,
+	.dev		= {
+		.platform_data = &cmx270_dm9k_platdata,
+	}
+};
+
+/* audio device */
+static struct platform_device cmx270_audio_device = {
+	.name		= "pxa2xx-ac97",
+	.id		= -1,
+};
+
+/* touchscreen controller */
+static struct platform_device cmx270_ts_device = {
+	.name		= "ucb1x00",
+	.id		= -1,
+};
+
+/* RTC */
+static struct resource v3020_resources[] = {
+	[0] = {
+		.start = CM_X270_V3020_PHYS,
+		.end = CM_X270_V3020_PHYS,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static struct v3020_platform_data cmx270_v3020_platform_data = {
+	.leftshift = 16,
+};
+
+static struct platform_device cmx270_rtc_device = {
+	.name	= "v3020",
+	.id		= -1,
+	.dev = {
+		.platform_data = &cmx270_v3020_platform_data,
+	},	
+	.num_resources = ARRAY_SIZE(v3020_resources),
+	.resource = v3020_resources,
+};
+
+/* UART on the ITE8152 chip */
+#ifdef CONFIG_PCI
+static struct plat_serial8250_port ite_uart_port[] = {
+	{
+		.irq		= IRQ_ITESER,		/* interrupt number */
+		.uartclk	= 115200 * 16,	/* UART clock rate */
+		.iotype		= UPIO_MEM,		/* UPIO_* */
+		.flags		= UPF_BOOT_AUTOCONF,
+	},
+	{}
+};
+
+static struct platform_device iteuart_device = {
+	.name		= "serial8250",
+	.id		= PLAT8250_DEV_PLATFORM,
+	.dev			= {
+		.platform_data	= ite_uart_port,
+	},
+};
+#endif
+
+/* 2700G graphics */
+static u64 fb_dma_mask = ~(u64)0;
+
+static struct resource cmx270_2700G_resource[] = {
+	/* frame buffer memory including ODFB and External SDRAM */
+	[0] = {
+		.start = MARATHON_PHYS,
+		.end   = MARATHON_PHYS + 0x02000000,
+		.flags = IORESOURCE_MEM,
+	},
+	/* Marathon registers */
+	[1] = {
+		.start = MARATHON_PHYS + 0x03fe0000,
+		.end   = MARATHON_PHYS + 0x03ffffff,
+		.flags = IORESOURCE_MEM,
+	},
+};
+
+static unsigned long save_lcd_regs[10];
+
+/* if 2700G is used, disable PCI throttle */
+#define LB_TROTTLE_OFF (PXA_CS1_PHYS | (1 << 25))
+#define LB_TROTTLE_MAX (PXA_CS1_PHYS | (1 << 25) | (1 << 22))
+static int cmx270_marathon_probe(struct fb_info *fb)
+{
+	volatile unsigned long *cpld;
+	
+	cpld = (volatile unsigned long*)ioremap(LB_TROTTLE_OFF, 4);
+	if ( !cpld ) {
+		return -ENODEV;
+	}
+	*cpld = 0;
+	iounmap((void*)cpld);
+
+	/* save PXA-270 pin settings before enabling 2700G */
+	save_lcd_regs[0] = GPDR1;
+	save_lcd_regs[1] = GPDR2;
+	save_lcd_regs[2] = GAFR1_U;
+	save_lcd_regs[3] = GAFR2_L;
+	save_lcd_regs[4] = GAFR2_U;
+
+	/* Disable PXA-270 on-chip controller driving pins */
+	GPDR1 &= ~(0xfc000000);
+	GPDR2 &= ~(0x00c03fff);
+	GAFR1_U &= ~(0xfff00000);
+	GAFR2_L &= ~(0x0fffffff);
+	GAFR2_U &= ~(0x0000f000);
+	return 0;
+}
+
+static int cmx270_marathon_remove(struct fb_info *fb)
+{
+	volatile unsigned long *cpld;
+	cpld = (volatile unsigned long*)ioremap(LB_TROTTLE_MAX, 4);
+	
+	if ( !cpld ) {
+		return -ENODEV;
+	}
+	*cpld = 0;
+	iounmap((void*)cpld);
+
+	GPDR1 =   save_lcd_regs[0];
+	GPDR2 =   save_lcd_regs[1];
+	GAFR1_U = save_lcd_regs[2];
+	GAFR2_L = save_lcd_regs[3];
+	GAFR2_U = save_lcd_regs[4];
+	return 0;
+}
+
+static struct mbxfb_platform_data cmx270_2700G_data = {
+	.xres = {
+		.min = 240,
+		.max = 1200,
+		.defval = 640,
+	},
+	.yres = { 
+		.min = 240,
+		.max = 1200,
+		.defval = 480,
+	},
+	.bpp = {
+		.min = 16,
+		.max = 32,
+		.defval = 16,
+	},
+	.memsize = 8*1024*1024,
+	.probe = cmx270_marathon_probe,
+	.remove = cmx270_marathon_remove,
+};
+
+static struct platform_device cmx270_2700G = {
+	.name		= "mbx-fb",
+	.dev		= {
+ 		.platform_data	= &cmx270_2700G_data,
+		.dma_mask	= &fb_dma_mask,
+		.coherent_dma_mask = 0xffffffff,
+	},
+	.num_resources	= ARRAY_SIZE(cmx270_2700G_resource),
+	.resource	= cmx270_2700G_resource,
+	.id		= -1,
+};
+
+/* platform devices */
+static struct platform_device *platform_devices[] __initdata = {
+	&cmx270_device_dm9k,
+	&cmx270_audio_device,
+	&cmx270_ts_device,
+	&cmx270_rtc_device,
+	&cmx270_2700G,
+#ifdef CONFIG_PCI
+	&iteuart_device,
+#endif
+};
+
+#ifdef CONFIG_PCI
+/*
+ * Install handler for IT8152 IRQ.  Yes, yes... we are way down the IRQ
+ * cascade which is not good for IRQ latency, but the hardware has been
+ * designed that way...
+ */
+static inline void cmx270_irq(int irq, struct pt_regs *regs)
+{
+	struct irqdesc *desc;
+	desc = irq_desc + irq;
+	desc_handle_irq(irq, desc, regs);
+}
+
+static void cmx270_irq_demux(unsigned int irq, struct irqdesc *desc,
+			     struct pt_regs *regs)
+{
+	unsigned long pdcnimr, ldcnimr;
+ 	int pdcnirr, ldcnir;
+
+	/* clear our parent irq */
+	GEDR(GPIO_IT8152_IRQ) = GPIO_bit(GPIO_IT8152_IRQ);
+
+	/* read pending IRQs in the chip registers and clear them */
+	pdcnirr = IT8152_INTC_PDCNIRR;
+	ldcnir = IT8152_INTC_LDCNIRR;
+	IT8152_INTC_PDCNIRR = ~pdcnirr;
+	IT8152_INTC_LDCNIRR = ~ldcnir;
+
+	/* mask ITE irqs */
+	pdcnimr = IT8152_INTC_PDCNIMR;
+	ldcnimr = IT8152_INTC_LDCNIMR;
+	IT8152_INTC_PDCNIMR = 0xffff;
+	IT8152_INTC_LDCNIMR = 0xffff;
+ 
+	pdcnirr &= (PCISERR_BIT | H2PTADR_BIT | H2PMAR_BIT |
+		    PCI_INTD_BIT | PCI_INTC_BIT | PCI_INTB_BIT | PCI_INTA_BIT |
+		    USB_INT_BIT | CDMA_INT_BIT);
+		
+	ldcnir &= ITESER_BIT;
+
+	IT8152_INTC_PDCNIRR = ~pdcnirr;
+	IT8152_INTC_LDCNIRR = ~ldcnir;
+
+	/* are there interrupts pending ? */
+	if( (pdcnirr | ldcnir) ) {
+		if (pdcnirr) {
+			if( pdcnirr & PCISERR_BIT )
+				cmx270_irq(PCISERR, regs);
+			if( pdcnirr & H2PTADR_BIT )
+				cmx270_irq(H2PTADR, regs);
+			if( pdcnirr & H2PMAR_BIT )
+				cmx270_irq(H2PMAR, regs);
+			if( pdcnirr & PCI_INTA_BIT )
+				cmx270_irq(PCI_INTA, regs);
+			if( pdcnirr & PCI_INTB_BIT )
+				cmx270_irq(PCI_INTB, regs);
+			if( pdcnirr & PCI_INTC_BIT )
+				cmx270_irq(PCI_INTC, regs);
+			if( pdcnirr & PCI_INTD_BIT )
+				cmx270_irq(PCI_INTD, regs);
+			if( pdcnirr & USB_INT_BIT )
+				cmx270_irq(USB_INT, regs);
+			if( pdcnirr & CDMA_INT_BIT )
+				cmx270_irq(CDMA_INT, regs);
+		}
+		if(ldcnir) {
+			if( ldcnir & ITESER_BIT )
+				cmx270_irq(IRQ_ITESER, regs);
+		}
+	}
+
+	/* re-enable ITE interrupts */
+	IT8152_INTC_PDCNIMR = pdcnimr;
+	IT8152_INTC_LDCNIMR = ldcnimr;
+}
+#else
+unsigned long it8152_base_address = CMX270_IT8152_VIRT;
+#endif
+
+/* Map PCI companion and IDE/General Purpose CS statically */
+static struct map_desc cmx270_io_desc[] __initdata = {
+	{
+		.virtual	= CMX270_IDE104_VIRT,
+		.pfn		= __phys_to_pfn(CMX270_IDE104_PHYS),
+		.length		= PXA_CS_SIZE,
+		.type		= MT_DEVICE
+	},
+	{
+		.virtual	= CMX270_IT8152_VIRT,
+		.pfn		= __phys_to_pfn(CMX270_IT8152_PHYS),
+		.length		= PXA_CS_SIZE,
+		.type		= MT_DEVICE
+	},
+};
+
+/*********************** Display definitions ****************************/
+static int mtype=MTYPE_CRT640x480;
+static int mbpp=-1;
+
+struct cmx270_display_info {
+	struct pxafb_mach_info fb_info;
+	char *display_name;
+};
+
+static struct __initdata cmx270_display_info cmx270_displays[] = {
+	[ MTYPE_STN320x240 ] = {
+		.fb_info = {
+			.pixclock	= 76923,
+			.bpp		= 8,
+			.xres		= 320,
+			.yres		= 240,
+			.hsync_len	= 3,
+			.vsync_len	= 2,
+			.left_margin	= 3,
+			.upper_margin	= 0,
+			.right_margin	= 3,
+			.lower_margin	= 0,
+			.sync		= (FB_SYNC_HOR_HIGH_ACT |
+					   FB_SYNC_VERT_HIGH_ACT),
+			.lccr0		= 0,
+			.lccr3		= (LCCR3_PixClkDiv(0x03) |
+					   LCCR3_Acb(0xff) |
+					   LCCR3_PCP),
+			.cmap_greyscale  = 0,
+			.cmap_inverse	 = 0,
+			.cmap_static	 = 0,
+		},
+		.display_name	 = "STN 320x240",
+	},
+	[ MTYPE_TFT640x480 ] = {
+		.fb_info = {
+			.pixclock	= 38461,
+			.bpp		= 8,
+			.xres		= 640,
+			.yres		= 480,
+			.hsync_len	= 60,
+			.vsync_len	= 2,
+			.left_margin	= 70,
+			.upper_margin	= 10,
+			.right_margin	= 70,
+			.lower_margin	= 5,
+			.sync		= 0,
+			.lccr0		= (LCCR0_PAS),
+			.lccr3		= (LCCR3_PixClkDiv(0x01) |
+					   LCCR3_Acb(0xff) |
+					   LCCR3_PCP),
+			.cmap_greyscale  	= 0,
+			.cmap_inverse	 	= 0,
+			.cmap_static	 	= 0,
+		},
+		.display_name		= "TFT 640x480",
+	},
+	[ MTYPE_CRT640x480 ] = {
+		.fb_info = {
+			.pixclock	= 38461,
+			.bpp		= 8,
+			.xres		= 640,
+			.yres		= 480,
+			.hsync_len	= 63,
+			.vsync_len	= 2,
+			.left_margin	= 81,
+			.upper_margin	= 33,
+			.right_margin	= 16,
+			.lower_margin	= 10,
+			.sync		= (FB_SYNC_HOR_HIGH_ACT |
+					   FB_SYNC_VERT_HIGH_ACT),
+			.lccr0		= (LCCR0_PAS),
+			.lccr3		= (LCCR3_PixClkDiv(0x01) |
+					   LCCR3_Acb(0xff)),
+			.cmap_greyscale  = 0,
+			.cmap_inverse	 = 0,
+			.cmap_static	 = 0,
+		},
+		.display_name	 = "CRT 640x480",
+	},
+	[ MTYPE_CRT800x600 ] = {
+		.fb_info = {
+			.pixclock	= 28846,
+			.bpp		= 8,
+			.xres		= 800,
+			.yres	  	= 600,
+			.hsync_len	= 63,
+			.vsync_len	= 2,
+			.left_margin	= 26,
+			.upper_margin	= 21,
+			.right_margin	= 26,
+			.lower_margin	= 11,
+			.sync		= (FB_SYNC_HOR_HIGH_ACT |
+					   FB_SYNC_VERT_HIGH_ACT),
+			.lccr0		= (LCCR0_PAS),
+			.lccr3		= (LCCR3_PixClkDiv(0x02) |
+					   LCCR3_Acb(0xff)),
+			.cmap_greyscale = 0,
+			.cmap_inverse	= 0,
+			.cmap_static	= 0,
+		},
+		.display_name	= "CRT 800x600",
+	},
+	[ MTYPE_CRT1024x768 ] = {
+		.fb_info = {
+			.pixclock = 0,
+			.xres = 0,
+			.yres = 0,
+		},
+		.display_name	= "CRT 1024x768",
+	},
+	[ MTYPE_USER_DEFINED ] = {
+		.fb_info = {
+			.pixclock	= LCD_PIXCLOCK,
+			.bpp		= LCD_BPP,
+			.xres		= LCD_XRES,
+			.yres		= LCD_YRES,
+			.hsync_len	= LCD_HORIZONTAL_SYNC_PULSE_WIDTH,
+			.vsync_len	= LCD_VERTICAL_SYNC_PULSE_WIDTH,
+			.left_margin	= LCD_BEGIN_OF_LINE_WAIT_COUNT,
+			.upper_margin	= LCD_BEGIN_FRAME_WAIT_COUNT,
+			.right_margin	= LCD_END_OF_LINE_WAIT_COUNT,
+			.lower_margin	= LCD_END_OF_FRAME_WAIT_COUNT,
+			.sync		= LCD_SYNC,
+			.lccr0		= LCD_LCCR0,
+			.lccr3		= LCD_LCCR3,
+			.cmap_greyscale = CMAP_GREYSCALE,
+			.cmap_inverse	= CMAP_INVERSE,
+			.cmap_static  	= CMAP_STATIC,
+		},
+		.display_name	= LCD_NAME,
+	},
+	[ MTYPE_TFT320x240 ] = {
+		.fb_info = {
+			.pixclock	= 134615,
+			.bpp		= 16,
+			.xres		= 320,
+			.yres		= 240,
+			.hsync_len	= 63,
+			.vsync_len	= 7,
+			.left_margin	= 75,
+			.upper_margin	= 0,
+			.right_margin	= 15,
+			.lower_margin	= 15,
+			.sync		= 0,
+			.lccr0		= (LCCR0_PAS),
+			.lccr3		= (LCCR3_PixClkDiv(0x06) |
+					   LCCR3_Acb(0xff) |
+					   LCCR3_PCP),
+			.cmap_greyscale  = 0,
+			.cmap_inverse	 = 0,
+			.cmap_static	 = 0,
+		},
+		.display_name	= "TFT 320x240",
+	},
+	[ MTYPE_STN640x480 ] = {
+		.fb_info = {
+			.pixclock	= 57692,
+			.bpp		= 8,
+			.xres		= 640,
+			.yres		= 480,
+			.hsync_len	= 4,
+			.vsync_len	= 2,
+			.left_margin	= 10,
+			.upper_margin	= 5,
+			.right_margin	= 10,
+			.lower_margin	= 5,
+			.sync		= (FB_SYNC_HOR_HIGH_ACT |
+					   FB_SYNC_VERT_HIGH_ACT),
+			.lccr0		= 0,
+			.lccr3		= (LCCR3_PixClkDiv(0x02) |
+					   LCCR3_Acb(0xff)),
+			.cmap_greyscale  = 0,
+			.cmap_inverse	 = 0,
+			.cmap_static	 = 0,
+		},
+		.display_name	= "STN 640x480",
+	},
+};
+
+static int __init monitor_params(char *str)
+{
+	mtype = simple_strtol(str, NULL, 0);
+	return 1;
+}
+
+__setup("monitor=", monitor_params);
+
+static int __init fb_bpp(char *str)
+{
+	mbpp = simple_strtol(str, NULL, 0);
+	return 1;
+}
+
+__setup("bpp=", fb_bpp);
+
+/* PXA27x OHCI controller setup */
+static int cmx270_ohci_init(struct device *dev)
+{
+	/* Set the Power Control Polarity Low */
+	UHCHR = (UHCHR | UHCHR_PCPL) &
+		~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
+
+	return 0;
+}
+
+static struct pxaohci_platform_data cmx270_ohci_platform_data = {
+	.port_mode	= PMM_PERPORT_MODE,
+	.init		= cmx270_ohci_init,
+};
+
+#ifdef CONFIG_PM
+/* timeout for RTC wakeup */
+unsigned int cmx270_suspend_timeout;
+
+static ssize_t timeout_show(struct subsystem * subsys, char * buf)
+{
+	char * s = buf;
+
+	s += sprintf(s,"%d seconds\n", cmx270_suspend_timeout);
+	return (s - buf);
+}
+
+static ssize_t timeout_store(struct subsystem * subsys, const char * buf, size_t n)
+{
+	char *endp = 0;
+	int timeout;
+
+	timeout = simple_strtoul(buf, &endp, 10);
+	if ( *endp && *endp != '\n')
+		return -EINVAL;
+
+	cmx270_suspend_timeout = timeout;
+	return n;
+}
+
+static struct subsys_attribute timeout_attr = {
+	.attr	= {
+		.name = __stringify(timeout),
+		.mode = 0644,
+	},
+	.show	= timeout_show,
+	.store	= timeout_store,
+};
+
+static struct attribute * g[] = {
+	&timeout_attr.attr,
+	NULL,
+};
+
+static struct attribute_group attr_group = {
+	.attrs = g,
+};
+
+extern struct subsystem power_subsys;
+static unsigned long sleep_save_ite[10];
+static unsigned long sleep_save_msc[10];
+
+static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
+{
+#ifdef CONFIG_PCI
+	/* save ITE state */
+	sleep_save_ite[0] = IT8152_INTC_PDCNIMR;
+	sleep_save_ite[1] = IT8152_INTC_LPCNIMR;
+	sleep_save_ite[2] = IT8152_INTC_LPNIAR;
+
+	/* Clear ITE IRQ's */
+	IT8152_INTC_PDCNIRR = 0;
+	IT8152_INTC_LPCNIRR = 0;
+#endif
+
+	/* save MSC registers */
+	sleep_save_msc[0] = MSC0;
+	sleep_save_msc[1] = MSC1;
+	sleep_save_msc[2] = MSC2;
+
+	/* setup power saving mode registers */
+	PCFR = 0x0;
+	PSLR = 0xff400000;
+	PMCR  = 0x00000005;
+	PWER  = 0x80000000;
+	PFER  = 0x00000000;
+	PRER  = 0x00000000;
+	PGSR0 = 0xC0018800;
+	PGSR1 = 0x004F0002;
+	PGSR2 = 0x6021C000;
+	PGSR3 = 0x00020000;
+
+	if ( cmx270_suspend_timeout ) {
+		RTAR = RCNR + cmx270_suspend_timeout;
+		cmx270_suspend_timeout = 0;
+	}
+
+	return 0;
+}
+
+static int cmx270_resume(struct sys_device *dev)
+{
+#ifdef CONFIG_PCI
+	/* restore IT8152 state */
+	IT8152_INTC_PDCNIMR = sleep_save_ite[0];
+	IT8152_INTC_LPCNIMR = sleep_save_ite[1];
+	IT8152_INTC_LPNIAR = sleep_save_ite[2];
+#endif
+
+	/* restore MSC registers */
+	MSC0 = sleep_save_msc[0];
+	MSC1 = sleep_save_msc[1];
+	MSC2 = sleep_save_msc[2];
+
+	return 0;
+}
+
+static struct sysdev_class cmx270_pm_sysclass = {
+	set_kset_name("pm"),
+	.resume = cmx270_resume,
+	.suspend = cmx270_suspend,
+};
+
+static struct sys_device cmx270_pm_device = {
+	.cls = &cmx270_pm_sysclass,
+};
+
+static int __init cmx270_pm_init(void)
+{
+	int error;
+	error = sysdev_class_register(&cmx270_pm_sysclass);
+	if (error == 0)
+		error = sysdev_register(&cmx270_pm_device);
+
+	error = sysfs_create_group(&power_subsys.kset.kobj,&attr_group);
+	return error;
+}
+#else
+static int __init cmx270_pm_init(void) { return 0; }
+#endif
+
+/* SA1111 compatibiliy 8 bit read register needed for proper function
+   of ITE8152 UART */
+#define MEMC_SA1111	__REG(0x48000064)  
+
+static void __init cmx270_init(void)
+{
+	/* set display timings for VGA 640x480 by default */
+	struct cmx270_display_info *tfbi = &cmx270_displays[2];
+
+	MEMC_SA1111 = 0x3c;
+
+	cmx270_pm_init();
+	
+	if ( mtype >= 0 && mtype < ARRAY_SIZE(cmx270_displays) )
+		tfbi = &cmx270_displays[mtype];
+
+	/* use default instead of unsupported displays */
+	if ( tfbi->fb_info.pixclock == 0 &&
+	     tfbi->fb_info.xres == 0 &&
+	     tfbi->fb_info.yres == 0 ) {
+		printk(KERN_WARNING "CM-X270 does not support %s display\n", cmx270_displays[mtype].display_name);
+		tfbi = &cmx270_displays[2];
+	}
+	     
+	/* setup color depth */
+	if( mtype == MTYPE_USER_DEFINED ) {
+		mbpp = tfbi->fb_info.bpp;
+	}
+	if( mbpp > 0 ) {
+		if( (mbpp!=1) && (mbpp!=2) && (mbpp!=4) &&
+		    (mbpp!=8) && (mbpp!=16)) {
+			printk(KERN_WARNING "Illegal BPP value "
+			       "supplied, leaving default\n");
+			mbpp = 8;
+		}
+	} 
+	else mbpp = 8;
+	tfbi->fb_info.bpp = mbpp;
+	     
+	printk(KERN_INFO "Running a %s display with %d bits per pixel\n",
+	       tfbi->display_name, tfbi->fb_info.bpp);
+	set_pxa_fb_info(&tfbi->fb_info);
+	     
+#ifdef CONFIG_PCI
+	/* setup ITE8152 UART base addresses */
+	ite_uart_port[0].membase = (void *)&IT8152_UART_BASE;
+	ite_uart_port[0].mapbase = IT8152_UART_BASE;
+#endif
+
+	/* register CM-X270 platform devices */
+	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
+
+	pxa_set_ohci_info(&cmx270_ohci_platform_data);
+
+	/* This enables the STUART */
+	pxa_gpio_mode(GPIO46_STRXD_MD);
+	pxa_gpio_mode(GPIO47_STTXD_MD);
+
+	/* This enables the BTUART  */ 
+	pxa_gpio_mode(GPIO42_BTRXD_MD);
+	pxa_gpio_mode(GPIO43_BTTXD_MD);
+	pxa_gpio_mode(GPIO44_BTCTS_MD);
+	pxa_gpio_mode(GPIO45_BTRTS_MD);
+}
+
+#ifdef CONFIG_PCI
+static void cmx270_mask_irq(unsigned int irq)
+{
+	switch(irq) {
+		case IT8152_IRQ(0):
+			IT8152_INTC_PDCNIMR |= PCISERR_BIT;
+			break;
+		case IT8152_IRQ(1):
+			IT8152_INTC_PDCNIMR |= H2PTADR_BIT;
+			break;
+		case IT8152_IRQ(2):
+			IT8152_INTC_PDCNIMR |= H2PMAR_BIT;
+			break;
+		case IT8152_IRQ(3):
+			IT8152_INTC_PDCNIMR |= PCI_INTA_BIT;
+			break;
+		case IT8152_IRQ(4):
+			IT8152_INTC_PDCNIMR |= PCI_INTB_BIT;
+			break;
+		case IT8152_IRQ(5):
+			IT8152_INTC_PDCNIMR |= PCI_INTC_BIT;
+			break;
+		case IT8152_IRQ(6):
+			IT8152_INTC_PDCNIMR |= PCI_INTD_BIT;
+			break;
+		case IT8152_IRQ(7):
+			IT8152_INTC_PDCNIMR |= USB_INT_BIT;
+			break;
+		case IT8152_IRQ(9):
+			IT8152_INTC_PDCNIMR |= CDMA_INT_BIT;
+			break;
+		case IT8152_IRQ(10):
+			IT8152_INTC_LDCNIMR |= ITESER_BIT;
+			break;
+	}
+}
+
+static void cmx270_unmask_irq(unsigned int irq)
+{
+	switch(irq) {
+		case IT8152_IRQ(0):
+			IT8152_INTC_PDCNIMR &= (~PCISERR_BIT);
+			break;
+		case IT8152_IRQ(1):
+			IT8152_INTC_PDCNIMR &= (~H2PTADR_BIT);
+			break;
+		case IT8152_IRQ(2):
+			IT8152_INTC_PDCNIMR &= (~H2PMAR_BIT);
+			break;
+		case IT8152_IRQ(3):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTA_BIT);
+			break;
+		case IT8152_IRQ(4):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTB_BIT);
+			break;
+		case IT8152_IRQ(5):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTC_BIT);
+			break;
+		case IT8152_IRQ(6):
+			IT8152_INTC_PDCNIMR &= (~PCI_INTD_BIT);
+			break;
+		case IT8152_IRQ(7):
+			IT8152_INTC_PDCNIMR &= (~USB_INT_BIT);
+			break;
+		case IT8152_IRQ(9):
+			IT8152_INTC_PDCNIMR &= (~CDMA_INT_BIT);
+			break;
+		case IT8152_IRQ(10):
+			IT8152_INTC_LDCNIMR &= (~ITESER_BIT);
+			break;
+	}
+}
+
+static struct irqchip cmx270_irq_chip = {
+	.ack		= cmx270_mask_irq,
+	.mask		= cmx270_mask_irq,
+	.unmask		= cmx270_unmask_irq,
+};
+#endif
+
+static void __init cmx270_init_irq(void)
+{
+	int irq;
+
+	pxa_init_irq();
+
+/* 	/\* LED and NAND GPIOs should not be probed for IRQ *\/ */
+/* 	irq_desc[IRQ_GPIO(11)].probe_ok = 0; */
+/* 	irq_desc[IRQ_GPIO(89)].probe_ok = 0; */
+/* 	irq_desc[IRQ_GPIO(93)].probe_ok = 0; */
+/* 	irq_desc[IRQ_GPIO(94)].probe_ok = 0; */
+
+	IT8152_INTC_PDCNIMR = 0xffff;
+
+#ifdef CONFIG_PCI
+	/* Disable and clear IRQ's for ITE8152 */
+	IT8152_INTC_PDCNIMR = 0xffff;
+	IT8152_INTC_PDCNIRR = 0;
+	IT8152_INTC_LPCNIMR = 0xffff;
+	IT8152_INTC_LPCNIRR = 0;
+	IT8152_INTC_LDCNIMR = 0xffff;
+	IT8152_INTC_LDCNIRR = 0;
+
+	/* Set IT8152 serial port IRQ as active high*/
+	IT8152_INTC_LDNIAR |= ITESER_BIT;
+
+	for(irq = IT8152_IRQ(0); irq <= IT8152_IRQ_MAX; irq++) {
+		set_irq_chip(irq, &cmx270_irq_chip);
+		set_irq_handler(irq, do_level_IRQ);
+		set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
+	}
+
+	/* INTC signal from IT8152 is connected to GPIO0 */
+	pxa_gpio_mode(IRQ_GPIO_IT8152_IRQ);
+	set_irq_chained_handler(IRQ_GPIO_IT8152_IRQ, cmx270_irq_demux);
+	set_irq_type(IRQ_GPIO_IT8152_IRQ, IRQT_RISING);
+#endif
+
+	/* Setup interrupt for dm9000 */
+	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
+	set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
+
+	/* Setup interrupt for 2700G */
+	pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
+	set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
+}
+
+static void __init cmx270_map_io(void)
+{
+	pxa_map_io();
+	iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
+}
+
+
+MACHINE_START(ARMCORE, "Compulab CM-x270")
+	.boot_params	= 0xa0000100,
+	.phys_io	= 0x40000000,
+	.io_pg_offst	= (io_p2v(0x40000000) >> 18) & 0xfffc,
+	.map_io		= cmx270_map_io,
+	.init_irq	= cmx270_init_irq,
+	.timer		= &pxa_timer,
+	.init_machine	= cmx270_init,
+MACHINE_END
diff --git a/arch/arm/mach-pxa/cm-x2xx-fbsetup.h b/arch/arm/mach-pxa/cm-x2xx-fbsetup.h
new file mode 100644
index 0000000..4ccb9c8
--- /dev/null
+++ b/arch/arm/mach-pxa/cm-x2xx-fbsetup.h
@@ -0,0 +1,54 @@
+/*
+ * linux/arch/arm/mach-pxa/cm-x2xx-fbsetup.h
+ *
+ * Copyright (C) 2003 - 2006 Compulab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* 
+ * CM-X2xx can be connected to any LCD, so some configuration for LCD
+ * paramters should be possible. This is probably not the best way,
+ * but it's better than nothing
+ */
+
+/*
+ Panel specific LCD controller setup
+ */
+#ifndef _CM_X2XX_FBSETUP_H
+#define _CM_X2XX_FBSETUP_H
+
+#define MTYPE_STN320x240	0
+#define MTYPE_TFT640x480	1
+#define MTYPE_CRT640x480	2
+#define MTYPE_CRT800x600	3
+#define MTYPE_CRT1024x768	4
+#define MTYPE_USER_DEFINED	5
+#define MTYPE_TFT320x240	6
+#define MTYPE_STN640x480	7
+
+#define	CMAP_GREYSCALE  	0
+#define CMAP_INVERSE		0
+#define CMAP_STATIC		0
+
+
+/* Example display definition for Hitachi SX19V-009 */
+#define LCD_PIXCLOCK			38461
+#define LCD_BPP				8
+#define LCD_XRES			640
+#define LCD_YRES			480
+#define LCD_HORIZONTAL_SYNC_PULSE_WIDTH 4
+#define LCD_VERTICAL_SYNC_PULSE_WIDTH	2
+#define LCD_BEGIN_OF_LINE_WAIT_COUNT	10
+#define LCD_BEGIN_FRAME_WAIT_COUNT	5
+#define LCD_END_OF_LINE_WAIT_COUNT	10
+#define LCD_END_OF_FRAME_WAIT_COUNT	5
+#define LCD_SYNC			(FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT)
+#define LCD_LCCR0			(LCCR0_LDM | LCCR0_IUM | LCCR0_QDM | LCCR0_BM  | LCCR0_OUM )
+#define LCD_LCCR3			(LCCR3_PixClkDiv(0x02) | LCCR3_Acb(0xff))
+#define LCD_NAME			"Hitachi SX19V-009-ZZA-1"
+
+#endif /* _CM_X2XX_FBSETUP_H */
diff --git a/arch/arm/mach-pxa/leds-cm-x2xx.c b/arch/arm/mach-pxa/leds-cm-x2xx.c
new file mode 100644
index 0000000..9989a21
--- /dev/null
+++ b/arch/arm/mach-pxa/leds-cm-x2xx.c
@@ -0,0 +1,136 @@
+/*
+ * linux/arch/arm/mach-pxa/leds-cm-x2xx.c
+ *
+ * Copyright (C) 2003, 2006 Compulab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * Original (leds-footbridge.c) by Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/leds.h>
+#include <asm/system.h>
+
+#include <asm/arch/pxa-regs.h>
+#ifdef CONFIG_CM_X270
+#include <asm/arch/cm-x270.h>
+#elif defined(CONFIG_CM_X255)
+#include <asm/arch/cm-x255.h>
+#endif
+
+#include "leds.h"
+
+#define LED_STATE_ENABLED	1
+#define LED_STATE_CLAIMED	2
+
+#define RED_LED_ON			1
+#define GREEN_LED_ON		2
+
+static unsigned int led_state;
+static unsigned int hw_led_state;
+
+void armcore_leds_event(led_event_t evt)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	switch (evt) {
+	case led_start:
+		hw_led_state = GREEN_LED_ON | RED_LED_ON;
+		led_state = LED_STATE_ENABLED;
+		break;
+
+	case led_stop:
+		led_state &= ~LED_STATE_ENABLED;
+		break;
+
+	case led_claim:
+		led_state |= LED_STATE_CLAIMED;
+		hw_led_state = GREEN_LED_ON | RED_LED_ON;
+		break;
+
+	case led_release:
+		led_state &= ~LED_STATE_CLAIMED;
+		hw_led_state = GREEN_LED_ON | RED_LED_ON;
+		break;
+
+#ifdef CONFIG_LEDS_TIMER
+	case led_timer:
+		if (!(led_state & LED_STATE_CLAIMED))
+			hw_led_state ^= GREEN_LED_ON;
+		break;
+#endif
+
+#ifdef CONFIG_LEDS_CPU
+	case led_idle_start:
+		if (!(led_state & LED_STATE_CLAIMED))
+			hw_led_state &= ~RED_LED_ON;
+		break;
+
+	case led_idle_end:
+		if (!(led_state & LED_STATE_CLAIMED))
+			hw_led_state |= RED_LED_ON;
+		break;
+#endif
+
+	case led_halted:
+		break;
+
+	case led_green_on:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state &= ~GREEN_LED_ON;
+		break;
+
+	case led_green_off:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state |= GREEN_LED_ON;
+		break;
+
+	case led_amber_on:
+		break;
+
+	case led_amber_off:
+		break;
+
+	case led_red_on:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state &= ~RED_LED_ON;
+		break;
+
+	case led_red_off:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state |= RED_LED_ON;
+		break;
+
+	default:
+		break;
+	}
+
+	if  (led_state & LED_STATE_ENABLED) 
+	{
+		if(hw_led_state & RED_LED_ON)  {
+			CMX2XX_RED_ON();
+		}
+		else {
+			CMX2XX_RED_OFF();
+		}
+		if(hw_led_state & GREEN_LED_ON)  {
+			CMX2XX_GREEN_ON();
+		}
+		else {
+			CMX2XX_GREEN_OFF();
+		}
+	}
+
+	local_irq_restore(flags);
+}
diff --git a/arch/arm/mach-pxa/leds.c b/arch/arm/mach-pxa/leds.c
index e13eb84..740cc87 100644
--- a/arch/arm/mach-pxa/leds.c
+++ b/arch/arm/mach-pxa/leds.c
@@ -26,6 +26,8 @@ pxa_leds_init(void)
 		leds_event = idp_leds_event;
 	if (machine_is_trizeps4())
 		leds_event = trizeps4_leds_event;
+	if (machine_is_armcore())	  
+		leds_event = armcore_leds_event;
 
 	leds_event(led_start);
 	return 0;
diff --git a/arch/arm/mach-pxa/leds.h b/arch/arm/mach-pxa/leds.h
index 4f829b8..68874a3 100644
--- a/arch/arm/mach-pxa/leds.h
+++ b/arch/arm/mach-pxa/leds.h
@@ -11,3 +11,4 @@ extern void idp_leds_event(led_event_t e
 extern void lubbock_leds_event(led_event_t evt);
 extern void mainstone_leds_event(led_event_t evt);
 extern void trizeps4_leds_event(led_event_t evt);
+extern void armcore_leds_event(led_event_t evt);
diff --git a/arch/arm/mach-pxa/lpc.c b/arch/arm/mach-pxa/lpc.c
new file mode 100644
index 0000000..3a9d960
--- /dev/null
+++ b/arch/arm/mach-pxa/lpc.c
@@ -0,0 +1,152 @@
+/*
+ *
+ * BRIEF MODULE DESCRIPTION
+ *	ITE Semi IT8712 Super I/O functions.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ *         	ppopov@mvista.com or support@mvista.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <asm/io.h>
+#include <asm/types.h>
+#include <asm/hardware/it8711.h>
+#include <asm/hardware/it8152.h>
+
+#ifndef TRUE
+#define TRUE 1
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+
+void LPCEnterMBPnP(void)
+{
+	int i;
+	unsigned char key[4] = {0x87, 0x87};
+
+	for (i = 0; i<2; i++)
+		outb(key[i], LPC_KEY_ADDR);
+
+}
+
+
+
+void LPCExitMBPnP(void)
+{
+	outb(0x02, LPC_KEY_ADDR);
+	outb(0x02, LPC_DATA_ADDR);
+}
+
+void LPCSetConfig(char LdnNumber, char Index, char data)
+{
+	LPCEnterMBPnP();				// Enter IT8711 MB PnP mode
+	outb(0x07, LPC_KEY_ADDR);
+	outb(LdnNumber, LPC_DATA_ADDR);
+	outb(Index, LPC_KEY_ADDR);	
+	outb(data, LPC_DATA_ADDR);
+	LPCExitMBPnP();
+}	 
+
+char LPCGetConfig(char LdnNumber, char Index)
+{
+	char rtn;
+
+	LPCEnterMBPnP();				// Enter IT8711 MB PnP mode
+	outb(0x07, LPC_KEY_ADDR);
+	outb(LdnNumber, LPC_DATA_ADDR);
+	outb(Index, LPC_KEY_ADDR);	
+	rtn = inb(LPC_DATA_ADDR);
+	LPCExitMBPnP();
+	return rtn;
+}
+
+int SearchIT8711(void)
+{
+	unsigned char Id1, Id2;
+	unsigned short Id;
+
+	LPCEnterMBPnP();
+	outb(0x20, LPC_KEY_ADDR); //chip id byte 1 
+	Id1 = inb(LPC_DATA_ADDR);
+	outb(0x21, LPC_KEY_ADDR); // chip id byte 2 
+	Id2 = inb(LPC_DATA_ADDR);
+	Id = (Id1 << 8) | Id2;
+	LPCExitMBPnP();
+//	printk("Reading 8711 ID result: %x\n", Id); 
+	if (Id == 0x8711) 
+		return TRUE;
+	else
+		return FALSE;
+}
+
+
+void InitLPCInterface(void)
+{
+	unsigned char bus, dev_fn;
+	unsigned long data;
+	int i;
+
+	/* LPC function and not GPIO */
+	IT8152_GPIO_GPCR12 = 0;
+	IT8152_GPIO_GPCR34 = 0;
+
+	bus = 0;
+	dev_fn = 0xa; 
+
+
+	/* pci cmd, SERR# Enable */
+ 	IT8152_PCI_CFG_ADDR =   
+		 ((bus         << IT_BUSNUM_SHF)   |
+		 (dev_fn      << IT_FUNCNUM_SHF) |
+		 ((0x4 / 4) << IT_REGNUM_SHF));
+	data  = IT8152_PCI_CFG_DATA;
+	data |= 0x0100;
+	IT8152_PCI_CFG_ADDR =   
+		 ((bus         << IT_BUSNUM_SHF)   |
+		 (dev_fn      << IT_FUNCNUM_SHF) |
+		 ((0x4 / 4) << IT_REGNUM_SHF));
+	IT8152_PCI_CFG_DATA = data;
+
+	/* setup serial irq control register */
+ 	IT8152_PCI_CFG_ADDR =   
+		 ((bus         << IT_BUSNUM_SHF)   |
+		 (dev_fn      << IT_FUNCNUM_SHF) |
+		 ((0x48 / 4) << IT_REGNUM_SHF));
+	data  = IT8152_PCI_CFG_DATA;
+	data  = (data & 0xffff00ff) | 0xc400;
+	IT8152_PCI_CFG_ADDR =   
+		 ((bus         << IT_BUSNUM_SHF)   |
+		 (dev_fn      << IT_FUNCNUM_SHF) |
+		 ((0x48 / 4) << IT_REGNUM_SHF));
+	IT8152_PCI_CFG_DATA = data;
+
+	/* Enable subtructive decoding */
+ 	IT8152_PCI_CFG_ADDR =   
+		 ((bus         << IT_BUSNUM_SHF)   |
+		 (dev_fn      << IT_FUNCNUM_SHF) |
+		 ((0x4C / 4) << IT_REGNUM_SHF));
+	IT8152_PCI_CFG_DATA = 0x3f0000f3;
+}
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 74eeada..dd74ab4 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -139,10 +139,12 @@ void pxa_cpu_pm_enter(suspend_state_t st
 	extern void pxa_cpu_suspend(unsigned int);
 	extern void pxa_cpu_resume(void);
 
+#ifndef CONFIG_CM_X270
 	if (state == PM_SUSPEND_STANDBY)
 		CKEN = CKEN22_MEMC | CKEN9_OSTIMER | CKEN16_LCD |CKEN0_PWM0;
 	else
 		CKEN = CKEN22_MEMC | CKEN9_OSTIMER;
+#endif
 
 	/* ensure voltage-change sequencer not initiated, which hangs */
 	PCFR &= ~PCFR_FVC;
@@ -157,7 +159,11 @@ void pxa_cpu_pm_enter(suspend_state_t st
 	case PM_SUSPEND_MEM:
 		/* set resume return address */
 		PSPR = virt_to_phys(pxa_cpu_resume);
+#ifdef CONFIG_MACH_ARMCORE
+		pxa_cpu_suspend(PWRMODE_DEEPSLEEP);
+#else
 		pxa_cpu_suspend(PWRMODE_SLEEP);
+#endif
 		break;
 	}
 }
diff --git a/include/asm-arm/arch-pxa/cm-x255.h b/include/asm-arm/arch-pxa/cm-x255.h
new file mode 100644
index 0000000..73cd797
--- /dev/null
+++ b/include/asm-arm/arch-pxa/cm-x255.h
@@ -0,0 +1,97 @@
+/*
+ * linux/include/asm/arch-pxa/cm-x255.h
+ *
+ * Copyright (C) 2003, 2006 Compulab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/arch/pxa-regs.h>
+
+#define CMX255_IDE104_PHYS	(PXA_CS3_PHYS)
+#define CMX255_IT8152_PHYS	(PXA_CS4_PHYS)
+
+#define PXA_CS_SIZE		(64*1024*1024)
+
+/* Virtual map */
+#define CMX255_VIRT_BASE	(0xe8000000)
+#define CMX255_IT8152_VIRT	(CMX255_VIRT_BASE)
+#define CMX255_IDE104_VIRT	(CMX255_VIRT_BASE + PXA_CS_SIZE)
+#define CMX255_IDECS0_VIRT	(CMX255_IDE104_VIRT + (1<<25))
+#define CMX255_IDECS1_VIRT	(CMX255_IDE104_VIRT + (1<<25) + (1<<22))
+
+/* GPIO related definitions */
+#define GPIO_IT8152_IRQ		(0)
+#define GPIO_IT811_RST		(11)
+#define GPIO_RED_LED		(27)
+#define GPIO_GREEN_LED		(32)
+
+#define IRQ_GPIO_IT8152_IRQ	IRQ_GPIO(0)
+#define PME_IRQ			IRQ_GPIO(1)
+#define CMX255_IDE_IRQ		IRQ_GPIO(82)
+#define CMX255_GPIRQ1		IRQ_GPIO(12)
+#define CMX255_TOUCHIRQ		IRQ_GPIO(21)
+#define CMX255_ETHIRQ		IRQ_GPIO(22)
+#define CMX255_NANDIRQ		IRQ_GPIO(10)
+
+/* LED macros */
+#define CMX2XX_RED_ON()    GPCR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED)
+#define CMX2XX_RED_OFF()   GPSR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED)
+#define CMX2XX_GREEN_ON()  GPCR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED)
+#define CMX2XX_GREEN_OFF() GPSR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED)
+
+/* PCMCIA related definitions */
+#define PCC_DETECT(x)	(GPLR(16 + (x)) & GPIO_bit(16 + (x)))
+#define PCC_READY(x)	(GPLR(6 + (2*(x))) & GPIO_bit(6 + (2*(x))))
+
+#define PCMCIA_S0_CD_VALID	IRQ_GPIO(16)
+#define PCMCIA_S0_CD_VALID_EDGE	GPIO_BOTH_EDGES
+
+#define PCMCIA_S1_CD_VALID	IRQ_GPIO(17)
+#define PCMCIA_S1_CD_VALID_EDGE	GPIO_BOTH_EDGES
+
+#define PCMCIA_S0_RDYINT	IRQ_GPIO(6)
+#define PCMCIA_S1_RDYINT	IRQ_GPIO(8)
+
+/* define PCMCIA pins */
+#define PCMCIA_RESET_GPIO	9
+#define nPCE_1			GPIO52_nPCE_1
+#define nPCE_1_MD		GPIO52_nPCE_1_MD
+#define nPCE_2			GPIO53_nPCE_2
+#define nPCE_2_MD		GPIO53_nPCE_2_MD
+#define pSKTSEL_MD		GPIO54_pSKTSEL_MD
+#define pSKTSEL			GPIO54_pSKTSEL
+
+/* ITE 8152 interrupts */
+#define IT8152_IRQ(x)		(IRQ_BOARD_START + (x))
+#define PCISERR			IT8152_IRQ(0)
+#define H2PTADR			IT8152_IRQ(1)
+#define H2PMAR			IT8152_IRQ(2)
+#define PCI_INTA		IT8152_IRQ(3)
+#define PCI_INTB		IT8152_IRQ(4)
+#define PCI_INTC		IT8152_IRQ(5)
+#define PCI_INTD		IT8152_IRQ(6)
+#define USB_INT			IT8152_IRQ(7)
+#define AUDIO_INT		IT8152_IRQ(8)
+#define CDMA_INT		IT8152_IRQ(9)
+#define IRQ_ITESER		IT8152_IRQ(10)
+/* SIO (ITE 8711) interrupts */
+#define KEYBOARD_IRQ		IT8152_IRQ(11)
+#define MOUSE_IRQ		IT8152_IRQ(12)
+#define IRQ_PARALLEL		IT8152_IRQ(13)
+#define IRQ_SIOSER		IT8152_IRQ(14)
+#define IT8152_IRQ_MAX		IT8152_IRQ(14)
+
+/* PS/2 keyboard */
+#define SER_IRQ1_BIT	(1<<1)
+/* SIO Serial 2 */
+#define SER_IRQ3_BIT	(1<<3)
+/* Parallel port */
+#define SER_IRQ7_BIT	(1<<7)
+/* PS/2 mouse */
+#define SER_IRQC_BIT	(1<<12)
diff --git a/include/asm-arm/arch-pxa/cm-x270.h b/include/asm-arm/arch-pxa/cm-x270.h
new file mode 100644
index 0000000..c817ec6
--- /dev/null
+++ b/include/asm-arm/arch-pxa/cm-x270.h
@@ -0,0 +1,94 @@
+/*
+ * linux/include/asm/arch-pxa/cm-x270.h
+ *
+ * Copyright (C) 2005, 2006 Compulab, Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/config.h>
+#include <asm/arch/pxa-regs.h>
+
+#define CMX270_CS1_PHYS		(PXA_CS1_PHYS)
+#define MARATHON_PHYS		(PXA_CS2_PHYS)
+#define CMX270_IDE104_PHYS	(PXA_CS3_PHYS)
+#define CMX270_IT8152_PHYS	(PXA_CS4_PHYS)
+
+#define PXA_CS_SIZE		(64*1024*1024)
+
+/* Virtual map */
+
+#define CMX270_VIRT_BASE	(0xe8000000)
+#define CMX270_IT8152_VIRT	(CMX270_VIRT_BASE)
+#define CMX270_IDE104_VIRT	(CMX270_IT8152_VIRT + PXA_CS_SIZE)
+
+#ifdef CONFIG_CMX270_SB270
+#define CMX270_IDECS0_VIRT	(CMX270_IDE104_VIRT + (1<<24) + (1<<25))
+#define CMX270_IDECS1_VIRT	(CMX270_IDE104_VIRT + (1<<25))
+#else
+#define CMX270_IDECS0_VIRT	(CMX270_IDE104_VIRT + (1<<25))
+#define CMX270_IDECS1_VIRT	(CMX270_IDE104_VIRT + (1<<25) + (1<<22))
+#endif
+
+/* GPIO related definitions */
+#define GPIO_IT8152_IRQ			(22)
+#define GPIO_RED_LED			(93)
+#define GPIO_GREEN_LED			(94)
+
+
+#define IRQ_GPIO_IT8152_IRQ	IRQ_GPIO(GPIO_IT8152_IRQ)
+#define PME_IRQ			IRQ_GPIO(0)
+#define CMX270_IDE_IRQ		IRQ_GPIO(100)
+#define CMX270_GPIRQ1		IRQ_GPIO(101)
+#define CMX270_TOUCHIRQ		IRQ_GPIO(96)
+#define CMX270_ETHIRQ		IRQ_GPIO(10)
+#define CMX270_GFXIRQ		IRQ_GPIO(95)
+#define CMX270_NANDIRQ		IRQ_GPIO(89)
+#define ARMCORE_MMC_IRQ		IRQ_GPIO(83)
+
+/* LED macros */
+#define CMX2XX_RED_ON()	   GPCR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED)
+#define CMX2XX_RED_OFF()   GPSR(GPIO_RED_LED) = GPIO_bit(GPIO_RED_LED)
+#define CMX2XX_GREEN_ON()  GPCR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED)
+#define CMX2XX_GREEN_OFF() GPSR(GPIO_GREEN_LED) = GPIO_bit(GPIO_GREEN_LED)
+
+/* PCMCIA related definitions */
+#define PCC_DETECT(x)	(GPLR(84 - (x)) & GPIO_bit(84 - (x)))
+#define PCC_READY(x)	(GPLR(82 - (x)) & GPIO_bit(82 - (x)))
+
+#define PCMCIA_S0_CD_VALID		IRQ_GPIO(84)
+#define PCMCIA_S0_CD_VALID_EDGE		GPIO_BOTH_EDGES
+
+#define PCMCIA_S1_CD_VALID		IRQ_GPIO(83)
+#define PCMCIA_S1_CD_VALID_EDGE		GPIO_BOTH_EDGES
+
+#define PCMCIA_S0_RDYINT		IRQ_GPIO(82)
+#define PCMCIA_S1_RDYINT		IRQ_GPIO(81)
+
+/* defince PCMCIA pins */
+#define PCMCIA_RESET_GPIO		53
+#define nPCE_1		GPIO85_nPCE_1
+#define nPCE_1_MD	GPIO85_nPCE_1_MD
+#define nPCE_2		GPIO54_nPCE_2
+#define nPCE_2_MD	GPIO54_nPCE_2_MD
+#define pSKTSEL_MD	GPIO79_pSKTSEL_MD
+#define pSKTSEL		GPIO79_nCS_3
+
+/* ITE8152 interrupts */
+#define IT8152_IRQ(x)	(IRQ_BOARD_START + (x))
+#define PCISERR			IT8152_IRQ(0)
+#define H2PTADR			IT8152_IRQ(1)
+#define H2PMAR			IT8152_IRQ(2)
+#define PCI_INTA		IT8152_IRQ(3)
+#define PCI_INTB		IT8152_IRQ(4)
+#define PCI_INTC		IT8152_IRQ(5)
+#define PCI_INTD		IT8152_IRQ(6)
+#define USB_INT			IT8152_IRQ(7)
+#define AUDIO_INT		IT8152_IRQ(8)
+#define CDMA_INT		IT8152_IRQ(9)
+#define IRQ_ITESER		IT8152_IRQ(10)
+#define IT8152_IRQ_MAX		IT8152_IRQ(10)
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index 3e70bd9..529d88b 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -80,4 +80,17 @@ extern unsigned int get_lcdclk_frequency
 
 #endif
 
+#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
+#ifndef __ASSEMBLY__
+extern unsigned long armcore_pcibios_min_io;
+extern unsigned long armcore_pcibios_min_mem;
+#endif
+#define PCIBIOS_MIN_IO      (armcore_pcibios_min_io)
+#define PCIBIOS_MIN_MEM     (armcore_pcibios_min_mem)
+#define pcibios_assign_all_busses()	1
+#ifdef CONFIG_CM_X270
+#define      HAVE_ARCH_PCI_SET_DMA_MASK
+#endif
+#endif
+
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h
index f3bc70e..e7195cb 100644
--- a/include/asm-arm/arch-pxa/irqs.h
+++ b/include/asm-arm/arch-pxa/irqs.h
@@ -176,7 +176,8 @@ #elif defined(CONFIG_SHARP_LOCOMO)
 #define NR_IRQS			(IRQ_LOCOMO_SPI_TEND + 1)
 #elif defined(CONFIG_ARCH_LUBBOCK) || \
       defined(CONFIG_MACH_LOGICPD_PXA270) || \
-      defined(CONFIG_MACH_MAINSTONE)
+      defined(CONFIG_MACH_MAINSTONE) || \
+      defined(CONFIG_MACH_ARMCORE)
 #define NR_IRQS			(IRQ_BOARD_END)
 #else
 #define NR_IRQS			(IRQ_BOARD_START)
diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h
index eaf6d43..965e817 100644
--- a/include/asm-arm/arch-pxa/memory.h
+++ b/include/asm-arm/arch-pxa/memory.h
@@ -17,6 +17,19 @@ #define __ASM_ARCH_MEMORY_H
  */
 #define PHYS_OFFSET	UL(0xa0000000)
 
+
+#if defined(CONFIG_CM_X270) && defined(CONFIG_PCI)
+#ifndef __ASSEMBLY__
+void cmx270_adjust_zones(int node, unsigned long *size, unsigned long *holes);
+
+#define arch_adjust_zones(node, size, holes) \
+	cmx270_adjust_zones(node, size, holes)
+
+#define ISA_DMA_THRESHOLD (SZ_64M - 1)
+#endif
+#endif
+
+
 /*
  * Virtual view <-> DMA view memory address translations
  * virt_to_bus: Used to translate the virtual address to an
